diff options
| author | Faiz Abbas <faiz_abbas@ti.com> | 2020-05-19 13:50:27 +0530 |
|---|---|---|
| committer | Tero Kristo <t-kristo@ti.com> | 2020-06-22 10:40:38 +0300 |
| commit | eac99d38f861893cf818fa1d0c8ebe75916039c1 (patch) | |
| tree | 290b849beb6ed0d45840996009f7fffa29cbcee1 | |
| parent | 23d160ef6385eb10b8ef0fb9f92798ce2dd4ba23 (diff) | |
arm64: dts: ti: k3-am654-main: Update otap-del-sel values
According to the latest AM65x Data Manual[1], a different output tap
delay value is optimum for a given speed mode. Update these values.
[1] http://www.ti.com/lit/gpn/am6526
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index 61815228e230..3a4effee8fba 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -244,7 +244,17 @@ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; mmc-ddr-1_8v; mmc-hs200-1_8v; - ti,otap-del-sel = <0x2>; + ti,otap-del-sel-legacy = <0x0>; + ti,otap-del-sel-mmc-hs = <0x0>; + ti,otap-del-sel-sd-hs = <0x0>; + ti,otap-del-sel-sdr12 = <0x0>; + ti,otap-del-sel-sdr25 = <0x0>; + ti,otap-del-sel-sdr50 = <0x8>; + ti,otap-del-sel-sdr104 = <0x7>; + ti,otap-del-sel-ddr50 = <0x5>; + ti,otap-del-sel-ddr52 = <0x5>; + ti,otap-del-sel-hs200 = <0x5>; + ti,otap-del-sel-hs400 = <0x0>; ti,trm-icp = <0x8>; dma-coherent; }; |