diff options
author | Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> | 2024-04-17 10:59:56 -0600 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2024-04-30 09:52:00 -0400 |
commit | dff0360a49b3dd4d9de4d7719137712b15d33690 (patch) | |
tree | dfff1cbdb427772926e3395837b78e99d344d371 | |
parent | e582c097d3d1baf5d721ea9c4bad77713c300d43 (diff) |
drm/amd/display: Improve registers write
Add REG_SEQ_SUBMIT and REG_SEQ_WAIT_DONE to optimize the burst write for
the regama lut.
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c index 006e23842016..f2a2d53e9689 100644 --- a/drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c +++ b/drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c @@ -410,9 +410,10 @@ void dpp1_cm_program_regamma_lut(struct dpp *dpp_base, REG_SET(CM_RGAM_LUT_DATA, 0, CM_RGAM_LUT_DATA, rgb[i].delta_red_reg); REG_SET(CM_RGAM_LUT_DATA, 0, CM_RGAM_LUT_DATA, rgb[i].delta_green_reg); REG_SET(CM_RGAM_LUT_DATA, 0, CM_RGAM_LUT_DATA, rgb[i].delta_blue_reg); - } + REG_SEQ_SUBMIT(); + REG_SEQ_WAIT_DONE(); } void dpp1_cm_configure_regamma_lut( |