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authorLijo Lazar <lijo.lazar@amd.com>2025-06-06 12:18:57 +0530
committerAlex Deucher <alexander.deucher@amd.com>2025-06-18 12:19:18 -0400
commitdd3999b658e4c15dea5feda5bf3f8ff6b1a31d2f (patch)
tree253537633ba8d6db77b1a1b9b6385586274f128f
parentf43411978d1367af6e983ae09ab4c2f7a811574a (diff)
drm/amd/pm: Show default gfx clock levels
For SMU v13.0.6 SOCs, always show default clock levels for gfx in pp_dpm_sclk. Any custom min/max levels set by user will be available in pp_od_clk_voltage Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
index f00ef7f3f355..f419472fd749 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
@@ -1377,8 +1377,9 @@ static int smu_v13_0_6_print_clk_levels(struct smu_context *smu,
return ret;
}
- min_clk = pstate_table->gfxclk_pstate.curr.min;
- max_clk = pstate_table->gfxclk_pstate.curr.max;
+ single_dpm_table = &(dpm_context->dpm_tables.gfx_table);
+ min_clk = single_dpm_table->min;
+ max_clk = single_dpm_table->max;
if (now < SMU_13_0_6_DSCLK_THRESHOLD) {
size += sysfs_emit_at(buf, size, "S: %uMhz *\n",