diff options
| author | Vijendar Mukunda <Vijendar.Mukunda@amd.com> | 2025-05-02 21:12:44 +0530 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2025-05-03 08:16:42 +0900 |
| commit | cc489cced17b2e32170ee87a3b64aaa3c7c6fddb (patch) | |
| tree | e0b15514e44d57997ef9327a93a515e01ec4fe32 | |
| parent | 8cc69ecbf195aaf90e8bd5f364ed10ec0bdecb5f (diff) | |
ASoC: SOF: amd: enable ACP_PME_EN register for ACP7.0 & ACP7.1 platforms
As per design flow for ACP7.0 & ACP7.1 platforms, enable ACP_PME_EN
register for below scenarios.
1. During acp init sequence
2. During resume sequence for SoundWire ClockStop power mode.
Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Link: https://patch.msgid.link/20250502154445.3008598-6-Vijendar.Mukunda@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | sound/soc/sof/amd/acp-dsp-offset.h | 1 | ||||
| -rw-r--r-- | sound/soc/sof/amd/acp.c | 19 |
2 files changed, 19 insertions, 1 deletions
diff --git a/sound/soc/sof/amd/acp-dsp-offset.h b/sound/soc/sof/amd/acp-dsp-offset.h index ecdcae07ace7..414151187b44 100644 --- a/sound/soc/sof/amd/acp-dsp-offset.h +++ b/sound/soc/sof/amd/acp-dsp-offset.h @@ -130,4 +130,5 @@ #define ACP_SW0_EN 0x3000 #define ACP_SW1_EN 0x3C00 +#define ACP70_PME_EN 0x1400 #endif diff --git a/sound/soc/sof/amd/acp.c b/sound/soc/sof/amd/acp.c index ead31aee5e6f..615ed7ff3846 100644 --- a/sound/soc/sof/amd/acp.c +++ b/sound/soc/sof/amd/acp.c @@ -570,9 +570,11 @@ static int acp_dsp_reset(struct snd_sof_dev *sdev) static int acp_init(struct snd_sof_dev *sdev) { + struct acp_dev_data *acp_data; int ret; /* power on */ + acp_data = sdev->pdata->hw_pdata; ret = acp_power_on(sdev); if (ret) { dev_err(sdev->dev, "ACP power on failed\n"); @@ -581,7 +583,16 @@ static int acp_init(struct snd_sof_dev *sdev) snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_CONTROL, 0x01); /* Reset */ - return acp_reset(sdev); + ret = acp_reset(sdev); + if (ret) + return ret; + switch (acp_data->pci_rev) { + case ACP70_PCI_ID: + case ACP71_PCI_ID: + snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP70_PME_EN, 1); + break; + } + return 0; } static bool check_acp_sdw_enable_status(struct snd_sof_dev *sdev) @@ -646,6 +657,12 @@ int amd_sof_acp_resume(struct snd_sof_dev *sdev) } return acp_memory_init(sdev); } + switch (acp_data->pci_rev) { + case ACP70_PCI_ID: + case ACP71_PCI_ID: + snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP70_PME_EN, 1); + break; + } return acp_dsp_reset(sdev); } |