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authorTao Zhou <tao.zhou1@amd.com>2020-11-17 14:24:17 +0800
committerAlex Deucher <alexander.deucher@amd.com>2020-11-18 14:36:11 -0500
commitc28f91dc5e4d640be5dc737c50bd46fc0afa1ab4 (patch)
tree16544f3423a2ed8aae54774efb489befd41f2767
parenteb45604e29481ce20e737ec20fdd41a40b222742 (diff)
drm/amd/pm: support runtime PPTable update for dimgrey_cavefish
There is no need to reset DPM for PPTable uploading on dimgrey_cavefish and PMFW can handle it, same as navy_flounder. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 1904df5a3e20c..8e3e7a5bbffec 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -1183,7 +1183,7 @@ static int smu_disable_dpms(struct smu_context *smu)
*/
if (smu->uploading_custom_pp_table &&
(adev->asic_type >= CHIP_NAVI10) &&
- (adev->asic_type <= CHIP_NAVY_FLOUNDER))
+ (adev->asic_type <= CHIP_DIMGREY_CAVEFISH))
return 0;
/*