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authorMichal Wajdeczko <michal.wajdeczko@intel.com>2025-06-04 22:29:08 +0200
committerMatt Roper <matthew.d.roper@intel.com>2025-06-06 11:47:05 -0700
commitbfb114751af9f44bc0fdd595bc09b085c81cc61f (patch)
tree880b9023889cf0be9ddc98ca4fb949b7fb583df0
parent113c3f596807b7b593b389d923091821d1d46e1b (diff)
drm/xe/topology: Stop trying to fix programming mistakes
We shouldn't ever pass more DSS registers than our hardcoded limit, it should be sufficient to just assert that instead of trying to fix it, as this will never happen in the production driver. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://lore.kernel.org/r/20250604202908.769-4-michal.wajdeczko@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
-rw-r--r--drivers/gpu/drm/xe/xe_gt_topology.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/drm/xe/xe_gt_topology.c b/drivers/gpu/drm/xe/xe_gt_topology.c
index 048743913b36..305939c69747 100644
--- a/drivers/gpu/drm/xe/xe_gt_topology.c
+++ b/drivers/gpu/drm/xe/xe_gt_topology.c
@@ -22,8 +22,7 @@ static void load_dss_mask(struct xe_gt *gt, xe_dss_mask_t mask, int numregs,
u32 fuse_val[XE_MAX_DSS_FUSE_REGS] = {};
int i;
- if (drm_WARN_ON(&gt_to_xe(gt)->drm, numregs > XE_MAX_DSS_FUSE_REGS))
- numregs = XE_MAX_DSS_FUSE_REGS;
+ xe_gt_assert(gt, numregs <= ARRAY_SIZE(fuse_val));
for (i = 0; i < numregs; i++)
fuse_val[i] = xe_mmio_read32(&gt->mmio, regs[i]);