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authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>2022-10-16 13:00:34 -0400
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>2022-10-17 13:08:03 -0400
commitbb65ee4a3c1dc17359d86147288c9e0e65491304 (patch)
tree280152e9185fcfa783b553e8b74caff520cfa8e2
parent7947f01598418c999be7a5cf0371221bdacd1721 (diff)
dt-bindings: pinctrl: qcom,sc7280: fix matching pin config
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-34-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
-rw-r--r--Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml14
1 files changed, 11 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
index ad3496784678..4606ca980dc4 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
@@ -47,9 +47,17 @@ properties:
wakeup-parent: true
-#PIN CONFIGURATION NODES
patternProperties:
- '-pins$':
+ "-state$":
+ oneOf:
+ - $ref: "#/$defs/qcom-sc7280-tlmm-state"
+ - patternProperties:
+ "-pins$":
+ $ref: "#/$defs/qcom-sc7280-tlmm-state"
+ additionalProperties: false
+
+$defs:
+ qcom-sc7280-tlmm-state:
type: object
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
@@ -162,7 +170,7 @@ examples:
gpio-ranges = <&tlmm 0 0 175>;
wakeup-parent = <&pdc>;
- qup_uart5_default: qup-uart5-pins {
+ qup_uart5_default: qup-uart5-state {
pins = "gpio46", "gpio47";
function = "qup13";
drive-strength = <2>;