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authorDetlev Casanova <detlev.casanova@collabora.com>2025-02-28 09:50:48 -0500
committerHeiko Stuebner <heiko@sntech.de>2025-03-08 18:19:59 +0100
commitba82f56bbf20e4166c988621cd0507509872848e (patch)
tree1f38290c02f59211569486f1e0a6a2f2b82f2cc6
parent36299757129c897ef8c7ace6981070d367d89f89 (diff)
arm64: dts: rockchip: Add SPI NOR device on the ROCK 4D
The SPI NOR chip is connected on the FSPI0 core, so enable the sfc0 node and add the flash device to it. The SPI NOR won't work at higher speed than 50 MHz, specify the limit. Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com> Link: https://lore.kernel.org/r/20250228145304.581349-3-detlev.casanova@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
index 0ba0be980754..6756403111e7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
@@ -701,6 +701,22 @@
status = "okay";
};
+
+&sfc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&fspi0_pins &fspi0_csn0>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <1>;
+ vcc-supply = <&vcc_1v8_s3>;
+ };
+};
+
&u2phy0 {
status = "okay";
};