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authorLijo Lazar <lijo.lazar@amd.com>2025-02-25 16:21:51 +0530
committerAlex Deucher <alexander.deucher@amd.com>2025-02-27 16:50:03 -0500
commitb965e42530a815987a56d84b78c11e1852541ec0 (patch)
treebd0b8dd70013a966b10576014b59972b8fb26a61
parent906d2859e1c69ad3bd680fc02a2de00105ee827b (diff)
drm/amdgpu: Fix logic to fetch supported NPS modes
Correct the logic to find supported NPS modes from firmware. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reported-by: Ava Zhang <niandong.zhang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Fixes: 30eb41f5d1a7 ("drm/amdgpu: Use firmware supported NPS modes") Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index ccb31e724b555..783e0c3b86b4c 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1607,9 +1607,8 @@ static void gmc_v9_0_init_nps_details(struct amdgpu_device *adev)
/* Mode detected by hardware and supported modes available */
if ((mode != UNKNOWN_MEMORY_PARTITION_MODE) && supp_modes) {
- for (i = AMDGPU_NPS1_PARTITION_MODE;
- supp_modes && i <= AMDGPU_NPS8_PARTITION_MODE; i++) {
- if (supp_modes & BIT(i - 1))
+ while ((i = ffs(supp_modes))) {
+ if (AMDGPU_ALL_NPS_MASK & BIT(i))
adev->gmc.supported_nps_modes |= BIT(i);
supp_modes &= supp_modes - 1;
}