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authorRyan Wanner <Ryan.Wanner@microchip.com>2025-06-17 09:08:42 -0700
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2025-08-15 16:38:27 +0200
commit9bb67948d71f1246951ecb358b84fb7d4b0f5422 (patch)
tree6ad84c8e45ec1702d798f01546c9896bdfe2bae2
parent8f181bf7beb27ca7b5a7bd36523f56a3886949ad (diff)
ARM: dts: microchip: sam9x7: Add clock name property
[ Upstream commit 2e24723492b28ffdccb0e3e68725673e299e3823 ] Add clock-output-names to the xtal nodes, so the driver can correctly register the main and slow xtal. This fixes the issue of the SoC clock driver not being able to find the main xtal and slow xtal correctly causing a bad clock tree. Fixes: 41af45af8bc3 ("ARM: dts: at91: sam9x7: add device tree for SoC") Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/036518968ac657b93e315bb550b822b59ae6f17c.1750175453.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Signed-off-by: Sasha Levin <sashal@kernel.org>
-rw-r--r--arch/arm/boot/dts/microchip/sam9x7.dtsi2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/microchip/sam9x7.dtsi b/arch/arm/boot/dts/microchip/sam9x7.dtsi
index b217a908f525..114449e90720 100644
--- a/arch/arm/boot/dts/microchip/sam9x7.dtsi
+++ b/arch/arm/boot/dts/microchip/sam9x7.dtsi
@@ -45,11 +45,13 @@
clocks {
slow_xtal: clock-slowxtal {
compatible = "fixed-clock";
+ clock-output-names = "slow_xtal";
#clock-cells = <0>;
};
main_xtal: clock-mainxtal {
compatible = "fixed-clock";
+ clock-output-names = "main_xtal";
#clock-cells = <0>;
};
};