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authorNicolas Ferre <nicolas.ferre@microchip.com>2025-09-05 11:20:44 +0200
committerClaudiu Beznea <nicolas.ferre@microchip.com>2025-08-30 11:38:55 +0300
commit82ab67d762e922bb5df1cbb442e8d4f12c26a7ae (patch)
tree9e44334954c7de569bade44742f7ebc4572836e5
parent04334f9e8ed2c5763f5633ad53199d12c96fc795 (diff)
ARM: dts: microchip: sama7d65: add uart3 definition for flexcom3 peripheral
Add the definition of uart3 at the side of i2c3 for flexcom3. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Reviewed-by: Ryan Wanner <ryan.wanner@microchip.com> Link: https://lore.kernel.org/r/20250905092044.25429-1-nicolas.ferre@microchip.com [claudiu.beznea: moved atmel,usart-mode at the end of the node to comply with dts coding style] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
-rw-r--r--arch/arm/boot/dts/microchip/sama7d65.dtsi15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi
index 84bac1d29421..e53e2dd6d530 100644
--- a/arch/arm/boot/dts/microchip/sama7d65.dtsi
+++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi
@@ -506,6 +506,21 @@
#size-cells = <1>;
status = "disabled";
+ uart3: serial@200 {
+ compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
+ reg = <0x200 0x200>;
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
+ clock-names = "usart";
+ dmas = <&dma0 AT91_XDMAC_DT_PERID(12)>,
+ <&dma0 AT91_XDMAC_DT_PERID(11)>;
+ dma-names = "tx", "rx";
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
+ status = "disabled";
+ };
+
i2c3: i2c@600 {
compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
reg = <0x600 0x200>;