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authorAlex Bee <knaerzche@gmail.com>2024-05-23 20:56:32 +0200
committerHeiko Stuebner <heiko@sntech.de>2024-08-23 11:52:53 +0200
commit7bd76f405d329c2c361703cc45317a4a55d8a68e (patch)
tree1e19ffccb38636f0d8c92ebbded59643f591eb3e
parentf0d7047889589a4affe7a04d38a408ef45ec58e6 (diff)
soc: rockchip: grf: Set RK3128's vpu main clock
RK3128 has a setting in GRF which selects whether the vpu attached iommu uses the AXI clock of the decoder (vdpu) or the encoder (vepu). The default is vepu but some part of the vendor firmware sets it to vdpu. In order to be independent on whether any of those vendor firmware blobs is used to boot the SoC reset "vpu main clock" setting to it's default value. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20240523185633.71355-3-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r--drivers/soc/rockchip/grf.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/soc/rockchip/grf.c b/drivers/soc/rockchip/grf.c
index 5fd62046b28a..df64de3d3040 100644
--- a/drivers/soc/rockchip/grf.c
+++ b/drivers/soc/rockchip/grf.c
@@ -41,9 +41,11 @@ static const struct rockchip_grf_info rk3036_grf __initconst = {
};
#define RK3128_GRF_SOC_CON0 0x140
+#define RK3128_GRF_SOC_CON1 0x144
static const struct rockchip_grf_value rk3128_defaults[] __initconst = {
{ "jtag switching", RK3128_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 8) },
+ { "vpu main clock", RK3128_GRF_SOC_CON1, HIWORD_UPDATE(0, 1, 10) },
};
static const struct rockchip_grf_info rk3128_grf __initconst = {