diff options
| author | Benoît Monin <benoit.monin@bootlin.com> | 2025-06-17 15:25:53 +0200 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2025-07-03 12:35:11 +0200 |
| commit | 71ad8d3c463ead1fc9392dfaff2fd977856c07d5 (patch) | |
| tree | 67dc7fb096be3a483420590d41da47061afbc40b | |
| parent | 9c9a7ff9882fc6ba7d2f4050697e8bb80383e8dc (diff) | |
MIPS: mobileye: dts: eyeq6h: add the emmc controller
Add the MMC/SDHCI controller found in the eyeQ6 SoC. It is based on the
cadence sd4hc controller and support modes up to HS400 enhanced strobe.
Signed-off-by: Benoît Monin <benoit.monin@bootlin.com>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| -rw-r--r-- | arch/mips/boot/dts/mobileye/eyeq6h.dtsi | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/mobileye/eyeq6h.dtsi b/arch/mips/boot/dts/mobileye/eyeq6h.dtsi index dabd5ed778b7..bbd463435ad6 100644 --- a/arch/mips/boot/dts/mobileye/eyeq6h.dtsi +++ b/arch/mips/boot/dts/mobileye/eyeq6h.dtsi @@ -109,6 +109,28 @@ clock-names = "ref"; }; + emmc: sdhci@d8010000 { + compatible = "mobileye,eyeq-sd4hc", "cdns,sd4hc"; + reg = <0 0xd8010000 0x0 0x1000>; + interrupt-parent = <&gic>; + interrupts = <GIC_SHARED 91 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&olb_south EQ6HC_SOUTH_DIV_EMMC>; + bus-width = <8>; + max-frequency = <200000000>; + mmc-ddr-1_8v; + sd-uhs-ddr50; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + + cdns,phy-input-delay-legacy = <4>; + cdns,phy-input-delay-mmc-highspeed = <2>; + cdns,phy-input-delay-mmc-ddr = <3>; + cdns,phy-dll-delay-sdclk = <32>; + cdns,phy-dll-delay-sdclk-hsmmc = <32>; + cdns,phy-dll-delay-strobe = <32>; + }; + olb_south: system-controller@d8013000 { compatible = "mobileye,eyeq6h-south-olb", "syscon"; reg = <0x0 0xd8013000 0x0 0x1000>; |