diff options
author | Alex Bee <knaerzche@gmail.com> | 2025-09-06 12:08:09 +0000 |
---|---|---|
committer | Heiko Stuebner <heiko@sntech.de> | 2025-09-11 11:02:38 +0200 |
commit | 718efbc6a773dd07047f2ac3d62bbbf3bc4b104f (patch) | |
tree | a031231303550c7876f07f0934214206c93c9e62 | |
parent | 843367c7ed196bd0806c8776cba108aaf6923b82 (diff) |
arm64: dts: rockchip: add GPU powerdomain, opps, and cooling to rk3328
Add GPU powerdomain, opp-table, and cooling map nodes for the Mali
GPU on the RK3328 SoC. Opp-table frequencies are sourced from the
Rockchip Linux v4.4 vendor kernel while voltages have been derived
from practical use and support work: keeping voltage above 1075mV
and disabling the 500MHz opp-point avoids instability and crashes.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Tested-by: Diederik de Haas <didi.debian@cknow.org> # Rock64
Link: https://lore.kernel.org/r/20250906120810.1833016-1-christianshewitt@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3328.dtsi | 40 |
1 files changed, 39 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 6438c969f9d7..283d9cbc4368 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -331,6 +331,11 @@ #address-cells = <1>; #size-cells = <0>; + power-domain@RK3328_PD_GPU { + reg = <RK3328_PD_GPU>; + clocks = <&cru ACLK_GPU>; + #power-domain-cells = <0>; + }; power-domain@RK3328_PD_HEVC { reg = <RK3328_PD_HEVC>; clocks = <&cru SCLK_VENC_CORE>; @@ -570,9 +575,13 @@ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; contribution = <4096>; }; + map1 { + trip = <&target>; + cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + contribution = <4096>; + }; }; }; - }; tsadc: tsadc@ff250000 { @@ -651,7 +660,36 @@ "ppmmu1"; clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>; clock-names = "bus", "core"; + operating-points-v2 = <&gpu_opp_table>; + power-domains = <&power RK3328_PD_GPU>; resets = <&cru SRST_GPU_A>; + #cooling-cells = <2>; + }; + + gpu_opp_table: opp-table-gpu { + compatible = "operating-points-v2"; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <1075000>; + }; + + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <1075000>; + }; + + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <1075000>; + }; + + opp-500000000 { + /* causes stability issues */ + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <1150000>; + status = "disabled"; + }; }; h265e_mmu: iommu@ff330200 { |