diff options
| author | Sowon Na <sowon.na@samsung.com> | 2025-02-19 16:37:28 +0900 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2025-02-23 13:42:41 +0100 |
| commit | 5893f538e331609fbea244ed14732291edd6ab22 (patch) | |
| tree | d9e0b17cf8d48960bd5704af12d8e9058a6d60fd | |
| parent | bbfc70ca7fd26ee3e7eb16872cf7b1f1be5907e3 (diff) | |
arm64: dts: exynosautov920: add ufs phy for ExynosAutov920 SoC
Add UFS Phy for ExynosAutov920
Like ExynosAutov9, this also uses fixed-rate clock nodes until clock driver
has been supported. The clock nodes are initialized on bootloader stage
thus we don't need to control them so far.
Changes from v4:
- Place entry in correct order instead of appending to the end.
Signed-off-by: Sowon Na <sowon.na@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20250219073731.853120-1-sowon.na@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
| -rw-r--r-- | arch/arm64/boot/dts/exynos/exynosautov920.dtsi | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi index a3fd503c1b21..fc6ac531d597 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi @@ -567,6 +567,17 @@ interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; }; + ufs_0_phy: phy@16e04000 { + compatible = "samsung,exynosautov920-ufs-phy"; + reg = <0x16e04000 0x4000>; + reg-names = "phy-pma"; + clocks = <&xtcxo>; + clock-names = "ref_clk"; + samsung,pmu-syscon = <&pmu_system_controller>; + #phy-cells = <0>; + status = "disabled"; + }; + pinctrl_aud: pinctrl@1a460000 { compatible = "samsung,exynosautov920-pinctrl"; reg = <0x1a460000 0x10000>; |