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authorChen-Yu Tsai <wens@csie.org>2025-09-12 01:47:07 +0800
committerChen-Yu Tsai <wens@csie.org>2025-09-13 13:50:52 +0800
commit44293edd013e5ed48060e6a8848c215fd3bf8ce3 (patch)
treec4c322495eada5f2e7cee25e54d9131ea7f907d2
parent828dea389683d8e1df687fbd4521d391df369437 (diff)
clk: sunxi-ng: div: support power-of-two dividers
Some clocks (for timers) on the A523 are mux-divider-gate types with the divider being values of power-of-two. Add a macro for these types of clocks so that we can use the divider types instead of the M-P types without an M divider. Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://patch.msgid.link/20250911174710.3149589-5-wens@kernel.org Signed-off-by: Chen-Yu Tsai <wens@csie.org>
-rw-r--r--drivers/clk/sunxi-ng/ccu_div.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/clk/sunxi-ng/ccu_div.h b/drivers/clk/sunxi-ng/ccu_div.h
index 90d49ee8e0cc..be00b3277e97 100644
--- a/drivers/clk/sunxi-ng/ccu_div.h
+++ b/drivers/clk/sunxi-ng/ccu_div.h
@@ -274,6 +274,24 @@ struct ccu_div {
SUNXI_CCU_M_HWS_WITH_GATE(_struct, _name, _parent, _reg, \
_mshift, _mwidth, 0, _flags)
+#define SUNXI_CCU_P_DATA_WITH_MUX_GATE(_struct, _name, _parents, _reg, \
+ _mshift, _mwidth, \
+ _muxshift, _muxwidth, \
+ _gate, _flags) \
+ struct ccu_div _struct = { \
+ .enable = _gate, \
+ .div = _SUNXI_CCU_DIV_FLAGS(_mshift, _mwidth, \
+ CLK_DIVIDER_POWER_OF_TWO), \
+ .mux = _SUNXI_CCU_MUX(_muxshift, _muxwidth), \
+ .common = { \
+ .reg = _reg, \
+ .hw.init = CLK_HW_INIT_PARENTS_DATA(_name, \
+ _parents, \
+ &ccu_div_ops, \
+ _flags), \
+ }, \
+ }
+
static inline struct ccu_div *hw_to_ccu_div(struct clk_hw *hw)
{
struct ccu_common *common = hw_to_ccu_common(hw);