diff options
author | Geraldo Nascimento <geraldogabriel@gmail.com> | 2025-06-30 19:25:28 -0300 |
---|---|---|
committer | Vinod Koul <vkoul@kernel.org> | 2025-07-22 17:58:45 +0530 |
commit | 25facbabc3fc33c794ad09d73f73268c0f8cbc7d (patch) | |
tree | 98fe684d984164451ed1ae47f0981d1e64163ffb | |
parent | c3fe7071e196e25789ecf90dbc9e8491a98884d7 (diff) |
phy: rockchip-pcie: Properly disable TEST_WRITE strobe signal
pcie_conf is used to touch TEST_WRITE strobe signal. This signal should
be enabled, a little time waited, and then disabled. Current code clearly
was copy-pasted and never disables the strobe signal. Adjust the define.
While at it, remove PHY_CFG_RD_MASK which has been unused since
64cdc0360811 ("phy: rockchip-pcie: remove unused phy_rd_cfg function").
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Geraldo Nascimento <geraldogabriel@gmail.com>
Link: https://lore.kernel.org/r/d514d5d5627680caafa8b7548cbdfee4307f5440.1751322015.git.geraldogabriel@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
-rw-r--r-- | drivers/phy/rockchip/phy-rockchip-pcie.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/phy/rockchip/phy-rockchip-pcie.c b/drivers/phy/rockchip/phy-rockchip-pcie.c index f22ffb41cdc2c..4e2dfd01adf2f 100644 --- a/drivers/phy/rockchip/phy-rockchip-pcie.c +++ b/drivers/phy/rockchip/phy-rockchip-pcie.c @@ -30,9 +30,8 @@ #define PHY_CFG_ADDR_SHIFT 1 #define PHY_CFG_DATA_MASK 0xf #define PHY_CFG_ADDR_MASK 0x3f -#define PHY_CFG_RD_MASK 0x3ff #define PHY_CFG_WR_ENABLE 1 -#define PHY_CFG_WR_DISABLE 1 +#define PHY_CFG_WR_DISABLE 0 #define PHY_CFG_WR_SHIFT 0 #define PHY_CFG_WR_MASK 1 #define PHY_CFG_PLL_LOCK 0x10 |