diff options
| author | Martin Blumenstingl <martin.blumenstingl@googlemail.com> | 2019-05-20 21:43:52 +0200 |
|---|---|---|
| committer | Kevin Hilman <khilman@baylibre.com> | 2019-05-22 18:18:09 -0700 |
| commit | 10256a4755db88cdd52c0912342f818cf3f1a22d (patch) | |
| tree | e2dcf2a06cfc1c57afb743c6eaa42ecb8b590286 | |
| parent | 47b58182391a9b88b77da0e57c79e9160929fdbf (diff) | |
ARM: dts: meson8m2: update the offset of the canvas module
With the Meson8m2 SoC the canvas module was moved from offset 0x20
(Meson8) to offset 0x48 (same as on Meson8b). The offsets inside the
canvas module are identical.
Correct the offset so the driver uses the correct registers.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| -rw-r--r-- | arch/arm/boot/dts/meson8m2.dtsi | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/meson8m2.dtsi b/arch/arm/boot/dts/meson8m2.dtsi index bb87b251e16d..5bde7f502007 100644 --- a/arch/arm/boot/dts/meson8m2.dtsi +++ b/arch/arm/boot/dts/meson8m2.dtsi @@ -14,6 +14,16 @@ compatible = "amlogic,meson8m2-clkc", "amlogic,meson8-clkc"; }; +&dmcbus { + /* the offset of the canvas registers has changed compared to Meson8 */ + /delete-node/ video-lut@20; + + canvas: video-lut@48 { + compatible = "amlogic,meson8m2-canvas", "amlogic,canvas"; + reg = <0x48 0x14>; + }; +}; + ðmac { compatible = "amlogic,meson8m2-dwmac", "snps,dwmac"; reg = <0xc9410000 0x10000 |