diff options
| author | Primoz Fiser <primoz.fiser@norik.com> | 2025-04-22 12:56:40 +0200 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2025-05-09 18:10:06 +0800 |
| commit | 0a8275f31f34cde151a03c3d6c812696303443f7 (patch) | |
| tree | 4273c2460635fd191e9b49d2e492f954f5c24beb | |
| parent | 1a69251c26c851fe8be83c6a63100439a8dfc9ce (diff) | |
arm64: dts: freescale: imx93-phyboard-segin: Add CAN support
Add support for CAN networking on phyBOARD-Segin-i.MX93 via the flexcan1
interface. The CAN PHY chip SN65HVD234D used on the board is compatible
with the TCAN1043 driver using the generic "can-transceiver-phy" and is
capable of up to 1Mbps data rate.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts index 38b89398e646..be9c0a436734 100644 --- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts +++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts @@ -26,6 +26,15 @@ stdout-path = &lpuart1; }; + flexcan1_tc: can-phy0 { + compatible = "ti,tcan1043"; + #phy-cells = <0>; + max-bitrate = <1000000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1_tc>; + enable-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; + }; + reg_usdhc2_vmmc: regulator-usdhc2 { compatible = "regulator-fixed"; enable-active-high; @@ -38,6 +47,14 @@ }; }; +/* CAN */ +&flexcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1>; + phys = <&flexcan1_tc>; + status = "okay"; +}; + /* I2C2 */ &lpi2c2 { clock-frequency = <400000>; @@ -79,6 +96,19 @@ }; &iomuxc { + pinctrl_flexcan1: flexcan1grp { + fsl,pins = < + MX93_PAD_PDM_BIT_STREAM0__CAN1_RX 0x139e + MX93_PAD_PDM_CLK__CAN1_TX 0x139e + >; + }; + + pinctrl_flexcan1_tc: flexcan1tcgrp { + fsl,pins = < + MX93_PAD_ENET2_TD3__GPIO4_IO16 0x31e + >; + }; + pinctrl_lpi2c2: lpi2c2grp { fsl,pins = < MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e |