diff options
author | Sebastian Reichel <sebastian.reichel@collabora.com> | 2025-08-18 19:12:23 +0200 |
---|---|---|
committer | Heiko Stuebner <heiko@sntech.de> | 2025-08-24 12:17:45 +0200 |
commit | 09cce878427962a5c2a3a37d6cc52485a0134ac1 (patch) | |
tree | ecf82585a660a47c5283f5a276836ea639a0733e | |
parent | 521b36e5a243d94e843c0f03285fc49ee88c37b6 (diff) |
arm64: dts: rockchip: correct network description on Sige5
Both network PHYs have dedicated crystals for the 25 MHz clock
and do not source it from the RK3576.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20250818-sige5-network-phy-clock-v1-1-87a9122d41c2@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts b/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts index 101e2ee9766d..3386084f6318 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts +++ b/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts @@ -302,8 +302,7 @@ ð1m0_tx_bus2 ð1m0_rx_bus2 ð1m0_rgmii_clk - ð1m0_rgmii_bus - ðm0_clk1_25m_out>; + ð1m0_rgmii_bus>; status = "okay"; }; @@ -784,7 +783,6 @@ rgmii_phy0: phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <0x1>; - clocks = <&cru REFCLKO25M_GMAC0_OUT>; pinctrl-names = "default"; pinctrl-0 = <&gmac0_rst>; reset-assert-us = <20000>; @@ -797,7 +795,6 @@ rgmii_phy1: phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <0x1>; - clocks = <&cru REFCLKO25M_GMAC1_OUT>; pinctrl-names = "default"; pinctrl-0 = <&gmac1_rst>; reset-assert-us = <20000>; |