diff options
author | marcus <marcus> | 2005-01-22 17:52:51 +0000 |
---|---|---|
committer | marcus <marcus> | 2005-01-22 17:52:51 +0000 |
commit | a55aa2fc76c29ffda19f3d010baad6f5340199e2 (patch) | |
tree | 07e1f9deadf27d294dc9f7adad40345c48889a53 /libl4 | |
parent | 05eaa4f61223f8c8f234e4bd52dab429e8b9ffa4 (diff) |
2005-01-22 Matthieu Lemerre <racin@free.fr>
* powerpc/l4/bits/vregs.h (_L4_load_br, _L4_store_br,
_L4_load_brs, _L4_store_brs): Fix buffer register addressing.
* ia32/l4/bits/vregs.h (_L4_load_br, _L4_store_br,
_L4_load_brs, _L4_store_brs): Likewise.
Diffstat (limited to 'libl4')
-rw-r--r-- | libl4/ChangeLog | 7 | ||||
-rw-r--r-- | libl4/ia32/l4/bits/vregs.h | 8 | ||||
-rw-r--r-- | libl4/powerpc/l4/bits/vregs.h | 8 |
3 files changed, 15 insertions, 8 deletions
diff --git a/libl4/ChangeLog b/libl4/ChangeLog index 8e8782b..4bbd3ee 100644 --- a/libl4/ChangeLog +++ b/libl4/ChangeLog @@ -1,3 +1,10 @@ +2005-01-22 Matthieu Lemerre <racin@free.fr> + + * powerpc/l4/bits/vregs.h (_L4_load_br, _L4_store_br, + _L4_load_brs, _L4_store_brs): Fix buffer register addressing. + * ia32/l4/bits/vregs.h (_L4_load_br, _L4_store_br, + _L4_load_brs, _L4_store_brs): Likewise. + 2005-01-22 Marcus Brinkmann <marcus@gnu.org> * ia32/Makefile.am (nobase_include_HEADERS): Add l4/bits/arch.h, diff --git a/libl4/ia32/l4/bits/vregs.h b/libl4/ia32/l4/bits/vregs.h index 363e222..b948476 100644 --- a/libl4/ia32/l4/bits/vregs.h +++ b/libl4/ia32/l4/bits/vregs.h @@ -387,7 +387,7 @@ _L4_store_br (int nr, _L4_word_t *data) { _L4_word_t *br = _L4_utcb () + _L4_UTCB_BR0; - *data = br[nr]; + *data = br[-nr]; } @@ -399,7 +399,7 @@ _L4_store_brs (int start, int count, _L4_word_t *data) _L4_word_t *br = _L4_utcb () + _L4_UTCB_BR0 - start; while (count--) - *(data--) = *(br--); + *(data++) = *(br--); } /* Set message register NR to DATA. */ @@ -409,7 +409,7 @@ _L4_load_br (int nr, _L4_word_t data) { _L4_word_t *br = _L4_utcb () + _L4_UTCB_BR0; - br[nr] = data; + br[-nr] = data; } @@ -422,5 +422,5 @@ _L4_load_brs (int start, int count, _L4_word_t *data) _L4_word_t *br = _L4_utcb () + _L4_UTCB_BR0 - start; while (count--) - *(br--) = *(data--); + *(br--) = *(data++); } diff --git a/libl4/powerpc/l4/bits/vregs.h b/libl4/powerpc/l4/bits/vregs.h index f169a77..546e5b0 100644 --- a/libl4/powerpc/l4/bits/vregs.h +++ b/libl4/powerpc/l4/bits/vregs.h @@ -368,7 +368,7 @@ _L4_load_br (int nr, _L4_word_t data) { _L4_word_t *br = _L4_utcb () + _L4_UTCB_BR0; - br[nr] = data; + br[-nr] = data; } @@ -381,7 +381,7 @@ _L4_load_brs (int start, int count, _L4_word_t *data) _L4_word_t *br = _L4_utcb () + _L4_UTCB_BR0 - start; while (count--) - *(br--) = *(data--); + *(br--) = *(data++); } @@ -392,7 +392,7 @@ _L4_store_br (int nr, _L4_word_t *data) { _L4_word_t *br = _L4_utcb () + _L4_UTCB_BR0; - *data = br[nr]; + *data = br[-nr]; } @@ -404,5 +404,5 @@ _L4_store_brs (int start, int count, _L4_word_t *data) _L4_word_t *br = _L4_utcb () + _L4_UTCB_BR0 - start; while (count--) - *(data--) = *(br--); + *(data++) = *(br--); } |