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authorDamien Zammit <damien@zamaudio.com>2025-07-19 07:46:11 +0000
committerSamuel Thibault <samuel.thibault@ens-lyon.org>2025-07-19 10:01:50 +0200
commit40a60caa1136c7333c05e733518eaa83fa209f58 (patch)
tree50a8a9466fc83c6ad4df672bfade6e1bee0f8edf /device/intr.c
parent8b9765332e5c30690619a314fd780cb8ca3f0169 (diff)
interrupt.S: Change interrupt EOI strategy
We now have a different strategy for EOI depending on trigger mode: For edge triggered, the behaviour is unchanged; the eoi comes before the handler so we don't miss interrupts. For level triggered, the eoi comes after the handler since the high interrupt line will trigger the interrupt again and stack up, before we mask it in queue_intr (and we don't risk missing interrupts). Message-ID: <20250719074547.288203-1-damien@zamaudio.com>
Diffstat (limited to 'device/intr.c')
-rw-r--r--device/intr.c14
1 files changed, 10 insertions, 4 deletions
diff --git a/device/intr.c b/device/intr.c
index 9529492b..07d8acd8 100644
--- a/device/intr.c
+++ b/device/intr.c
@@ -55,12 +55,18 @@ search_intr (struct irqdev *dev, ipc_port_t dst_port)
/*
* Interrupt handling logic:
+ * PCI interrupts are raised on master processor only.
*
* interrupt.S raises spl (thus IF cleared)
- * interrupt.S EOI
- * interrupt.S calls the handler
- * - for pure in-kernel handlers, they do whatever they want with IF cleared.
- * - when a userland handler is registered, queue_intr masks the irq.
+ * For edge triggered interrupts (to ensure none are missed):
+ * - interrupt.S EOI
+ * - interrupt.S calls the handler
+ * For level triggered interrupts (to prevent stacking):
+ * - interrupt.S calls the handler
+ * - interrupt.S EOI
+ *
+ * For pure in-kernel handlers, they do whatever they want with IF cleared.
+ * When a userland handler is registered, queue_intr masks the irq.
* interrupt.S lowers spl with splx_cli, thus IF still cleared
* iret, that also sets IF
*