diff options
author | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2018-12-27 19:01:57 +0000 |
---|---|---|
committer | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2018-12-27 19:01:57 +0000 |
commit | cab56836b146bc129f1ad43f0393d95a9deca63a (patch) | |
tree | 4f4e655319bbac78fca170da05275c127429b460 /sysdeps/x86/fpu | |
parent | 04ac1241a4cd004872282c2c82ec37fa33925292 (diff) | |
parent | 82dd75a7f436a19047325d62182590c9f9e23a78 (diff) |
Merge branch 't/tls' into refs/top-bases/t/tls-threadvar
Diffstat (limited to 'sysdeps/x86/fpu')
-rw-r--r-- | sysdeps/x86/fpu/Makefile | 9 | ||||
-rw-r--r-- | sysdeps/x86/fpu/bits/fenv.h | 18 | ||||
-rw-r--r-- | sysdeps/x86/fpu/bits/math-vector.h | 2 | ||||
-rw-r--r-- | sysdeps/x86/fpu/bits/mathinline.h | 650 | ||||
-rw-r--r-- | sysdeps/x86/fpu/e_sqrtf128.c | 47 | ||||
-rw-r--r-- | sysdeps/x86/fpu/fix-fp-int-compare-invalid.h | 32 | ||||
-rw-r--r-- | sysdeps/x86/fpu/include/bits/fenv.h | 17 | ||||
-rw-r--r-- | sysdeps/x86/fpu/math-barriers.h | 61 | ||||
-rw-r--r-- | sysdeps/x86/fpu/powl_helper.c | 7 | ||||
-rw-r--r-- | sysdeps/x86/fpu/sfp-machine.h | 209 | ||||
-rw-r--r-- | sysdeps/x86/fpu/test-fenv-clear-sse.c | 2 | ||||
-rw-r--r-- | sysdeps/x86/fpu/test-fenv-sse-2.c | 2 | ||||
-rw-r--r-- | sysdeps/x86/fpu/test-fenv-sse.c | 2 | ||||
-rw-r--r-- | sysdeps/x86/fpu/test-fenv-x87.c | 2 | ||||
-rw-r--r-- | sysdeps/x86/fpu/test-flt-eval-method-387.c | 1 | ||||
-rw-r--r-- | sysdeps/x86/fpu/test-flt-eval-method-sse.c | 1 | ||||
-rw-r--r-- | sysdeps/x86/fpu/test-math-vector-sincos.h | 98 |
17 files changed, 500 insertions, 660 deletions
diff --git a/sysdeps/x86/fpu/Makefile b/sysdeps/x86/fpu/Makefile index b561995658..600e42c3db 100644 --- a/sysdeps/x86/fpu/Makefile +++ b/sysdeps/x86/fpu/Makefile @@ -1,7 +1,14 @@ ifeq ($(subdir),math) +# sqrtf128 requires soft-fp. +CPPFLAGS += -I../soft-fp + libm-support += powl_helper -tests += test-fenv-sse test-fenv-clear-sse test-fenv-x87 test-fenv-sse-2 +tests += test-fenv-sse test-fenv-clear-sse test-fenv-x87 test-fenv-sse-2 \ + test-flt-eval-method-387 test-flt-eval-method-sse CFLAGS-test-fenv-sse.c += -msse2 -mfpmath=sse CFLAGS-test-fenv-clear-sse.c += -msse2 -mfpmath=sse CFLAGS-test-fenv-sse-2.c += -msse2 -mfpmath=sse +CFLAGS-test-flt-eval-method-387.c += -fexcess-precision=standard -mfpmath=387 +CFLAGS-test-flt-eval-method-sse.c += -fexcess-precision=standard -msse2 \ + -mfpmath=sse endif diff --git a/sysdeps/x86/fpu/bits/fenv.h b/sysdeps/x86/fpu/bits/fenv.h index 8c8503bd7e..4103982d8c 100644 --- a/sysdeps/x86/fpu/bits/fenv.h +++ b/sysdeps/x86/fpu/bits/fenv.h @@ -1,4 +1,4 @@ -/* Copyright (C) 1997-2016 Free Software Foundation, Inc. +/* Copyright (C) 1997-2018 Free Software Foundation, Inc. This file is part of the GNU C Library. The GNU C Library is free software; you can redistribute it and/or @@ -101,12 +101,28 @@ fenv_t; # define FE_NOMASK_ENV ((const fenv_t *) -2) #endif +#if __GLIBC_USE (IEC_60559_BFP_EXT) +/* Type representing floating-point control modes. */ +typedef struct + { + unsigned short int __control_word; + unsigned short int __glibc_reserved; + unsigned int __mxcsr; + } +femode_t; + +/* Default floating-point control modes. */ +# define FE_DFL_MODE ((const femode_t *) -1L) +#endif + #ifdef __USE_EXTERN_INLINES __BEGIN_DECLS /* Optimized versions. */ +#ifndef _LIBC extern int __REDIRECT_NTH (__feraiseexcept_renamed, (int), feraiseexcept); +#endif __extern_always_inline void __NTH (__feraiseexcept_invalid_divbyzero (int __excepts)) { diff --git a/sysdeps/x86/fpu/bits/math-vector.h b/sysdeps/x86/fpu/bits/math-vector.h index ca43cf4b9e..3d229d8705 100644 --- a/sysdeps/x86/fpu/bits/math-vector.h +++ b/sysdeps/x86/fpu/bits/math-vector.h @@ -1,5 +1,5 @@ /* Platform-specific SIMD declarations of math functions. - Copyright (C) 2014-2016 Free Software Foundation, Inc. + Copyright (C) 2014-2018 Free Software Foundation, Inc. This file is part of the GNU C Library. The GNU C Library is free software; you can redistribute it and/or diff --git a/sysdeps/x86/fpu/bits/mathinline.h b/sysdeps/x86/fpu/bits/mathinline.h index 0ff1aa4cec..91ece8dfb8 100644 --- a/sysdeps/x86/fpu/bits/mathinline.h +++ b/sysdeps/x86/fpu/bits/mathinline.h @@ -1,5 +1,5 @@ /* Inline math functions for i387 and SSE. - Copyright (C) 1995-2016 Free Software Foundation, Inc. + Copyright (C) 1995-2018 Free Software Foundation, Inc. This file is part of the GNU C Library. The GNU C Library is free software; you can redistribute it and/or @@ -26,364 +26,6 @@ # define __MATH_INLINE __extern_always_inline #endif - -#if defined __USE_ISOC99 && defined __GNUC__ && __GNUC__ >= 2 -/* GCC 2.97 and up have builtins that actually can be used. */ -# if !__GNUC_PREREQ (2,97) -/* ISO C99 defines some macros to perform unordered comparisons. The - ix87 FPU supports this with special opcodes and we should use them. - These must not be inline functions since we have to be able to handle - all floating-point types. */ -# undef isgreater -# undef isgreaterequal -# undef isless -# undef islessequal -# undef islessgreater -# undef isunordered -# ifdef __i686__ -/* For the PentiumPro and more recent processors we can provide - better code. */ -# define isgreater(x, y) \ - ({ register char __result; \ - __asm__ ("fucomip %%st(1), %%st; seta %%al" \ - : "=a" (__result) : "u" (y), "t" (x) : "cc", "st"); \ - __result; }) -# define isgreaterequal(x, y) \ - ({ register char __result; \ - __asm__ ("fucomip %%st(1), %%st; setae %%al" \ - : "=a" (__result) : "u" (y), "t" (x) : "cc", "st"); \ - __result; }) - -# define isless(x, y) \ - ({ register char __result; \ - __asm__ ("fucomip %%st(1), %%st; seta %%al" \ - : "=a" (__result) : "u" (x), "t" (y) : "cc", "st"); \ - __result; }) - -# define islessequal(x, y) \ - ({ register char __result; \ - __asm__ ("fucomip %%st(1), %%st; setae %%al" \ - : "=a" (__result) : "u" (x), "t" (y) : "cc", "st"); \ - __result; }) - -# define islessgreater(x, y) \ - ({ register char __result; \ - __asm__ ("fucomip %%st(1), %%st; setne %%al" \ - : "=a" (__result) : "u" (y), "t" (x) : "cc", "st"); \ - __result; }) - -# define isunordered(x, y) \ - ({ register char __result; \ - __asm__ ("fucomip %%st(1), %%st; setp %%al" \ - : "=a" (__result) : "u" (y), "t" (x) : "cc", "st"); \ - __result; }) -# else -/* This is the dumb, portable code for i386 and above. */ -# define isgreater(x, y) \ - ({ register char __result; \ - __asm__ ("fucompp; fnstsw; testb $0x45, %%ah; setz %%al" \ - : "=a" (__result) : "u" (y), "t" (x) : "cc", "st", "st(1)"); \ - __result; }) - -# define isgreaterequal(x, y) \ - ({ register char __result; \ - __asm__ ("fucompp; fnstsw; testb $0x05, %%ah; setz %%al" \ - : "=a" (__result) : "u" (y), "t" (x) : "cc", "st", "st(1)"); \ - __result; }) - -# define isless(x, y) \ - ({ register char __result; \ - __asm__ ("fucompp; fnstsw; testb $0x45, %%ah; setz %%al" \ - : "=a" (__result) : "u" (x), "t" (y) : "cc", "st", "st(1)"); \ - __result; }) - -# define islessequal(x, y) \ - ({ register char __result; \ - __asm__ ("fucompp; fnstsw; testb $0x05, %%ah; setz %%al" \ - : "=a" (__result) : "u" (x), "t" (y) : "cc", "st", "st(1)"); \ - __result; }) - -# define islessgreater(x, y) \ - ({ register char __result; \ - __asm__ ("fucompp; fnstsw; testb $0x44, %%ah; setz %%al" \ - : "=a" (__result) : "u" (y), "t" (x) : "cc", "st", "st(1)"); \ - __result; }) - -# define isunordered(x, y) \ - ({ register char __result; \ - __asm__ ("fucompp; fnstsw; sahf; setp %%al" \ - : "=a" (__result) : "u" (y), "t" (x) : "cc", "st", "st(1)"); \ - __result; }) -# endif /* __i686__ */ -# endif /* GCC 2.97 */ - -/* The gcc, version 2.7 or below, has problems with all this inlining - code. So disable it for this version of the compiler. */ -# if __GNUC_PREREQ (2, 8) -__BEGIN_NAMESPACE_C99 - -/* Test for negative number. Used in the signbit() macro. */ -__MATH_INLINE int -__NTH (__signbitf (float __x)) -{ -# ifdef __SSE2_MATH__ - int __m; - __asm ("pmovmskb %1, %0" : "=r" (__m) : "x" (__x)); - return (__m & 0x8) != 0; -# else - __extension__ union { float __f; int __i; } __u = { __f: __x }; - return __u.__i < 0; -# endif -} -__MATH_INLINE int -__NTH (__signbit (double __x)) -{ -# ifdef __SSE2_MATH__ - int __m; - __asm ("pmovmskb %1, %0" : "=r" (__m) : "x" (__x)); - return (__m & 0x80) != 0; -# else - __extension__ union { double __d; int __i[2]; } __u = { __d: __x }; - return __u.__i[1] < 0; -# endif -} -__MATH_INLINE int -__NTH (__signbitl (long double __x)) -{ - __extension__ union { long double __l; int __i[3]; } __u = { __l: __x }; - return (__u.__i[2] & 0x8000) != 0; -} - -__END_NAMESPACE_C99 -# endif -#endif - - -/* The gcc, version 2.7 or below, has problems with all this inlining - code. So disable it for this version of the compiler. */ -#if __GNUC_PREREQ (2, 8) -# if !__GNUC_PREREQ (3, 4) && !defined __NO_MATH_INLINES \ - && defined __OPTIMIZE__ -/* GCC 3.4 introduced builtins for all functions below, so - there's no need to define any of these inline functions. */ - -# ifdef __USE_ISOC99 -__BEGIN_NAMESPACE_C99 - -/* Round to nearest integer. */ -# ifdef __SSE_MATH__ -__MATH_INLINE long int -__NTH (lrintf (float __x)) -{ - long int __res; - /* Mark as volatile since the result is dependent on the state of - the SSE control register (the rounding mode). Otherwise GCC might - remove these assembler instructions since it does not know about - the rounding mode change and cannot currently be told. */ - __asm __volatile__ ("cvtss2si %1, %0" : "=r" (__res) : "xm" (__x)); - return __res; -} -# endif -# ifdef __SSE2_MATH__ -__MATH_INLINE long int -__NTH (lrint (double __x)) -{ - long int __res; - /* Mark as volatile since the result is dependent on the state of - the SSE control register (the rounding mode). Otherwise GCC might - remove these assembler instructions since it does not know about - the rounding mode change and cannot currently be told. */ - __asm __volatile__ ("cvtsd2si %1, %0" : "=r" (__res) : "xm" (__x)); - return __res; -} -# endif -# ifdef __x86_64__ -__extension__ -__MATH_INLINE long long int -__NTH (llrintf (float __x)) -{ - long long int __res; - /* Mark as volatile since the result is dependent on the state of - the SSE control register (the rounding mode). Otherwise GCC might - remove these assembler instructions since it does not know about - the rounding mode change and cannot currently be told. */ - __asm __volatile__ ("cvtss2si %1, %0" : "=r" (__res) : "xm" (__x)); - return __res; -} -__extension__ -__MATH_INLINE long long int -__NTH (llrint (double __x)) -{ - long long int __res; - /* Mark as volatile since the result is dependent on the state of - the SSE control register (the rounding mode). Otherwise GCC might - remove these assembler instructions since it does not know about - the rounding mode change and cannot currently be told. */ - __asm __volatile__ ("cvtsd2si %1, %0" : "=r" (__res) : "xm" (__x)); - return __res; -} -# endif - -# if defined __FINITE_MATH_ONLY__ && __FINITE_MATH_ONLY__ > 0 \ - && defined __SSE2_MATH__ -/* Determine maximum of two values. */ -__MATH_INLINE float -__NTH (fmaxf (float __x, float __y)) -{ -# ifdef __AVX__ - float __res; - __asm ("vmaxss %2, %1, %0" : "=x" (__res) : "x" (x), "xm" (__y)); - return __res; -# else - __asm ("maxss %1, %0" : "+x" (__x) : "xm" (__y)); - return __x; -# endif -} -__MATH_INLINE double -__NTH (fmax (double __x, double __y)) -{ -# ifdef __AVX__ - float __res; - __asm ("vmaxsd %2, %1, %0" : "=x" (__res) : "x" (x), "xm" (__y)); - return __res; -# else - __asm ("maxsd %1, %0" : "+x" (__x) : "xm" (__y)); - return __x; -# endif -} - -/* Determine minimum of two values. */ -__MATH_INLINE float -__NTH (fminf (float __x, float __y)) -{ -# ifdef __AVX__ - float __res; - __asm ("vminss %2, %1, %0" : "=x" (__res) : "x" (x), "xm" (__y)); - return __res; -# else - __asm ("minss %1, %0" : "+x" (__x) : "xm" (__y)); - return __x; -# endif -} -__MATH_INLINE double -__NTH (fmin (double __x, double __y)) -{ -# ifdef __AVX__ - float __res; - __asm ("vminsd %2, %1, %0" : "=x" (__res) : "x" (x), "xm" (__y)); - return __res; -# else - __asm ("minsd %1, %0" : "+x" (__x) : "xm" (__y)); - return __x; -# endif -} -# endif - -__END_NAMESPACE_C99 -# endif - -# if defined __SSE4_1__ && defined __SSE2_MATH__ -# if defined __USE_XOPEN_EXTENDED || defined __USE_ISOC99 -__BEGIN_NAMESPACE_C99 - -/* Round to nearest integer. */ -__MATH_INLINE double -__NTH (rint (double __x)) -{ - double __res; - /* Mark as volatile since the result is dependent on the state of - the SSE control register (the rounding mode). Otherwise GCC might - remove these assembler instructions since it does not know about - the rounding mode change and cannot currently be told. */ - __asm __volatile__ ("roundsd $4, %1, %0" : "=x" (__res) : "xm" (__x)); - return __res; -} -__MATH_INLINE float -__NTH (rintf (float __x)) -{ - float __res; - /* Mark as volatile since the result is dependent on the state of - the SSE control register (the rounding mode). Otherwise GCC might - remove these assembler instructions since it does not know about - the rounding mode change and cannot currently be told. */ - __asm __volatile__ ("roundss $4, %1, %0" : "=x" (__res) : "xm" (__x)); - return __res; -} - -# ifdef __USE_ISOC99 -/* Round to nearest integer without raising inexact exception. */ -__MATH_INLINE double -__NTH (nearbyint (double __x)) -{ - double __res; - /* Mark as volatile since the result is dependent on the state of - the SSE control register (the rounding mode). Otherwise GCC might - remove these assembler instructions since it does not know about - the rounding mode change and cannot currently be told. */ - __asm __volatile__ ("roundsd $0xc, %1, %0" : "=x" (__res) : "xm" (__x)); - return __res; -} -__MATH_INLINE float -__NTH (nearbyintf (float __x)) -{ - float __res; - /* Mark as volatile since the result is dependent on the state of - the SSE control register (the rounding mode). Otherwise GCC might - remove these assembler instructions since it does not know about - the rounding mode change and cannot currently be told. */ - __asm __volatile__ ("roundss $0xc, %1, %0" : "=x" (__res) : "xm" (__x)); - return __res; -} -# endif - -__END_NAMESPACE_C99 -# endif - -__BEGIN_NAMESPACE_STD -/* Smallest integral value not less than X. */ -__MATH_INLINE double -__NTH (ceil (double __x)) -{ - double __res; - __asm ("roundsd $2, %1, %0" : "=x" (__res) : "xm" (__x)); - return __res; -} -__END_NAMESPACE_STD - -__BEGIN_NAMESPACE_C99 -__MATH_INLINE float -__NTH (ceilf (float __x)) -{ - float __res; - __asm ("roundss $2, %1, %0" : "=x" (__res) : "xm" (__x)); - return __res; -} -__END_NAMESPACE_C99 - -__BEGIN_NAMESPACE_STD -/* Largest integer not greater than X. */ -__MATH_INLINE double -__NTH (floor (double __x)) -{ - double __res; - __asm ("roundsd $1, %1, %0" : "=x" (__res) : "xm" (__x)); - return __res; -} -__END_NAMESPACE_STD - -__BEGIN_NAMESPACE_C99 -__MATH_INLINE float -__NTH (floorf (float __x)) -{ - float __res; - __asm ("roundss $1, %1, %0" : "=x" (__res) : "xm" (__x)); - return __res; -} -__END_NAMESPACE_C99 -# endif -# endif -#endif - /* Disable x87 inlines when -fpmath=sse is passed and also when we're building on x86_64. Older gcc (gcc-3.2 for example) does not define __SSE2_MATH__ for x86_64. */ @@ -532,50 +174,6 @@ __END_NAMESPACE_C99 /* __FAST_MATH__ is defined by gcc -ffast-math. */ # ifdef __FAST_MATH__ -# ifdef __USE_GNU -# define __sincos_code \ - register long double __cosr; \ - register long double __sinr; \ - register unsigned int __swtmp; \ - __asm __volatile__ \ - ("fsincos\n\t" \ - "fnstsw %w2\n\t" \ - "testl $0x400, %2\n\t" \ - "jz 1f\n\t" \ - "fldpi\n\t" \ - "fadd %%st(0)\n\t" \ - "fxch %%st(1)\n\t" \ - "2: fprem1\n\t" \ - "fnstsw %w2\n\t" \ - "testl $0x400, %2\n\t" \ - "jnz 2b\n\t" \ - "fstp %%st(1)\n\t" \ - "fsincos\n\t" \ - "1:" \ - : "=t" (__cosr), "=u" (__sinr), "=a" (__swtmp) : "0" (__x)); \ - *__sinx = __sinr; \ - *__cosx = __cosr - -__MATH_INLINE void -__NTH (__sincos (double __x, double *__sinx, double *__cosx)) -{ - __sincos_code; -} - -__MATH_INLINE void -__NTH (__sincosf (float __x, float *__sinx, float *__cosx)) -{ - __sincos_code; -} - -__MATH_INLINE void -__NTH (__sincosl (long double __x, long double *__sinx, long double *__cosx)) -{ - __sincos_code; -} -# endif - - /* Optimized inline implementation, sometimes with reduced precision and/or argument range. */ @@ -631,50 +229,9 @@ __inline_mathcodeNP_ (long double, __expl, __x, return __builtin_expl (__x)) __inline_mathcodeNP (exp, __x, __exp_code) __inline_mathcodeNP_ (long double, __expl, __x, __exp_code) # endif - - -# if !__GNUC_PREREQ (3, 5) -__inline_mathcodeNP (tan, __x, \ - register long double __value; \ - register long double __value2 __attribute__ ((__unused__)); \ - __asm __volatile__ \ - ("fptan" \ - : "=t" (__value2), "=u" (__value) : "0" (__x)); \ - return __value) -# endif # endif /* __FAST_MATH__ */ -# if __GNUC_PREREQ (3, 4) -__inline_mathcodeNP2_ (long double, __atan2l, __y, __x, - return __builtin_atan2l (__y, __x)) -# else -# define __atan2_code \ - register long double __value; \ - __asm __volatile__ \ - ("fpatan" \ - : "=t" (__value) : "0" (__x), "u" (__y) : "st(1)"); \ - return __value -# ifdef __FAST_MATH__ -__inline_mathcodeNP2 (atan2, __y, __x, __atan2_code) -# endif -__inline_mathcodeNP2_ (long double, __atan2l, __y, __x, __atan2_code) -# endif - - -# if defined __FAST_MATH__ && !__GNUC_PREREQ (3, 5) -__inline_mathcodeNP2 (fmod, __x, __y, \ - register long double __value; \ - __asm __volatile__ \ - ("1: fprem\n\t" \ - "fnstsw %%ax\n\t" \ - "sahf\n\t" \ - "jp 1b" \ - : "=t" (__value) : "0" (__x), "u" (__y) : "ax", "cc"); \ - return __value) -# endif - - # ifdef __FAST_MATH__ # if !__GNUC_PREREQ (3,3) __inline_mathopNP (sqrt, "fsqrt") @@ -697,28 +254,6 @@ __inline_mathop (fabs, "fabs") __inline_mathop_ (long double, __fabsl, "fabs") # endif -# ifdef __FAST_MATH__ -# if !__GNUC_PREREQ (3, 4) -/* The argument range of this inline version is reduced. */ -__inline_mathopNP (sin, "fsin") -/* The argument range of this inline version is reduced. */ -__inline_mathopNP (cos, "fcos") - -__inline_mathop_declNP (log, "fldln2; fxch; fyl2x", "0" (__x) : "st(1)") -# endif - -# if !__GNUC_PREREQ (3, 5) -__inline_mathop_declNP (log10, "fldlg2; fxch; fyl2x", "0" (__x) : "st(1)") - -__inline_mathcodeNP (asin, __x, return __atan2l (__x, __libc_sqrtl (1.0 - __x * __x))) -__inline_mathcodeNP (acos, __x, return __atan2l (__libc_sqrtl (1.0 - __x * __x), __x)) -# endif - -# if !__GNUC_PREREQ (3, 4) -__inline_mathop_declNP (atan, "fld1; fpatan", "0" (__x) : "st(1)") -# endif -# endif /* __FAST_MATH__ */ - __inline_mathcode_ (long double, __sgn1l, __x, \ __extension__ union { long double __xld; unsigned int __xi[3]; } __n = \ { __xld: __x }; \ @@ -743,57 +278,6 @@ __inline_mathcodeNP (tanh, __x, \ return __exm1 / (__exm1 + 2.0) * __sgn1l (-__x)) # endif -__inline_mathcodeNP (floor, __x, \ - register long double __value; \ - register int __ignore; \ - unsigned short int __cw; \ - unsigned short int __cwtmp; \ - __asm __volatile ("fnstcw %3\n\t" \ - "movzwl %3, %1\n\t" \ - "andl $0xf3ff, %1\n\t" \ - "orl $0x0400, %1\n\t" /* rounding down */ \ - "movw %w1, %2\n\t" \ - "fldcw %2\n\t" \ - "frndint\n\t" \ - "fldcw %3" \ - : "=t" (__value), "=&q" (__ignore), "=m" (__cwtmp), \ - "=m" (__cw) \ - : "0" (__x)); \ - return __value) - -__inline_mathcodeNP (ceil, __x, \ - register long double __value; \ - register int __ignore; \ - unsigned short int __cw; \ - unsigned short int __cwtmp; \ - __asm __volatile ("fnstcw %3\n\t" \ - "movzwl %3, %1\n\t" \ - "andl $0xf3ff, %1\n\t" \ - "orl $0x0800, %1\n\t" /* rounding up */ \ - "movw %w1, %2\n\t" \ - "fldcw %2\n\t" \ - "frndint\n\t" \ - "fldcw %3" \ - : "=t" (__value), "=&q" (__ignore), "=m" (__cwtmp), \ - "=m" (__cw) \ - : "0" (__x)); \ - return __value) - -# ifdef __FAST_MATH__ -# define __ldexp_code \ - register long double __value; \ - __asm __volatile__ \ - ("fscale" \ - : "=t" (__value) : "0" (__x), "u" ((long double) __y)); \ - return __value - -__MATH_INLINE double -__NTH (ldexp (double __x, int __y)) -{ - __ldexp_code; -} -# endif - /* Optimized versions for some non-standardized functions. */ # ifdef __USE_ISOC99 @@ -801,25 +285,6 @@ __NTH (ldexp (double __x, int __y)) # ifdef __FAST_MATH__ __inline_mathcodeNP (expm1, __x, __expm1_code) -/* We cannot rely on M_SQRT being defined. So we do it for ourself - here. */ -# define __M_SQRT2 1.41421356237309504880L /* sqrt(2) */ - -# if !__GNUC_PREREQ (3, 5) -__inline_mathcodeNP (log1p, __x, \ - register long double __value; \ - if (__fabsl (__x) >= 1.0 - 0.5 * __M_SQRT2) \ - __value = logl (1.0 + __x); \ - else \ - __asm __volatile__ \ - ("fldln2\n\t" \ - "fxch\n\t" \ - "fyl2xp1" \ - : "=t" (__value) : "0" (__x) : "st(1)"); \ - return __value) -# endif - - /* The argument range of the inline version of asinhl is slightly reduced. */ __inline_mathcodeNP (asinh, __x, \ register long double __y = __fabsl (__x); \ @@ -837,126 +302,14 @@ __inline_mathcodeNP (atanh, __x, \ __inline_mathcodeNP2 (hypot, __x, __y, return __libc_sqrtl (__x * __x + __y * __y)) -# if !__GNUC_PREREQ (3, 5) -__inline_mathcodeNP(logb, __x, \ - register long double __value; \ - register long double __junk; \ - __asm __volatile__ \ - ("fxtract\n\t" \ - : "=t" (__junk), "=u" (__value) : "0" (__x)); \ - return __value) -# endif - # endif # endif -# ifdef __USE_ISOC99 -# ifdef __FAST_MATH__ - -# if !__GNUC_PREREQ (3, 5) -__inline_mathop_declNP (log2, "fld1; fxch; fyl2x", "0" (__x) : "st(1)") -# endif - -__MATH_INLINE float -__NTH (ldexpf (float __x, int __y)) -{ - __ldexp_code; -} - -__MATH_INLINE long double -__NTH (ldexpl (long double __x, int __y)) -{ - __ldexp_code; -} - -__inline_mathopNP (rint, "frndint") -# endif /* __FAST_MATH__ */ - -# define __lrint_code \ - long int __lrintres; \ - __asm__ __volatile__ \ - ("fistpl %0" \ - : "=m" (__lrintres) : "t" (__x) : "st"); \ - return __lrintres -__MATH_INLINE long int -__NTH (lrintf (float __x)) -{ - __lrint_code; -} -__MATH_INLINE long int -__NTH (lrint (double __x)) -{ - __lrint_code; -} -__MATH_INLINE long int -__NTH (lrintl (long double __x)) -{ - __lrint_code; -} -# undef __lrint_code - -# define __llrint_code \ - long long int __llrintres; \ - __asm__ __volatile__ \ - ("fistpll %0" \ - : "=m" (__llrintres) : "t" (__x) : "st"); \ - return __llrintres -__extension__ -__MATH_INLINE long long int -__NTH (llrintf (float __x)) -{ - __llrint_code; -} -__extension__ -__MATH_INLINE long long int -__NTH (llrint (double __x)) -{ - __llrint_code; -} -__extension__ -__MATH_INLINE long long int -__NTH (llrintl (long double __x)) -{ - __llrint_code; -} -# undef __llrint_code - -# endif - - -# ifdef __USE_MISC - -# if defined __FAST_MATH__ && !__GNUC_PREREQ (3, 5) -__inline_mathcodeNP2 (drem, __x, __y, \ - register double __value; \ - register int __clobbered; \ - __asm __volatile__ \ - ("1: fprem1\n\t" \ - "fstsw %%ax\n\t" \ - "sahf\n\t" \ - "jp 1b" \ - : "=t" (__value), "=&a" (__clobbered) : "0" (__x), "u" (__y) : "cc"); \ - return __value) -# endif - - -/* This function is used in the `isfinite' macro. */ -__MATH_INLINE int -__NTH (__finite (double __x)) -{ - return (__extension__ - (((((union { double __d; int __i[2]; }) {__d: __x}).__i[1] - | 0x800fffffu) + 1) >> 31)); -} - -# endif /* __USE_MISC */ /* Undefine some of the large macros which are not used anymore. */ -# undef __atan2_code # ifdef __FAST_MATH__ # undef __expm1_code # undef __exp_code -# undef __sincos_code # endif /* __FAST_MATH__ */ # endif /* __NO_MATH_INLINES */ @@ -964,7 +317,6 @@ __NTH (__finite (double __x)) /* This code is used internally in the GNU libc. */ # ifdef __LIBC_INTERNAL_MATH_INLINES -__inline_mathop (__ieee754_sqrt, "fsqrt") __inline_mathcode2_ (long double, __ieee754_atan2l, __y, __x, register long double __value; __asm __volatile__ ("fpatan\n\t" diff --git a/sysdeps/x86/fpu/e_sqrtf128.c b/sysdeps/x86/fpu/e_sqrtf128.c new file mode 100644 index 0000000000..cac5f63527 --- /dev/null +++ b/sysdeps/x86/fpu/e_sqrtf128.c @@ -0,0 +1,47 @@ +/* soft-fp sqrt for _Float128 + Return sqrt(a) + Copyright (C) 2017-2018 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <soft-fp.h> +#include <quad.h> + +__float128 +__ieee754_sqrtf128 (__float128 a) +{ + FP_DECL_EX; + FP_DECL_Q (A); + FP_DECL_Q (R); + __float128 r; + + FP_INIT_ROUNDMODE; + FP_UNPACK_Q (A, a); + FP_SQRT_Q (R, A); + FP_PACK_Q (r, R); + FP_HANDLE_EXCEPTIONS; + return r; +} +strong_alias (__ieee754_sqrtf128, __sqrtf128_finite) diff --git a/sysdeps/x86/fpu/fix-fp-int-compare-invalid.h b/sysdeps/x86/fpu/fix-fp-int-compare-invalid.h new file mode 100644 index 0000000000..6bad27d0fa --- /dev/null +++ b/sysdeps/x86/fpu/fix-fp-int-compare-invalid.h @@ -0,0 +1,32 @@ +/* Fix for missing "invalid" exceptions from floating-point + comparisons. x86 version. + Copyright (C) 2016-2018 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#ifndef FIX_FP_INT_COMPARE_INVALID_H +#define FIX_FP_INT_COMPARE_INVALID_H 1 + +/* Before GCC 8, both x87 and SSE comparisons use unordered comparison + instructions when they should use ordered comparisons + <https://gcc.gnu.org/bugzilla/show_bug.cgi?id=52451>. */ +#if __GNUC_PREREQ (8, 0) +# define FIX_COMPARE_INVALID 0 +#else +# define FIX_COMPARE_INVALID 1 +#endif + +#endif /* fix-fp-int-compare-invalid.h */ diff --git a/sysdeps/x86/fpu/include/bits/fenv.h b/sysdeps/x86/fpu/include/bits/fenv.h index 6e8b733f33..3d2483b0bf 100644 --- a/sysdeps/x86/fpu/include/bits/fenv.h +++ b/sysdeps/x86/fpu/include/bits/fenv.h @@ -1,5 +1,5 @@ /* Wrapper for x86 bits/fenv.h for use when building glibc. - Copyright (C) 1997-2016 Free Software Foundation, Inc. + Copyright (C) 1997-2018 Free Software Foundation, Inc. This file is part of the GNU C Library. The GNU C Library is free software; you can redistribute it and/or @@ -16,8 +16,20 @@ License along with the GNU C Library; if not, see <http://www.gnu.org/licenses/>. */ +#ifndef _BITS_FENV_H + +#if defined _LIBC && defined __USE_EXTERN_INLINES +# if defined SHARED && !defined NO_HIDDEN && IS_IN (libm) +extern int __REDIRECT_NTH (__feraiseexcept_renamed, (int), __GI_feraiseexcept); +# else +extern int __REDIRECT_NTH (__feraiseexcept_renamed, (int), feraiseexcept); +# endif +#endif + #include_next <bits/fenv.h> +# ifndef _ISOMAC + /* Ensure __feraiseexcept calls in glibc are optimized the same as feraiseexcept calls. */ @@ -40,3 +52,6 @@ __NTH (__feraiseexcept (int __excepts)) __END_DECLS #endif + +# endif /* _ISOMAC */ +#endif /* bits/fenv.h */ diff --git a/sysdeps/x86/fpu/math-barriers.h b/sysdeps/x86/fpu/math-barriers.h new file mode 100644 index 0000000000..1e1fabdb92 --- /dev/null +++ b/sysdeps/x86/fpu/math-barriers.h @@ -0,0 +1,61 @@ +/* Control when floating-point expressions are evaluated. x86 version. + Copyright (C) 2007-2018 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#ifndef X86_MATH_BARRIERS_H +#define X86_MATH_BARRIERS_H 1 + +#ifdef __SSE2_MATH__ +# define math_opt_barrier(x) \ + ({ __typeof(x) __x; \ + if (sizeof (x) <= sizeof (double) \ + || __builtin_types_compatible_p (__typeof (x), _Float128)) \ + __asm ("" : "=x" (__x) : "0" (x)); \ + else \ + __asm ("" : "=t" (__x) : "0" (x)); \ + __x; }) +# define math_force_eval(x) \ + do { \ + if (sizeof (x) <= sizeof (double) \ + || __builtin_types_compatible_p (__typeof (x), _Float128)) \ + __asm __volatile ("" : : "x" (x)); \ + else \ + __asm __volatile ("" : : "f" (x)); \ + } while (0) +#else +# define math_opt_barrier(x) \ + ({ __typeof (x) __x; \ + if (__builtin_types_compatible_p (__typeof (x), _Float128)) \ + { \ + __x = (x); \ + __asm ("" : "+m" (__x)); \ + } \ + else \ + __asm ("" : "=t" (__x) : "0" (x)); \ + __x; }) +# define math_force_eval(x) \ + do { \ + __typeof (x) __x = (x); \ + if (sizeof (x) <= sizeof (double) \ + || __builtin_types_compatible_p (__typeof (x), _Float128)) \ + __asm __volatile ("" : : "m" (__x)); \ + else \ + __asm __volatile ("" : : "f" (__x)); \ + } while (0) +#endif + +#endif diff --git a/sysdeps/x86/fpu/powl_helper.c b/sysdeps/x86/fpu/powl_helper.c index 7c5d2d1492..651eedd792 100644 --- a/sysdeps/x86/fpu/powl_helper.c +++ b/sysdeps/x86/fpu/powl_helper.c @@ -1,5 +1,5 @@ /* Implement powl for x86 using extra-precision log. - Copyright (C) 2012-2016 Free Software Foundation, Inc. + Copyright (C) 2012-2018 Free Software Foundation, Inc. This file is part of the GNU C Library. The GNU C Library is free software; you can redistribute it and/or @@ -18,6 +18,7 @@ #include <math.h> #include <math_private.h> +#include <math-underflow.h> #include <stdbool.h> /* High parts and low parts of -log (k/16), for integer k from 12 to @@ -120,7 +121,7 @@ __powl_helper (long double x, long double y) corrected for by adding log2 (e) * X_FRAC_LOW to the final result. */ int32_t se; - u_int32_t i0, i1; + uint32_t i0, i1; GET_LDOUBLE_WORDS (se, i0, i1, x_frac); x_frac_low = x_frac; i1 &= 0xffffffe0; @@ -139,7 +140,7 @@ __powl_helper (long double x, long double y) long double w = x_frac - 1; long double w_hi, w_lo; int32_t se; - u_int32_t i0, i1; + uint32_t i0, i1; GET_LDOUBLE_WORDS (se, i0, i1, w); i0 &= 0xffff0000; i1 = 0; diff --git a/sysdeps/x86/fpu/sfp-machine.h b/sysdeps/x86/fpu/sfp-machine.h new file mode 100644 index 0000000000..df8906acb4 --- /dev/null +++ b/sysdeps/x86/fpu/sfp-machine.h @@ -0,0 +1,209 @@ +/* Configure soft-fp for building sqrtf128. Based on sfp-machine.h in + libgcc, with soft-float and other irrelevant parts removed. */ + +/* The type of the result of a floating point comparison. This must + match `__libgcc_cmp_return__' in GCC for the target. */ +typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__))); +#define CMPtype __gcc_CMPtype + +#ifdef __x86_64__ +# define _FP_W_TYPE_SIZE 64 +# define _FP_W_TYPE unsigned long long +# define _FP_WS_TYPE signed long long +# define _FP_I_TYPE long long + +typedef int TItype __attribute__ ((mode (TI))); +typedef unsigned int UTItype __attribute__ ((mode (TI))); + +# define TI_BITS (__CHAR_BIT__ * (int)sizeof(TItype)) + +# define _FP_MUL_MEAT_Q(R,X,Y) \ + _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm) + +# define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_2_udiv(Q,R,X,Y) + +# define _FP_NANFRAC_S _FP_QNANBIT_S +# define _FP_NANFRAC_D _FP_QNANBIT_D +# define _FP_NANFRAC_E _FP_QNANBIT_E, 0 +# define _FP_NANFRAC_Q _FP_QNANBIT_Q, 0 + +# define FP_EX_SHIFT 7 + +# define _FP_DECL_EX \ + unsigned int _fcw __attribute__ ((unused)) = FP_RND_NEAREST; + +# define FP_RND_NEAREST 0 +# define FP_RND_ZERO 0x6000 +# define FP_RND_PINF 0x4000 +# define FP_RND_MINF 0x2000 + +# define FP_RND_MASK 0x6000 + +# define FP_INIT_ROUNDMODE \ + do { \ + __asm__ __volatile__ ("%vstmxcsr\t%0" : "=m" (_fcw)); \ + } while (0) +#else +# define _FP_W_TYPE_SIZE 32 +# define _FP_W_TYPE unsigned int +# define _FP_WS_TYPE signed int +# define _FP_I_TYPE int + +# define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ + __asm__ ("add{l} {%11,%3|%3,%11}\n\t" \ + "adc{l} {%9,%2|%2,%9}\n\t" \ + "adc{l} {%7,%1|%1,%7}\n\t" \ + "adc{l} {%5,%0|%0,%5}" \ + : "=r" ((USItype) (r3)), \ + "=&r" ((USItype) (r2)), \ + "=&r" ((USItype) (r1)), \ + "=&r" ((USItype) (r0)) \ + : "%0" ((USItype) (x3)), \ + "g" ((USItype) (y3)), \ + "%1" ((USItype) (x2)), \ + "g" ((USItype) (y2)), \ + "%2" ((USItype) (x1)), \ + "g" ((USItype) (y1)), \ + "%3" ((USItype) (x0)), \ + "g" ((USItype) (y0))) +# define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ + __asm__ ("add{l} {%8,%2|%2,%8}\n\t" \ + "adc{l} {%6,%1|%1,%6}\n\t" \ + "adc{l} {%4,%0|%0,%4}" \ + : "=r" ((USItype) (r2)), \ + "=&r" ((USItype) (r1)), \ + "=&r" ((USItype) (r0)) \ + : "%0" ((USItype) (x2)), \ + "g" ((USItype) (y2)), \ + "%1" ((USItype) (x1)), \ + "g" ((USItype) (y1)), \ + "%2" ((USItype) (x0)), \ + "g" ((USItype) (y0))) +# define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ + __asm__ ("sub{l} {%11,%3|%3,%11}\n\t" \ + "sbb{l} {%9,%2|%2,%9}\n\t" \ + "sbb{l} {%7,%1|%1,%7}\n\t" \ + "sbb{l} {%5,%0|%0,%5}" \ + : "=r" ((USItype) (r3)), \ + "=&r" ((USItype) (r2)), \ + "=&r" ((USItype) (r1)), \ + "=&r" ((USItype) (r0)) \ + : "0" ((USItype) (x3)), \ + "g" ((USItype) (y3)), \ + "1" ((USItype) (x2)), \ + "g" ((USItype) (y2)), \ + "2" ((USItype) (x1)), \ + "g" ((USItype) (y1)), \ + "3" ((USItype) (x0)), \ + "g" ((USItype) (y0))) +# define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ + __asm__ ("sub{l} {%8,%2|%2,%8}\n\t" \ + "sbb{l} {%6,%1|%1,%6}\n\t" \ + "sbb{l} {%4,%0|%0,%4}" \ + : "=r" ((USItype) (r2)), \ + "=&r" ((USItype) (r1)), \ + "=&r" ((USItype) (r0)) \ + : "0" ((USItype) (x2)), \ + "g" ((USItype) (y2)), \ + "1" ((USItype) (x1)), \ + "g" ((USItype) (y1)), \ + "2" ((USItype) (x0)), \ + "g" ((USItype) (y0))) +# define __FP_FRAC_ADDI_4(x3,x2,x1,x0,i) \ + __asm__ ("add{l} {%4,%3|%3,%4}\n\t" \ + "adc{l} {$0,%2|%2,0}\n\t" \ + "adc{l} {$0,%1|%1,0}\n\t" \ + "adc{l} {$0,%0|%0,0}" \ + : "+r" ((USItype) (x3)), \ + "+&r" ((USItype) (x2)), \ + "+&r" ((USItype) (x1)), \ + "+&r" ((USItype) (x0)) \ + : "g" ((USItype) (i))) + + +# define _FP_MUL_MEAT_S(R,X,Y) \ + _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm) +# define _FP_MUL_MEAT_D(R,X,Y) \ + _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm) +# define _FP_MUL_MEAT_Q(R,X,Y) \ + _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm) + +# define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_loop(S,R,X,Y) +# define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y) +# define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y) + +# define _FP_NANFRAC_S _FP_QNANBIT_S +# define _FP_NANFRAC_D _FP_QNANBIT_D, 0 +/* Even if XFmode is 12byte, we have to pad it to + 16byte since soft-fp emulation is done in 16byte. */ +# define _FP_NANFRAC_E _FP_QNANBIT_E, 0, 0, 0 +# define _FP_NANFRAC_Q _FP_QNANBIT_Q, 0, 0, 0 + +# define FP_EX_SHIFT 0 + +# define _FP_DECL_EX \ + unsigned short _fcw __attribute__ ((unused)) = FP_RND_NEAREST; + +# define FP_RND_NEAREST 0 +# define FP_RND_ZERO 0xc00 +# define FP_RND_PINF 0x800 +# define FP_RND_MINF 0x400 + +# define FP_RND_MASK 0xc00 + +# define FP_INIT_ROUNDMODE \ + do { \ + __asm__ __volatile__ ("fnstcw\t%0" : "=m" (_fcw)); \ + } while (0) +#endif + +#define _FP_KEEPNANFRACP 1 +#define _FP_QNANNEGATEDP 0 + +#define _FP_NANSIGN_S 1 +#define _FP_NANSIGN_D 1 +#define _FP_NANSIGN_E 1 +#define _FP_NANSIGN_Q 1 + +/* Here is something Intel misdesigned: the specs don't define + the case where we have two NaNs with same mantissas, but + different sign. Different operations pick up different NaNs. */ +#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ + do { \ + if (_FP_FRAC_GT_##wc(X, Y) \ + || (_FP_FRAC_EQ_##wc(X,Y) && (OP == '+' || OP == '*'))) \ + { \ + R##_s = X##_s; \ + _FP_FRAC_COPY_##wc(R,X); \ + } \ + else \ + { \ + R##_s = Y##_s; \ + _FP_FRAC_COPY_##wc(R,Y); \ + } \ + R##_c = FP_CLS_NAN; \ + } while (0) + +#define FP_EX_INVALID 0x01 +#define FP_EX_DENORM 0x02 +#define FP_EX_DIVZERO 0x04 +#define FP_EX_OVERFLOW 0x08 +#define FP_EX_UNDERFLOW 0x10 +#define FP_EX_INEXACT 0x20 +#define FP_EX_ALL \ + (FP_EX_INVALID | FP_EX_DENORM | FP_EX_DIVZERO | FP_EX_OVERFLOW \ + | FP_EX_UNDERFLOW | FP_EX_INEXACT) + +void __sfp_handle_exceptions (int); + +#define FP_HANDLE_EXCEPTIONS \ + do { \ + if (__builtin_expect (_fex, 0)) \ + __sfp_handle_exceptions (_fex); \ + } while (0); + +#define FP_TRAPPING_EXCEPTIONS ((~_fcw >> FP_EX_SHIFT) & FP_EX_ALL) + +#define FP_ROUNDMODE (_fcw & FP_RND_MASK) + +#define _FP_TININESS_AFTER_ROUNDING 1 diff --git a/sysdeps/x86/fpu/test-fenv-clear-sse.c b/sysdeps/x86/fpu/test-fenv-clear-sse.c index cc4b3f04c7..c67a3ba7c9 100644 --- a/sysdeps/x86/fpu/test-fenv-clear-sse.c +++ b/sysdeps/x86/fpu/test-fenv-clear-sse.c @@ -1,6 +1,6 @@ /* Test fesetenv (FE_DFL_ENV) and fesetenv (FE_NOMASK_ENV) clear exceptions (bug 19181). SSE version. - Copyright (C) 2015-2016 Free Software Foundation, Inc. + Copyright (C) 2015-2018 Free Software Foundation, Inc. This file is part of the GNU C Library. The GNU C Library is free software; you can redistribute it and/or diff --git a/sysdeps/x86/fpu/test-fenv-sse-2.c b/sysdeps/x86/fpu/test-fenv-sse-2.c index d3197c3339..fcb1011555 100644 --- a/sysdeps/x86/fpu/test-fenv-sse-2.c +++ b/sysdeps/x86/fpu/test-fenv-sse-2.c @@ -1,5 +1,5 @@ /* Test x86-specific floating-point environment (bug 16068): SSE part. - Copyright (C) 2015-2016 Free Software Foundation, Inc. + Copyright (C) 2015-2018 Free Software Foundation, Inc. This file is part of the GNU C Library. The GNU C Library is free software; you can redistribute it and/or diff --git a/sysdeps/x86/fpu/test-fenv-sse.c b/sysdeps/x86/fpu/test-fenv-sse.c index 4f4ff6a0a6..5462315811 100644 --- a/sysdeps/x86/fpu/test-fenv-sse.c +++ b/sysdeps/x86/fpu/test-fenv-sse.c @@ -1,5 +1,5 @@ /* Test floating-point environment includes SSE state (bug 16064). - Copyright (C) 2014-2016 Free Software Foundation, Inc. + Copyright (C) 2014-2018 Free Software Foundation, Inc. This file is part of the GNU C Library. The GNU C Library is free software; you can redistribute it and/or diff --git a/sysdeps/x86/fpu/test-fenv-x87.c b/sysdeps/x86/fpu/test-fenv-x87.c index b6f0b6af78..c9cd84e9c7 100644 --- a/sysdeps/x86/fpu/test-fenv-x87.c +++ b/sysdeps/x86/fpu/test-fenv-x87.c @@ -1,5 +1,5 @@ /* Test x86-specific floating-point environment (bug 16068): x87 part. - Copyright (C) 2015-2016 Free Software Foundation, Inc. + Copyright (C) 2015-2018 Free Software Foundation, Inc. This file is part of the GNU C Library. The GNU C Library is free software; you can redistribute it and/or diff --git a/sysdeps/x86/fpu/test-flt-eval-method-387.c b/sysdeps/x86/fpu/test-flt-eval-method-387.c new file mode 100644 index 0000000000..2fb7acfb76 --- /dev/null +++ b/sysdeps/x86/fpu/test-flt-eval-method-387.c @@ -0,0 +1 @@ +#include <test-flt-eval-method.c> diff --git a/sysdeps/x86/fpu/test-flt-eval-method-sse.c b/sysdeps/x86/fpu/test-flt-eval-method-sse.c new file mode 100644 index 0000000000..2fb7acfb76 --- /dev/null +++ b/sysdeps/x86/fpu/test-flt-eval-method-sse.c @@ -0,0 +1 @@ +#include <test-flt-eval-method.c> diff --git a/sysdeps/x86/fpu/test-math-vector-sincos.h b/sysdeps/x86/fpu/test-math-vector-sincos.h new file mode 100644 index 0000000000..d422ffa4a7 --- /dev/null +++ b/sysdeps/x86/fpu/test-math-vector-sincos.h @@ -0,0 +1,98 @@ +/* Wrappers definitions for tests of ABI of vector sincos/sincosf having + vector declaration "#pragma omp declare simd notinbranch". + Copyright (C) 2016-2018 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#define INIT_VEC_PTRS_LOOP(vec, val, len) \ + do \ + { \ + union { VEC_INT_TYPE v; __typeof__ ((val)[0]) *a[(len)]; } u; \ + for (i = 0; i < len; i++) \ + u.a[i] = &(val)[i]; \ + (vec) = u.v; \ + } \ + while (0) + +/* Wrapper for vector sincos/sincosf compatible with x86_64 and x32 variants + of _ZGVbN2vvv_sincos, _ZGVdN4vvv_sincos, _ZGVeN8vvv_sincos; + x32 variants of _ZGVbN4vvv_sincosf, _ZGVcN4vvv_sincos, _ZGVdN8vvv_sincosf, + _ZGVeN16vvv_sincosf. */ +#define VECTOR_WRAPPER_fFF_2(scalar_func, vector_func) \ +extern void vector_func (VEC_TYPE, VEC_INT_TYPE, VEC_INT_TYPE); \ +void scalar_func (FLOAT x, FLOAT * r, FLOAT * r1) \ +{ \ + int i; \ + FLOAT r_loc[VEC_LEN], r1_loc[VEC_LEN]; \ + VEC_TYPE mx; \ + VEC_INT_TYPE mr, mr1; \ + INIT_VEC_LOOP (mx, x, VEC_LEN); \ + INIT_VEC_PTRS_LOOP (mr, r_loc, VEC_LEN); \ + INIT_VEC_PTRS_LOOP (mr1, r1_loc, VEC_LEN); \ + vector_func (mx, mr, mr1); \ + TEST_VEC_LOOP (r_loc, VEC_LEN); \ + TEST_VEC_LOOP (r1_loc, VEC_LEN); \ + *r = r_loc[0]; \ + *r1 = r1_loc[0]; \ + return; \ +} + +/* Wrapper for vector sincos/sincosf compatible with x86_64 variants of + _ZGVcN4vvv_sincos, _ZGVeN16vvv_sincosf, _ZGVbN4vvv_sincosf, + _ZGVdN8vvv_sincosf, _ZGVcN8vvv_sincosf. */ +#define VECTOR_WRAPPER_fFF_3(scalar_func, vector_func) \ +extern void vector_func (VEC_TYPE, VEC_INT_TYPE, VEC_INT_TYPE, \ + VEC_INT_TYPE, VEC_INT_TYPE); \ +void scalar_func (FLOAT x, FLOAT * r, FLOAT * r1) \ +{ \ + int i; \ + FLOAT r_loc[VEC_LEN/2], r1_loc[VEC_LEN/2]; \ + VEC_TYPE mx; \ + VEC_INT_TYPE mr, mr1; \ + INIT_VEC_LOOP (mx, x, VEC_LEN); \ + INIT_VEC_PTRS_LOOP (mr, r_loc, VEC_LEN/2); \ + INIT_VEC_PTRS_LOOP (mr1, r1_loc, VEC_LEN/2); \ + vector_func (mx, mr, mr, mr1, mr1); \ + TEST_VEC_LOOP (r_loc, VEC_LEN/2); \ + TEST_VEC_LOOP (r1_loc, VEC_LEN/2); \ + *r = r_loc[0]; \ + *r1 = r1_loc[0]; \ + return; \ +} + +/* Wrapper for vector sincosf compatible with x86_64 variant of + _ZGVcN8vvv_sincosf. */ +#define VECTOR_WRAPPER_fFF_4(scalar_func, vector_func) \ +extern void vector_func (VEC_TYPE, VEC_INT_TYPE, VEC_INT_TYPE, \ + VEC_INT_TYPE, VEC_INT_TYPE, \ + VEC_INT_TYPE, VEC_INT_TYPE, \ + VEC_INT_TYPE, VEC_INT_TYPE); \ +void scalar_func (FLOAT x, FLOAT * r, FLOAT * r1) \ +{ \ + int i; \ + FLOAT r_loc[VEC_LEN/4], r1_loc[VEC_LEN/4]; \ + VEC_TYPE mx; \ + VEC_INT_TYPE mr, mr1; \ + INIT_VEC_LOOP (mx, x, VEC_LEN); \ + INIT_VEC_PTRS_LOOP (mr, r_loc, VEC_LEN/4); \ + INIT_VEC_PTRS_LOOP (mr1, r1_loc, VEC_LEN/4); \ + vector_func (mx, mr, mr, mr, mr, mr1, mr1, mr1, mr1); \ + TEST_VEC_LOOP (r_loc, VEC_LEN/4); \ + TEST_VEC_LOOP (r1_loc, VEC_LEN/4); \ + *r = r_loc[0]; \ + *r1 = r1_loc[0]; \ + return; \ +} |