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| author | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2018-12-27 19:01:57 +0000 |
|---|---|---|
| committer | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2018-12-27 19:01:57 +0000 |
| commit | cab56836b146bc129f1ad43f0393d95a9deca63a (patch) | |
| tree | 4f4e655319bbac78fca170da05275c127429b460 /sysdeps/riscv/configure.ac | |
| parent | 04ac1241a4cd004872282c2c82ec37fa33925292 (diff) | |
| parent | 82dd75a7f436a19047325d62182590c9f9e23a78 (diff) | |
Merge branch 't/tls' into refs/top-bases/t/tls-threadvar
Diffstat (limited to 'sysdeps/riscv/configure.ac')
| -rw-r--r-- | sysdeps/riscv/configure.ac | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/sysdeps/riscv/configure.ac b/sysdeps/riscv/configure.ac new file mode 100644 index 0000000000..34f62d4b4b --- /dev/null +++ b/sysdeps/riscv/configure.ac @@ -0,0 +1,4 @@ +GLIBC_PROVIDES dnl See aclocal.m4 in the top level source directory. +# Local configure fragment for sysdeps/riscv/elf. + +AC_DEFINE(PI_STATIC_AND_HIDDEN) |