diff options
author | Thomas Schwinge <thomas@codesourcery.com> | 2013-05-23 23:37:00 +0200 |
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committer | Thomas Schwinge <thomas@codesourcery.com> | 2013-05-23 23:37:00 +0200 |
commit | f9e888643115b4b2f28853ebd1733f4410fb8839 (patch) | |
tree | 58c69f6cef623679080e8933b6c79880bfbd7cb8 /sysdeps/powerpc/powerpc64/a2/memcpy.S | |
parent | d78eef6ebc008f784f501ce208bef12c6eafda27 (diff) | |
parent | b934acf0e93c5a220551ed6e686bb9d45a24a8cc (diff) |
Merge branch 'baseline' into refs/top-bases/tschwinge/Roger_Whittaker
Diffstat (limited to 'sysdeps/powerpc/powerpc64/a2/memcpy.S')
-rw-r--r-- | sysdeps/powerpc/powerpc64/a2/memcpy.S | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/sysdeps/powerpc/powerpc64/a2/memcpy.S b/sysdeps/powerpc/powerpc64/a2/memcpy.S index 42ec5e3750..84c82bb768 100644 --- a/sysdeps/powerpc/powerpc64/a2/memcpy.S +++ b/sysdeps/powerpc/powerpc64/a2/memcpy.S @@ -18,8 +18,6 @@ <http://www.gnu.org/licenses/>. */ #include <sysdep.h> -#include <bp-sym.h> -#include <bp-asm.h> #define PREFETCH_AHEAD 4 /* no cache lines SRC prefetching ahead */ #define ZERO_AHEAD 2 /* no cache lines DST zeroing ahead */ @@ -32,7 +30,7 @@ .machine a2 -EALIGN (BP_SYM (memcpy), 5, 0) +EALIGN (memcpy, 5, 0) CALL_MCOUNT 3 dcbt 0,r4 /* Prefetch ONE SRC cacheline */ @@ -522,5 +520,5 @@ L(endloop2_128): b L(lessthancacheline) -END_GEN_TB (BP_SYM (memcpy),TB_TOCLESS) +END_GEN_TB (memcpy,TB_TOCLESS) libc_hidden_builtin_def (memcpy) |