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author | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2018-12-27 15:58:23 +0000 |
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committer | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2018-12-27 15:58:23 +0000 |
commit | 25ead03a3712d57df2208fe82f3d316eb8faeaf6 (patch) | |
tree | eb6ebccbeffba879a7cf9cbaa29daeeb73d8e049 /sysdeps/i386/fpu/fgetexcptflg.c | |
parent | bf9f3c5bced2d3a5fb782b5a7de1008d8ca1425c (diff) | |
parent | 963c37d5c0eb62b38f8764b23931c0dcdd497a13 (diff) |
Merge commit 'refs/top-bases/t/faccessat' into t/faccessat
Diffstat (limited to 'sysdeps/i386/fpu/fgetexcptflg.c')
-rw-r--r-- | sysdeps/i386/fpu/fgetexcptflg.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sysdeps/i386/fpu/fgetexcptflg.c b/sysdeps/i386/fpu/fgetexcptflg.c index 1cb1ebb3fb..39d1f7df3a 100644 --- a/sysdeps/i386/fpu/fgetexcptflg.c +++ b/sysdeps/i386/fpu/fgetexcptflg.c @@ -1,5 +1,5 @@ /* Store current representation for exceptions. - Copyright (C) 1997-2016 Free Software Foundation, Inc. + Copyright (C) 1997-2018 Free Software Foundation, Inc. This file is part of the GNU C Library. Contributed by Ulrich Drepper <drepper@cygnus.com>, 1997. @@ -34,7 +34,7 @@ __fegetexceptflag (fexcept_t *flagp, int excepts) *flagp = temp & excepts & FE_ALL_EXCEPT; /* If the CPU supports SSE, we clear the MXCSR as well. */ - if ((GLRO(dl_hwcap) & HWCAP_I386_XMM) != 0) + if (HAS_CPU_FEATURE (SSE)) { unsigned int sse_exc; |