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| author | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2018-12-27 16:03:01 +0000 |
|---|---|---|
| committer | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2018-12-27 16:03:01 +0000 |
| commit | 14970231a38310b9561052a67b617138eeaad300 (patch) | |
| tree | 35c201a651afa5d5e4fff241280081b3f88b9c2c /sysdeps/i386/fpu/fclrexcpt.c | |
| parent | f08c7420b5e8b017a1a47b880a62b15bdc588f4d (diff) | |
| parent | 25ead03a3712d57df2208fe82f3d316eb8faeaf6 (diff) | |
Merge commit 'refs/top-bases/t/extern_inline' into t/extern_inline
Diffstat (limited to 'sysdeps/i386/fpu/fclrexcpt.c')
| -rw-r--r-- | sysdeps/i386/fpu/fclrexcpt.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sysdeps/i386/fpu/fclrexcpt.c b/sysdeps/i386/fpu/fclrexcpt.c index 68a8f863d6..8463b102e7 100644 --- a/sysdeps/i386/fpu/fclrexcpt.c +++ b/sysdeps/i386/fpu/fclrexcpt.c @@ -1,5 +1,5 @@ /* Clear given exceptions in current floating-point environment. - Copyright (C) 1997-2016 Free Software Foundation, Inc. + Copyright (C) 1997-2018 Free Software Foundation, Inc. This file is part of the GNU C Library. Contributed by Ulrich Drepper <drepper@cygnus.com>, 1997. @@ -41,7 +41,7 @@ __feclearexcept (int excepts) __asm__ ("fldenv %0" : : "m" (*&temp)); /* If the CPU supports SSE, we clear the MXCSR as well. */ - if ((GLRO(dl_hwcap) & HWCAP_I386_XMM) != 0) + if (HAS_CPU_FEATURE (SSE)) { unsigned int xnew_exc; |