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| author | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2018-12-27 16:03:01 +0000 |
|---|---|---|
| committer | Samuel Thibault <samuel.thibault@ens-lyon.org> | 2018-12-27 16:03:01 +0000 |
| commit | 14970231a38310b9561052a67b617138eeaad300 (patch) | |
| tree | 35c201a651afa5d5e4fff241280081b3f88b9c2c /sysdeps/aarch64/fpu/fpu_control.h | |
| parent | f08c7420b5e8b017a1a47b880a62b15bdc588f4d (diff) | |
| parent | 25ead03a3712d57df2208fe82f3d316eb8faeaf6 (diff) | |
Merge commit 'refs/top-bases/t/extern_inline' into t/extern_inline
Diffstat (limited to 'sysdeps/aarch64/fpu/fpu_control.h')
| -rw-r--r-- | sysdeps/aarch64/fpu/fpu_control.h | 19 |
1 files changed, 14 insertions, 5 deletions
diff --git a/sysdeps/aarch64/fpu/fpu_control.h b/sysdeps/aarch64/fpu/fpu_control.h index 7e74445872..2d36170c05 100644 --- a/sysdeps/aarch64/fpu/fpu_control.h +++ b/sysdeps/aarch64/fpu/fpu_control.h @@ -1,4 +1,4 @@ -/* Copyright (C) 1996-2016 Free Software Foundation, Inc. +/* Copyright (C) 1996-2018 Free Software Foundation, Inc. This file is part of the GNU C Library. @@ -19,19 +19,28 @@ #ifndef _AARCH64_FPU_CONTROL_H #define _AARCH64_FPU_CONTROL_H +#include <features.h> + /* Macros for accessing the FPCR and FPSR. */ -#define _FPU_GETCW(fpcr) \ +#if __GNUC_PREREQ (6,0) +# define _FPU_GETCW(fpcr) (fpcr = __builtin_aarch64_get_fpcr ()) +# define _FPU_SETCW(fpcr) __builtin_aarch64_set_fpcr (fpcr) +# define _FPU_GETFPSR(fpsr) (fpsr = __builtin_aarch64_get_fpsr ()) +# define _FPU_SETFPSR(fpsr) __builtin_aarch64_set_fpsr (fpsr) +#else +# define _FPU_GETCW(fpcr) \ __asm__ __volatile__ ("mrs %0, fpcr" : "=r" (fpcr)) -#define _FPU_SETCW(fpcr) \ +# define _FPU_SETCW(fpcr) \ __asm__ __volatile__ ("msr fpcr, %0" : : "r" (fpcr)) -#define _FPU_GETFPSR(fpsr) \ +# define _FPU_GETFPSR(fpsr) \ __asm__ __volatile__ ("mrs %0, fpsr" : "=r" (fpsr)) -#define _FPU_SETFPSR(fpsr) \ +# define _FPU_SETFPSR(fpsr) \ __asm__ __volatile__ ("msr fpsr, %0" : : "r" (fpsr)) +#endif /* Reserved bits should be preserved when modifying register contents. These two masks indicate which bits in each of FPCR and |