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authorUlrich Drepper <drepper@gmail.com>2011-03-22 01:52:43 -0400
committerUlrich Drepper <drepper@gmail.com>2011-03-22 01:52:43 -0400
commitbb2420590cb2d7d3e580708d21e875d6562ae3c9 (patch)
tree86aa825587f618596c4e49d027aaaf2df86c9e8f
parent786e84c533d00573fa0ba7e701b1ecb03f0111fb (diff)
Last change caused infinite loops because of missing loop increment.
-rw-r--r--ChangeLog6
-rw-r--r--sysdeps/unix/sysv/linux/i386/sysconf.c2
-rw-r--r--sysdeps/x86_64/cacheinfo.c2
3 files changed, 10 insertions, 0 deletions
diff --git a/ChangeLog b/ChangeLog
index 8e59560432..7c537958cd 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,9 @@
+2011-03-22 Ulrich Drepper <drepper@gmail.com>
+
+ * sysdeps/unix/sysv/linux/i386/sysconf.c (intel_check_word): Increment
+ round counter.
+ * sysdeps/x86_64/cacheinfo.c (intel_check_word): Likewise.
+
2011-03-20 H.J. Lu <hongjiu.lu@intel.com>
[BZ #12597]
diff --git a/sysdeps/unix/sysv/linux/i386/sysconf.c b/sysdeps/unix/sysv/linux/i386/sysconf.c
index 4ea1a2bf58..1f5d3b06b1 100644
--- a/sysdeps/unix/sysv/linux/i386/sysconf.c
+++ b/sysdeps/unix/sysv/linux/i386/sysconf.c
@@ -231,6 +231,8 @@ intel_check_word (int name, unsigned int value, bool *has_level_2,
assert (offset == 2);
return (ebx & 0xfff) + 1;
}
+
+ ++round;
}
/* There is no other cache information anywhere else. */
break;
diff --git a/sysdeps/x86_64/cacheinfo.c b/sysdeps/x86_64/cacheinfo.c
index fdd6427e12..bd4be3d2df 100644
--- a/sysdeps/x86_64/cacheinfo.c
+++ b/sysdeps/x86_64/cacheinfo.c
@@ -226,6 +226,8 @@ intel_check_word (int name, unsigned int value, bool *has_level_2,
assert (offset == 2);
return (ebx & 0xfff) + 1;
}
+
+ ++round;
}
/* There is no other cache information anywhere else. */
break;