diff options
Diffstat (limited to 'main.c')
| -rw-r--r-- | main.c | 14 |
1 files changed, 7 insertions, 7 deletions
@@ -44,12 +44,12 @@ volatile u8 bV1P8_DDR = true; volatile u8 bV2P5 = true; volatile u8 bVCC3 = true; -#define TENSION_EXPIRED (SW1State || Timer1 == 0) +#define TENSION_EXPIRED (Timer1 == 0) #define TENSION_WAIT(t) (t) #else -#define TENSION_EXPIRED (SW1State) +#define TENSION_EXPIRED (0) #define TENSION_WAIT(t) (Timer1 == 0) #endif @@ -94,7 +94,7 @@ int main(void) break; case WAIT_ATX_OK: - if (TENSION_EXPIRED) + if (SW1State || TENSION_EXPIRED) state = STOP; // if SW1 just pressed during power or ATX didn't set up // ATX power OK, stop if ((P4IN & ATX_PWROK) && TENSION_WAIT(bV2P5 && bVCC3)) { @@ -107,7 +107,7 @@ int main(void) break; case WAIT_V1P2: - if (TENSION_EXPIRED) + if (SW1State || TENSION_EXPIRED) state = STOP; if (TENSION_WAIT(bV1P2)) { // Got V1P2 stable Timer1 = 30; // set Timer1 @ 30 milli seconde to get V1P8-DDR stable @@ -127,7 +127,7 @@ int main(void) break; case WAIT_V1P8: - if (TENSION_EXPIRED) + if (SW1State || TENSION_EXPIRED) state = STOP; if (TENSION_WAIT(bV1P8)) { ClrBit(P2OUT, CPU_VCCP_EN_N); // enable V1P0 @@ -137,7 +137,7 @@ int main(void) break; case WAIT_V1P0: - if (TENSION_EXPIRED) + if (SW1State || TENSION_EXPIRED) state = STOP; if (TENSION_WAIT(bV1P0)) { // Got V1P0 stable and all other supplies too SetBit(P3OUT, VRMPWRGD); @@ -167,7 +167,7 @@ int main(void) } break; case CPU_RUN + 1: - if (SW1State != 0) // if SW1 just pressed during power up go STOP + if (SW1State) // if SW1 just pressed during power up go STOP state = STOP; if (Timer1 == 0) { ClrBit(P2DIR, IMCH_PWRBTN_N); // Release IMCH-PWRBTN-N signal after 200 |