| Age | Commit message (Collapse) | Author |
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Mismatched parentheses.
Fixes: 7f3cf5ac7743 (perf vendor events power9: Cpi_breakdown & estimated_dcache_miss_cpi metrics)
Signed-off-by: Ian Rogers <irogers@google.com>
Reviewed-by: Paul Clarke <pc@us.ibm.com>
Acked-by: Jiri Olsa <jolsa@redhat.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Haiyan Song <haiyanx.song@intel.com>
Cc: Jin Yao <yao.jin@linux.intel.com>
Cc: John Garry <john.garry@huawei.com>
Cc: Kajol Jain <kjain@linux.ibm.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Paul Clarke <pc@us.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Cc: Song Liu <songliubraving@fb.com>
Cc: Stephane Eranian <eranian@google.com>
Link: http://lore.kernel.org/lkml/20200501173333.227162-10-irogers@google.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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Mismatched parentheses.
Fixes: dd81eafacc52 (perf vendor events power8: Cpi_breakdown & estimated_dcache_miss_cpi metrics)
Signed-off-by: Ian Rogers <irogers@google.com>
Reviewed-by: Paul Clarke <pc@us.ibm.com>
Acked-by: Jiri Olsa <jolsa@redhat.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Haiyan Song <haiyanx.song@intel.com>
Cc: Jin Yao <yao.jin@linux.intel.com>
Cc: John Garry <john.garry@huawei.com>
Cc: Kajol Jain <kjain@linux.ibm.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Cc: Song Liu <songliubraving@fb.com>
Cc: Stephane Eranian <eranian@google.com>
Link: http://lore.kernel.org/lkml/20200501173333.227162-9-irogers@google.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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Remove over escaping with \\.
Fixes: fd5500989c8f (perf vendor events intel: Update metrics from TMAM 3.5)
Signed-off-by: Ian Rogers <irogers@google.com>
Acked-by: Jiri Olsa <jolsa@redhat.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Haiyan Song <haiyanx.song@intel.com>
Cc: Jin Yao <yao.jin@linux.intel.com>
Cc: John Garry <john.garry@huawei.com>
Cc: Kajol Jain <kjain@linux.ibm.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Paul Clarke <pc@us.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Cc: Song Liu <songliubraving@fb.com>
Cc: Stephane Eranian <eranian@google.com>
Link: http://lore.kernel.org/lkml/20200501173333.227162-4-irogers@google.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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Remove over escaping with \\.
Remove extraneous if 1 if 0 == 1 else 0 else 0.
Fixes: fd5500989c8f (perf vendor events intel: Update metrics from TMAM 3.5)
Signed-off-by: Ian Rogers <irogers@google.com>
Acked-by: Jiri Olsa <jolsa@redhat.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Haiyan Song <haiyanx.song@intel.com>
Cc: Jin Yao <yao.jin@linux.intel.com>
Cc: John Garry <john.garry@huawei.com>
Cc: Kajol Jain <kjain@linux.ibm.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Paul Clarke <pc@us.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Cc: Song Liu <songliubraving@fb.com>
Cc: Stephane Eranian <eranian@google.com>
Link: http://lore.kernel.org/lkml/20200501173333.227162-3-irogers@google.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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The hv_24×7 feature in IBM® POWER9™ processor-based servers provide the
facility to continuously collect large numbers of hardware performance
metrics efficiently and accurately.
This patch adds hv_24x7 metric file for different Socket/chip
resources.
Result:
power9 platform:
command:# ./perf stat --metric-only -M Memory_RD_BW_Chip -C 0 -I 1000
1.000096188 0.9 0.3
2.000285720 0.5 0.1
3.000424990 0.4 0.1
command:# ./perf stat --metric-only -M PowerBUS_Frequency -C 0 -I 1000
1.000097981 2.3 2.3
2.000291713 2.3 2.3
3.000421719 2.3 2.3
4.000550912 2.3 2.3
Signed-off-by: Kajol Jain <kjain@linux.ibm.com>
Acked-by: Jiri Olsa <jolsa@redhat.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Anju T Sudhakar <anju@linux.vnet.ibm.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jin Yao <yao.jin@linux.intel.com>
Cc: Joe Mario <jmario@redhat.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: Mamatha Inamdar <mamatha4@linux.vnet.ibm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Michael Petlan <mpetlan@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Paul Mackerras <paulus@ozlabs.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Cc: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lore.kernel.org/lkml/20200401203340.31402-8-kjain@linux.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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get_cpuid_str() is used in tools/perf/arch/xxx/util/header.c,
fix the name in comment.
Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Andi Kleen <ak@linux.intel.com>
Link: http://lore.kernel.org/lkml/1588141992-48382-1-git-send-email-zhangshaokun@hisilicon.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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The kernel utilization metric does multiplexing currently and is somewhat
unreliable. The problem is that it uses two instances of the fixed counter,
and the kernel has to multipleplex which causes errors. So should use
CPU_CLK_UNHALTED.THREAD instead.
Before:
# perf stat -M Kernel_Utilization -- sleep 1
Performance counter stats for 'sleep 1':
1,419,425 cpu_clk_unhalted.ref_tsc:k
<not counted> cpu_clk_unhalted.ref_tsc (0.00%)
After:
# perf stat -M Kernel_Utilization -- sleep 1
Performance counter stats for 'sleep 1':
746,688 cpu_clk_unhalted.thread:k # 0.7 Kernel_Utilization
1,088,348 cpu_clk_unhalted.thread
Signed-off-by: Jin Yao <yao.jin@linux.intel.com>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Jin Yao <yao.jin@intel.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lore.kernel.org/lkml/20200309013125.7559-1-yao.jin@linux.intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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With the goal of supporting pmu-events test case, introduce support for
a test events folder.
These test events can be used for testing generation of pmu-event tables
and alias creation for any arch.
When running the pmu-events test case, these test events will be used as
the platform-agnostic events, so aliases can be created per-PMU and
validated against known expected values.
To support the test events, add a "testcpu" entry in pmu_events_map[].
The pmu-events test will be able to lookup the events map for "testcpu",
to verify the generated tables against expected values.
The resultant generated pmu-events.c will now look like the following:
struct pmu_event pme_ampere_emag[] = {
{
.name = "ldrex_spec",
.event = "event=0x6c",
.desc = "Exclusive operation spe...",
.topic = "intrinsic",
.long_desc = "Exclusive operation ...",
},
...
};
struct pmu_event pme_test_cpu[] = {
{
.name = "uncore_hisi_ddrc.flux_wcmd",
.event = "event=0x2",
.desc = "DDRC write commands. Unit: hisi_sccl,ddrc ",
.topic = "uncore",
.long_desc = "DDRC write commands",
.pmu = "hisi_sccl,ddrc",
},
{
.name = "unc_cbo_xsnp_response.miss_eviction",
.event = "umask=0x81,event=0x22",
.desc = "Unit: uncore_cbox A cross-core snoop resulted ...",
.topic = "uncore",
.long_desc = "A cross-core snoop resulted from L3 ...",
.pmu = "uncore_cbox",
},
{
.name = "eist_trans",
.event = "umask=0x0,period=200000,event=0x3a",
.desc = "Number of Enhanced Intel SpeedStep(R) ...",
.topic = "other",
},
{
.name = 0,
},
};
struct pmu_events_map pmu_events_map[] = {
...
{
.cpuid = "0x00000000500f0000",
.version = "v1",
.type = "core",
.table = pme_ampere_emag
},
...
{
.cpuid = "testcpu",
.version = "v1",
.type = "core",
.table = pme_test_cpu,
},
{
.cpuid = 0,
.version = 0,
.type = 0,
.table = 0,
},
};
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Jiri Olsa <jolsa@redhat.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: James Clark <james.clark@arm.com>
Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
Cc: linuxarm@huawei.com
Link: http://lore.kernel.org/lkml/1584442939-8911-3-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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Add some test PMU events. The events are randomly chosen from x86 and
arm64 JSONs. The events include CPU and uncore events.
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Jiri Olsa <jolsa@redhat.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: James Clark <james.clark@arm.com>
Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
Cc: linuxarm@huawei.com
Link: http://lore.kernel.org/lkml/1584442939-8911-2-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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This patch updates the PMCs for AMD Zen1 core based processors (Family
17h; Models 0 through 2F) to be in accordance with PMCs as
documented in the latest versions of the AMD Processor Programming
Reference [1], [2] and [3]. Note that some events, such as FPU pipe
assignment are missing in [1], and therefore [3] is included for full
coverage of events.
PMCs added:
fpu_pipe_assignment.dual{0|1|2|3}
fpu_pipe_assignment.total{0|1|2|3}
ls_mab_alloc.dc_prefetcher
ls_mab_alloc.stores
ls_mab_alloc.loads
bp_dyn_ind_pred
bp_de_redirect
PMC removed:
ex_ret_cond_misp
Cumulative counts, fpu_pipe_assignment.total and
fpu_pipe_assignment.dual, existed in v1, but did expose port-level
counters.
ex_ret_cond_misp has been removed as it has been removed from the latest
versions of the PPR, and when tested, always seems to sample zero as
tested on a Ryzen 3400G system.
[1]: Processor Programming Reference (PPR) for AMD Family 17h Models
01h,08h, Revision B2 Processors, 54945 Rev 3.03 - Jun 14, 2019.
[2]: Processor Programming Reference (PPR) for AMD Family 17h Model 18h,
Revision B1 Processors, 55570-B1 Rev 3.14 - Sep 26, 2019.
[3]: OSRR for AMD Family 17h processors, Models 00h-2Fh, 56255 Rev 3.03 - July, 2018
All of the PPRs can be found at:
https://bugzilla.kernel.org/show_bug.cgi?id=206537
Signed-off-by: Vijay Thakkar <vijaythakkar@me.com>
Acked-by: Kim Phillips <kim.phillips@amd.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Jon Grimm <jon.grimm@amd.com>
Cc: Martin Liška <mliska@suse.cz>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: vijay thakkar <vijaythakkar@me.com>
Link: http://lore.kernel.org/lkml/20200318190002.307290-4-vijaythakkar@me.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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This patch adds PMU events for AMD Zen2 core based processors, namely,
Matisse (model 71h), Castle Peak (model 31h) and Rome (model 2xh), as
documented in the AMD Processor Programming Reference for Matisse [1].
The model number regex has been set to detect all the models under
family 17 that do not match those of Zen1, as the range is larger for
zen2.
Zen2 adds some additional counters that are not present in Zen1 and
events for them have been added in this patch. Some counters have also
been removed for Zen2 thatwere previously present in Zen1 and have been
confirmed to always sample zero on zen2. These added/removed counters
have been omitted for brevity but can be found here:
https://gist.github.com/thakkarV/5b12ca5fd7488eb2c42e451e40bdd5f3
Note that PPR for Zen2 [1] does not include some counters that were
documented in the PPR for Zen1 based processors [2]. After having tested
these counters, some of them that still work for zen2 systems have been
preserved in the events for zen2. The counters that are omitted in [1]
but are still measurable and non-zero on zen2 (tested on a Ryzen 3900X
system) are the following:
PMC 0x000 fpu_pipe_assignment.{total|total0|total1|total2|total3}
PMC 0x004 fp_num_mov_elim_scal_op.*
PMC 0x046 ls_tablewalker.*
PMC 0x062 l2_latency.l2_cycles_waiting_on_fills
PMC 0x063 l2_wcb_req.*
PMC 0x06D l2_fill_pending.l2_fill_busy
PMC 0x080 ic_fw32
PMC 0x081 ic_fw32_miss
PMC 0x086 bp_snp_re_sync
PMC 0x087 ic_fetch_stall.*
PMC 0x08C ic_cache_inval.*
PMC 0x099 bp_tlb_rel
PMC 0x0C7 ex_ret_brn_resync
PMC 0x28A ic_oc_mode_switch.*
L3PMC 0x001 l3_request_g1.*
L3PMC 0x006 l3_comb_clstr_state.*
[1]: Processor Programming Reference (PPR) for AMD Family 17h Model 71h,
Revision B0 Processors, 56176 Rev 3.06 - Jul 17, 2019
[2]: Processor Programming Reference (PPR) for AMD Family 17h Models
01h,08h, Revision B2 Processors, 54945 Rev 3.03 - Jun 14, 2019
All of the PPRs can be found at:
https://bugzilla.kernel.org/show_bug.cgi?id=206537
Here are the results of running "fpu_pipe_assignment.total" events on my
Ryzen 3900X family 17h model 71h system:
Before this patch:
$> perf list *fpu_pipe_assignment*
List of pre-defined events (to be used in -e):
After:
$> perf list *fpu_pipe_assignment*
floating point:
fpu_pipe_assignment.total
[Total number of fp uOps]
fpu_pipe_assignment.total0
[Total number uOps assigned to pipe 0]
fpu_pipe_assignment.total1
[Total number uOps assigned to pipe 1]
fpu_pipe_assignment.total2
[Total number uOps assigned to pipe 2]
fpu_pipe_assignment.total3
[Total number uOps assigned to pipe 3]
Metric Groups:
$> perf stat -e fpu_pipe_assignment.total sleep 1
Performance counter stats for 'sleep 1':
25,883 fpu_pipe_assignment.total
1.004145868 seconds time elapsed
0.001805000 seconds user
0.000000000 seconds sys
Usage tests while running Linpackin the background:
$> perf stat -I1000 -e fpu_pipe_assignment.total
1.000266796 79,313,191,516 fpu_pipe_assignment.total
2.000809630 68,091,474,430 fpu_pipe_assignment.total
3.001028115 52,925,023,174 fpu_pipe_assignment.total
$> perf record -e fpu_pipe_assignment.total,fpu_pipe_assignment.total0 -a sleep 1
[ perf record: Woken up 9 times to write data ]
[ perf record: Captured and wrote 4.031 MB perf.data (64764 samples) ]
$> perf report --stdio --no-header | head -30
98.33% xhpl xhpl [.] dgemm_kernel
0.28% xhpl xhpl [.] dtrsm_kernel_LT
0.10% xhpl [kernel.kallsyms] [k] entry_SYSCALL_64
0.08% xhpl xhpl [.] idamax_k
0.07% baloo_file_extr liblmdb.so [.] mdb_mid2l_insert
0.06% xhpl xhpl [.] dgemm_itcopy
0.06% xhpl xhpl [.] dgemm_oncopy
0.06% xhpl [kernel.kallsyms] [k] __schedule
0.06% xhpl [kernel.kallsyms] [k] syscall_trace_enter
0.06% xhpl [kernel.kallsyms] [k] native_sched_clock
0.06% xhpl [kernel.kallsyms] [k] pick_next_task_fair
0.05% xhpl xhpl [.] blas_thread_server.llvm.15009391670273914865
0.04% xhpl [kernel.kallsyms] [k] do_syscall_64
0.04% xhpl [kernel.kallsyms] [k] yield_task_fair
0.04% xhpl libpthread-2.31.so [.] __pthread_mutex_unlock_usercnt
0.03% xhpl [kernel.kallsyms] [k] cpuacct_charge
0.03% xhpl [kernel.kallsyms] [k] syscall_return_via_sysret
0.03% xhpl libc-2.31.so [.] __sched_yield
0.03% xhpl [kernel.kallsyms] [k] __calc_delta
$> perf annotate --stdio2 dgemm_kernel | egrep '^ {0,2}[0-9]+' -B2 -A2
sub $0x60,%rsp
mov %rbx,(%rsp)
0.00 mov %rbp,0x8(%rsp)
mov %r12,0x10(%rsp)
0.00 mov %r13,0x18(%rsp)
mov %r14,0x20(%rsp)
mov %r15,0x28(%rsp)
--
mov %rdi,%r13
mov %rsi,0x28(%rsp)
0.00 mov %rdx,%r12
vmovsd %xmm0,0x30(%rsp)
shl $0x3,%r10
mov 0x28(%rsp),%rax
0.00 xor %rdx,%rdx
mov $0x18,%rdi
div %rdi
--
nop
a0: mov %r12,%rax
0.00 shl $0x3,%rax
mov %r8,%rdi
lea (%r8,%rax,8),%r15
--
mov %r12,%rax
nop
0.00 c0: vmovups (%rdi),%ymm1
0.09 vmovups 0x20(%rdi),%ymm2
0.02 vmovups (%r15),%ymm3
0.10 vmovups %ymm1,(%rsi)
0.07 vmovups %ymm2,0x20(%rsi)
0.07 vmovups %ymm3,0x40(%rsi)
0.06 add $0x40,%rdi
add $0x40,%r15
add $0x60,%rsi
0.00 dec %rax
↑ jne c0
mov %r9,%r15
--
nop
110: lea 0x80(%rsp),%rsi
0.01 add $0x60,%rsi
0.03 mov %r12,%rax
0.00 sar $0x3,%rax
cmp $0x2,%rax
↓ jl d26
prefetcht0 0x200(%rdi)
0.01 vmovups -0x60(%rsi),%ymm1
0.02 prefetcht0 0xa0(%rsi)
0.00 vbroadcastsd -0x80(%rdi),%ymm0
0.00 prefetcht0 0xe0(%rsi)
0.03 vmovups -0x40(%rsi),%ymm2
0.00 prefetcht0 0x120(%rsi)
vmovups -0x20(%rsi),%ymm3
vmulpd %ymm0,%ymm1,%ymm4
0.01 prefetcht0 0x160(%rsi)
vmulpd %ymm0,%ymm2,%ymm8
0.01 vmulpd %ymm0,%ymm3,%ymm12
0.02 prefetcht0 0x1a0(%rsi)
0.01 vbroadcastsd -0x78(%rdi),%ymm0
vmulpd %ymm0,%ymm1,%ymm5
0.01 vmulpd %ymm0,%ymm2,%ymm9
vmulpd %ymm0,%ymm3,%ymm13
0.01 vbroadcastsd -0x70(%rdi),%ymm0
vmulpd %ymm0,%ymm1,%ymm6
0.00 vmulpd %ymm0,%ymm2,%ymm10
0.00 add $0x60,%rsi
... snip ...
nop
65e0: vmovddup -0x60(%rsi),%xmm2
0.00 vmovups -0x80(%rdi),%xmm0
vmovups -0x70(%rdi),%xmm1
0.00 vmovddup -0x58(%rsi),%xmm3
vfmadd231pd %xmm0,%xmm2,%xmm4
0.00 vfmadd231pd %xmm1,%xmm2,%xmm5
0.00 vfmadd231pd %xmm0,%xmm3,%xmm6
0.00 vfmadd231pd %xmm1,%xmm3,%xmm7
0.00 add $0x10,%rsi
add $0x20,%rdi
0.00 dec %rax
↑ jne 65e0
nop
nop
6620: vmovddup 0x30(%rsp),%xmm0
0.00 vmulpd %xmm0,%xmm4,%xmm4
0.00 vmulpd %xmm0,%xmm5,%xmm5
vmulpd %xmm0,%xmm6,%xmm6
vmulpd %xmm0,%xmm7,%xmm7
vaddpd (%r15),%xmm4,%xmm4
vaddpd 0x10(%r15),%xmm5,%xmm5
0.00 vaddpd (%r15,%r10,1),%xmm6,%xmm6
0.00 vaddpd 0x10(%r15,%r10,1),%xmm7,%xmm7
0.00 vmovups %xmm4,(%r15)
vmovups %xmm5,0x10(%r15)
0.00 vmovups %xmm6,(%r15,%r10,1)
vmovups %xmm7,0x10(%r15,%r10,1)
add $0x20,%r15
--
lea (%r8,%rax,8),%r8
69d8: mov 0x20(%rsp),%r14
0.00 test $0x1,%r14
↓ je 6d84
mov %r9,%r15
--
vbroadcastsd -0x28(%rsi),%ymm3
vfmadd231pd (%rdi),%ymm0,%ymm4
0.00 vfmadd231pd 0x20(%rdi),%ymm1,%ymm5
vfmadd231pd 0x40(%rdi),%ymm2,%ymm6
vfmadd231pd 0x60(%rdi),%ymm3,%ymm7
--
vmulpd %ymm0,%ymm4,%ymm4
vaddpd (%r15),%ymm4,%ymm4
0.00 vmovups %ymm4,(%r15)
add $0x20,%r15
dec %r11
--
mov %rbx,%rsp
mov (%rsp),%rbx
0.01 mov 0x8(%rsp),%rbp
mov 0x10(%rsp),%r12
mov 0x18(%rsp),%r13
Signed-off-by: Vijay Thakkar <vijaythakkar@me.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Kim Phillips <kim.phillips@amd.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Jon Grimm <jon.grimm@amd.com>
Cc: Martin Liška <mliska@suse.cz>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lore.kernel.org/lkml/20200318190002.307290-3-vijaythakkar@me.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
This patch changes the previous blanket detection of AMD Family 17h
processors to be more specific to Zen1 core based products only by
replacing model detection regex pattern [[:xdigit:]]+ with
([12][0-9A-F]|[0-9A-F]), restricting to models 0 though 2f only.
This change is required to allow for the addition of separate PMU events
for Zen2 core based models in the following patches as those belong to
family 17h but have different PMCs. Current PMU events directory has
also been renamed to "amdzen1" from "amdfam17h" to reflect this
specificity.
Note that although this change does not break PMU counters for existing
zen1 based systems, it does disable the current set of counters for zen2
based systems. Counters for zen2 have been added in the following
patches in this patchset.
Signed-off-by: Vijay Thakkar <vijaythakkar@me.com>
Acked-by: Kim Phillips <kim.phillips@amd.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Jon Grimm <jon.grimm@amd.com>
Cc: Martin Liška <mliska@suse.cz>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lore.kernel.org/lkml/20200318190002.307290-2-vijaythakkar@me.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/core
Pull perf/core improvements and fixes from Arnaldo Carvalho de Melo:
perf record:
Alexey Budankov:
- Fix binding of AIO user space buffers to nodes
maps:
Dominik b. Czarnota:
- Fix off by one in strncpy() size argument.
Arnaldo Carvalho de Melo:
- Use strstarts() to look for Android libraries.
Ian Rogers:
- Give synthetic mmap events an inode generation.
man pages:
Ian Rogers:
- Set man page date to last git commit.
perf test:
Ian Rogers:
- Print if shell directory isn't present.
perf report:
Jin Yao:
- Fix no branch type statistics report issue.
perf expr:
Jiri Olsa:
- Fix copy/paste mistake
vendor events:
Kan Liang:
- Support metric constraints.
vendor events intel:
Kan Liang:
- Add NO_NMI_WATCHDOG metric constraint.
vendor events s390:
Thomas Richter:
- Add new deflate counters for IBM z15.
ARM cs-etm:
Leo Yan:
- Last branch improvements.
intel-pt:
Adrian Hunter:
- Update intel-pt.txt file with new location of the documentation.
- Add Intel PT man page references.
- Rename intel-pt.txt and put it in man page format.
perl scripting:
Michael Petlan:
- Add common_callchain to fix argument order.
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Conflicts:
tools/perf/util/map.c
|
|
Add NO_NMI_WATCHDOG metric constraint to Page_Walks_Utilization for Sky Lake
and Cascade Lake.
Committer testing:
On a Lenovo T480S, Intel(R) Core(TM) i7-8650U Kaby Lake, that looking at x86's
mapfile.csv file is a:
$ grep -w skylake tools/perf/pmu-events/arch/x86/mapfile.csv
GenuineIntel-6-[4589]E,v24,skylake,core
$
So uses the constraint added in this patch in this file:
tools/perf/pmu-events/arch/x86/skylake/skl-metrics.json
Before:
# perf stat -a -M Page_Walks_Utilization sleep 2
Performance counter stats for 'system wide':
<not counted> itlb_misses.walk_pending (0.00%)
<not counted> dtlb_load_misses.walk_pending (0.00%)
<not counted> dtlb_store_misses.walk_pending (0.00%)
<not counted> ept.walk_pending (0.00%)
<not counted> cycles (0.00%)
2.001750514 seconds time elapsed
Some events weren't counted. Try disabling the NMI watchdog:
echo 0 > /proc/sys/kernel/nmi_watchdog
perf stat ...
echo 1 > /proc/sys/kernel/nmi_watchdog
The events in group usually have to be from the same PMU. Try reorganizing the group.
#
After:
# perf stat -a -M Page_Walks_Utilization sleep 2
Splitting metric group Page_Walks_Utilization into standalone metrics.
Try disabling the NMI watchdog to comply NO_NMI_WATCHDOG metric constraint:
echo 0 > /proc/sys/kernel/nmi_watchdog
perf stat ...
echo 1 > /proc/sys/kernel/nmi_watchdog
,
Performance counter stats for 'system wide':
36,883,102 itlb_misses.walk_pending # 0.1 Page_Walks_Utilization (79.99%)
123,104,146 dtlb_load_misses.walk_pending (80.02%)
13,720,795 dtlb_store_misses.walk_pending (79.99%)
0 ept.walk_pending (79.99%)
1,519,948,400 cycles (80.01%)
2.002170780 seconds time elapsed
#
Before and after, if we disable the nmi_watchdog we get:
# echo 0 > /proc/sys/kernel/nmi_watchdog
# perf stat -a -M Page_Walks_Utilization sleep 2
Performance counter stats for 'system wide':
33,721,658 itlb_misses.walk_pending # 0.1 Page_Walks_Utilization
84,070,996 dtlb_load_misses.walk_pending
9,816,071 dtlb_store_misses.walk_pending
0 ept.walk_pending
704,920,899 cycles
2.002331670 seconds time elapsed
#
More information about the metric expressions:
# perf stat -v -a -M Page_Walks_Utilization sleep 2
Using CPUID GenuineIntel-6-8E-A
metric expr ( itlb_misses.walk_pending + dtlb_load_misses.walk_pending + dtlb_store_misses.walk_pending + ept.walk_pending ) / ( 2 * cycles ) for Page_Walks_Utilization
found event itlb_misses.walk_pending
found event dtlb_load_misses.walk_pending
found event dtlb_store_misses.walk_pending
found event ept.walk_pending
found event cycles
adding {itlb_misses.walk_pending,dtlb_load_misses.walk_pending,dtlb_store_misses.walk_pending,ept.walk_pending,cycles}:W
-> cpu/umask=0x10,(null)=0x186a3,event=0x85/
-> cpu/umask=0x10,(null)=0x1e8483,event=0x8/
-> cpu/umask=0x10,(null)=0x1e8483,event=0x49/
-> cpu/umask=0x10,(null)=0x1e8483,event=0x4f/
itlb_misses.walk_pending: 8085772 16010162799 16010162799
dtlb_load_misses.walk_pending: 28134579 16010162799 16010162799
dtlb_store_misses.walk_pending: 7276535 16010162799 16010162799
ept.walk_pending: 2 16010162799 16010162799
cycles: 315140605 16010162799 16010162799
Performance counter stats for 'system wide':
8,085,772 itlb_misses.walk_pending # 0.1 Page_Walks_Utilization
28,134,579 dtlb_load_misses.walk_pending
7,276,535 dtlb_store_misses.walk_pending
2 ept.walk_pending
315,140,605 cycles
2.002333181 seconds time elapsed
#
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Acked-by: Jiri Olsa <jolsa@redhat.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Jin Yao <yao.jin@linux.intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Link: http://lore.kernel.org/lkml/1582581564-184429-6-git-send-email-kan.liang@linux.intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
A new field "MetricConstraint" is introduced in JSON event list.
Extend jevents to parse the field and save the value in
metric_constraint.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Acked-by: Jiri Olsa <jolsa@redhat.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Jin Yao <yao.jin@linux.intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Link: http://lore.kernel.org/lkml/1582581564-184429-2-git-send-email-kan.liang@linux.intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
Add support for new deflate counters:
- Counter 247: cycles CPU spent obtaining access to Deflate unit
- Counter 252: cycles CPU is using Deflate unit
- Counter 264: Increments by one for every DEFLATE CONVERSION CALL
instruction executed.
- Counter 265: Increments by one for every DEFLATE CONVERSION CALL
instruction executed that ended in Condition Codes
0, 1 or 2.
Also adjust the some crypto counter description to latest documentation.
Signed-off-by: Thomas Richter <tmricht@linux.ibm.com>
Reviewed-by: Sumanth Korikkar <sumanthk@linux.ibm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Vasily Gorbik <gor@linux.ibm.com>
Link: http://lore.kernel.org/lkml/20200310142937.32045-1-tmricht@linux.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
The memory for global pointer is never freed during normal program
execution, so let's do that in the main function exit as a good
programming practice.
A stray blank line is also removed.
Reported-by: Jiri Olsa <jolsa@redhat.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: James Clark <james.clark@arm.com>
Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
Cc: linuxarm@huawei.com
Link: http://lore.kernel.org/lkml/1583406486-154841-2-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
In 7fcfa9a2d9 an unintended prefix "Counter:18 Name:" was removed from
the description for L1D_RO_EXCL_WRITES, but the extra name remained in
the description. Remove it too.
Fixes: 7fcfa9a2d9a7 ("perf list: Fix s390 counter long description for L1D_RO_EXCL_WRITES")
Signed-off-by: Ed Maste <emaste@freebsd.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Greentime Hu <green.hu@gmail.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Nick Hu <nickhu@andestech.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Richter <tmricht@linux.ibm.com>
Cc: Vincent Chen <deanbo422@gmail.com>
Link: http://lore.kernel.org/lkml/20191212145346.5026-1-emaste@freefall.freebsd.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
The cf_z13 counter DTLB1_GPAGE_WRITES included a prefix
'Counter:132\tName:'.
This is incorrect; remove the prefix as with 7fcfa9a2d9 for cf_z14.
Signed-off-by: Ed Maste <emaste@freebsd.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Greentime Hu <green.hu@gmail.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Nick Hu <nickhu@andestech.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Richter <tmricht@linux.ibm.com>
Cc: Vincent Chen <deanbo422@gmail.com>
Link: http://lore.kernel.org/lkml/20191212143446.88582-1-emaste@freefall.freebsd.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
Kernel Utilization should divide ref cycles spent in kernel with total
ref cycles.
Signed-off-by: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Haiyan Song <haiyanx.song@intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Link: http://lore.kernel.org/lkml/20191204162121.29998-1-ravi.bangoria@linux.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
No functional change.
Remove extra commas in the power9 JSON files so that the files
can be parsed and validated by other utilities such as Python
that fail to parse invalid JSON.
Before:
$ diffstat -l -p1 /wb/1.patch | while read filename ; do echo $filename ; cat $filename | json_verify ; done
tools/perf/pmu-events/arch/powerpc/power9/cache.json
parse error: invalid object key (must be a string)
[ {, "EventCode": "0x300
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/powerpc/power9/floating-point.json
parse error: invalid object key (must be a string)
[ {, "EventCode": "0x141
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/powerpc/power9/frontend.json
parse error: invalid object key (must be a string)
[ {, "EventCode": "0x250
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/powerpc/power9/marked.json
parse error: invalid object key (must be a string)
[ {, "EventCode": "0x301
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/powerpc/power9/memory.json
parse error: invalid object key (must be a string)
[ {, "EventCode": "0x300
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/powerpc/power9/other.json
parse error: invalid object key (must be a string)
[ {, "EventCode": "0x308
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/powerpc/power9/pipeline.json
parse error: invalid object key (must be a string)
[ {, "EventCode": "0x4D0
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/powerpc/power9/pmc.json
parse error: invalid object key (must be a string)
[ {, "EventCode": "0x200
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/powerpc/power9/translation.json
parse error: invalid object key (must be a string)
[ {, "EventCode": "0x1E"
(right here) ------^
JSON is invalid
$
After:
$ diffstat -l -p1 /wb/1.patch | while read filename ; do echo $filename ; cat $filename | json_verify ; done
tools/perf/pmu-events/arch/powerpc/power9/cache.json
JSON is valid
tools/perf/pmu-events/arch/powerpc/power9/floating-point.json
JSON is valid
tools/perf/pmu-events/arch/powerpc/power9/frontend.json
JSON is valid
tools/perf/pmu-events/arch/powerpc/power9/marked.json
JSON is valid
tools/perf/pmu-events/arch/powerpc/power9/memory.json
JSON is valid
tools/perf/pmu-events/arch/powerpc/power9/other.json
JSON is valid
tools/perf/pmu-events/arch/powerpc/power9/pipeline.json
JSON is valid
tools/perf/pmu-events/arch/powerpc/power9/pmc.json
JSON is valid
tools/perf/pmu-events/arch/powerpc/power9/translation.json
JSON is valid
$
Signed-off-by: James Clark <james.clark@arm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Kevin Mooney <kevin.mooney@arm.com>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: Mamatha Inamdar <mamatha4@linux.vnet.ibm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Cc: nd@arm.com
Link: http://lore.kernel.org/lkml/20191112160342.26470-3-james.clark@arm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
No functional change.
Remove extra commas in the power8 JSON files so that the files
can be parsed and validated by other utilities such as Python
that fail to parse invalid JSON.
Committer testing:
Before:
$ diffstat -l -p1 /wb/1.patch | while read filename ; do echo $filename ; cat $filename | json_verify ; done
tools/perf/pmu-events/arch/powerpc/power8/cache.json
parse error: invalid object key (must be a string)
[ {, "EventCode": "0x4c0
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/powerpc/power8/floating-point.json
parse error: invalid object key (must be a string)
[ {, "EventCode": "0x200
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/powerpc/power8/frontend.json
parse error: invalid object key (must be a string)
[ {, "EventCode": "0x250
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/powerpc/power8/marked.json
parse error: invalid object key (must be a string)
[ {, "EventCode": "0x351
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/powerpc/power8/memory.json
parse error: invalid object key (must be a string)
[ {, "EventCode": "0x100
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/powerpc/power8/other.json
parse error: invalid object key (must be a string)
[ {, "EventCode": "0x1f0
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/powerpc/power8/pipeline.json
parse error: invalid object key (must be a string)
[ {, "EventCode": "0x100
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/powerpc/power8/pmc.json
parse error: invalid object key (must be a string)
[ {, "EventCode": "0x200
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/powerpc/power8/translation.json
parse error: invalid object key (must be a string)
[ {, "EventCode": "0x4c0
(right here) ------^
JSON is invalid
$
After:
$ diffstat -l -p1 /wb/1.patch | while read filename ; do echo $filename ; cat $filename | json_verify ; done
tools/perf/pmu-events/arch/powerpc/power8/cache.json
JSON is valid
tools/perf/pmu-events/arch/powerpc/power8/floating-point.json
JSON is valid
tools/perf/pmu-events/arch/powerpc/power8/frontend.json
JSON is valid
tools/perf/pmu-events/arch/powerpc/power8/marked.json
JSON is valid
tools/perf/pmu-events/arch/powerpc/power8/memory.json
JSON is valid
tools/perf/pmu-events/arch/powerpc/power8/other.json
JSON is valid
tools/perf/pmu-events/arch/powerpc/power8/pipeline.json
JSON is valid
tools/perf/pmu-events/arch/powerpc/power8/pmc.json
JSON is valid
tools/perf/pmu-events/arch/powerpc/power8/translation.json
JSON is valid
$
Signed-off-by: James Clark <james.clark@arm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Kevin Mooney <kevin.mooney@arm.com>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: Mamatha Inamdar <mamatha4@linux.vnet.ibm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Cc: nd@arm.com
Link: http://lore.kernel.org/lkml/20191112160342.26470-2-james.clark@arm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
No functional change.
Add and remove extra commas in the arm64 JSON files so that the files
can be parsed and validated by other utilities such as Python that fail
to parse invalid JSON.
Committer testing:
Before:
$ diffstat -l -p1 /wb/1.patch | while read filename ; do echo $filename ; cat $filename | json_verify ; done
tools/perf/pmu-events/arch/arm64/ampere/emag/branch.json
parse error: invalid object key (must be a string)
[ { "ArchStdEvent"
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/arm64/ampere/emag/bus.json
parse error: invalid object key (must be a string)
[ { "ArchStdEvent"
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json
parse error: invalid object key (must be a string)
[ { "ArchStdEvent"
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/arm64/ampere/emag/clock.json
parse error: unallowed token at this point in JSON text
[ { "PublicDescrip
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/arm64/ampere/emag/exception.json
parse error: invalid object key (must be a string)
[ { "ArchStdEvent"
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/arm64/ampere/emag/instruction.json
parse error: invalid object key (must be a string)
[ { "ArchStdEvent"
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/arm64/ampere/emag/intrinsic.json
parse error: invalid object key (must be a string)
[ { "ArchStdEvent"
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/arm64/ampere/emag/memory.json
parse error: invalid object key (must be a string)
[ { "ArchStdEvent"
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/arm64/ampere/emag/pipeline.json
parse error: unallowed token at this point in JSON text
[ { "PublicDescrip
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/arm64/arm/cortex-a53/branch.json
parse error: invalid object key (must be a string)
[ { "ArchStdEvent": "BR
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/arm64/arm/cortex-a53/bus.json
parse error: invalid object key (must be a string)
[ { "ArchStdEvent":
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/arm64/arm/cortex-a53/other.json
parse error: invalid object key (must be a string)
[ { "ArchStdEvent":
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/arm64/arm/cortex-a57-a72/core-imp-def.json
parse error: invalid object key (must be a string)
[ { "ArchStdEvent"
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/arm64/armv8-recommended.json
parse error: after array element, I expect ',' or ']'
[ { "PublicDescrip
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/arm64/cavium/thunderx2/core-imp-def.json
parse error: invalid object key (must be a string)
[ { "ArchStdEvent"
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/arm64/hisilicon/hip08/core-imp-def.json
parse error: invalid object key (must be a string)
[ { "ArchStdEvent"
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json
parse error: invalid object key (must be a string)
[ { "EventCode": "0x00
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json
parse error: invalid object key (must be a string)
[ { "EventCode": "0x00
(right here) ------^
JSON is invalid
tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json
parse error: invalid object key (must be a string)
[ { "EventCode": "0x00
(right here) ------^
JSON is invalid
$
After:
$ diffstat -l -p1 /wb/1.patch | while read filename ; do echo $filename ; cat $filename | json_verify ; done
tools/perf/pmu-events/arch/arm64/ampere/emag/branch.json
JSON is valid
tools/perf/pmu-events/arch/arm64/ampere/emag/bus.json
JSON is valid
tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json
JSON is valid
tools/perf/pmu-events/arch/arm64/ampere/emag/clock.json
JSON is valid
tools/perf/pmu-events/arch/arm64/ampere/emag/exception.json
JSON is valid
tools/perf/pmu-events/arch/arm64/ampere/emag/instruction.json
JSON is valid
tools/perf/pmu-events/arch/arm64/ampere/emag/intrinsic.json
JSON is valid
tools/perf/pmu-events/arch/arm64/ampere/emag/memory.json
JSON is valid
tools/perf/pmu-events/arch/arm64/ampere/emag/pipeline.json
JSON is valid
tools/perf/pmu-events/arch/arm64/arm/cortex-a53/branch.json
JSON is valid
tools/perf/pmu-events/arch/arm64/arm/cortex-a53/bus.json
JSON is valid
tools/perf/pmu-events/arch/arm64/arm/cortex-a53/other.json
JSON is valid
tools/perf/pmu-events/arch/arm64/arm/cortex-a57-a72/core-imp-def.json
JSON is valid
tools/perf/pmu-events/arch/arm64/armv8-recommended.json
JSON is valid
tools/perf/pmu-events/arch/arm64/cavium/thunderx2/core-imp-def.json
JSON is valid
tools/perf/pmu-events/arch/arm64/hisilicon/hip08/core-imp-def.json
JSON is valid
tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json
JSON is valid
tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json
JSON is valid
tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json
JSON is valid
$
Signed-off-by: James Clark <james.clark@arm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: John Garry <john.garry@huawei.com>
Cc: Kevin Mooney <kevin.mooney@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: nd@arm.com
Link: http://lore.kernel.org/lkml/20191112160342.26470-1-james.clark@arm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
New Metrics:
- DSB_Switches: fraction of cycles CPU was stalled due to switches from DSB to MITE pipeline [all]
- L2_Evictions_{Silent|NonSilent}_PKI: L2 {silent|non silent} ecivtions rate per Kilo instruction [SKX+]
- IpFarBranch - Instructions per Far Branch
Other Enhancements & fixes:
- KBLR/CFL & CLX move to separate columns (no column sharing via if #model)
- Re-organized/renamed Metric Group
Signed-off-by: Haiyan Song <haiyanx.song@intel.com>
Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Jin Yao <yao.jin@intel.com>
Link: http://lore.kernel.org/lkml/20191030082308.10919-1-haiyanx.song@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
Update CascadelakeX events to v1.05.
Other changes:
remove duplicated and without description events.
Signed-off-by: Haiyan Song <haiyanx.song@intel.com>
Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Jin Yao <yao.jin@intel.com>
Link: http://lore.kernel.org/lkml/20191030082308.10919-1-haiyanx.song@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
There are memory leaks and file descriptor resource leaks in
process_mapfile() and main().
Fix this by adding free(), fclose() and free_arch_std_events() on the
error paths.
Fixes: 80eeb67fe577 ("perf jevents: Program to convert JSON file")
Fixes: 3f056b66647b ("perf jevents: Make build fail on JSON parse error")
Fixes: e9d32c1bf0cd ("perf vendor events: Add support for arch standard events")
Signed-off-by: Yunfeng Ye <yeyunfeng@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Feilong Lin <linfeilong@huawei.com>
Cc: Hu Shiyuan <hushiyuan@huawei.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: John Garry <john.garry@huawei.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Luke Mujica <lukemujica@google.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Zenghui Yu <yuzenghui@huawei.com>
Link: http://lore.kernel.org/lkml/d7907042-ec9c-2bef-25b4-810e14602f89@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
There are some deprecated events listed by perf list. But we can't
remove them from perf list with ease because some old scripts may use
them.
Deprecated events are old names of renamed events. When an event gets
renamed the old name is kept around for some time and marked with
Deprecated. The newer Intel event lists in the tree already have these
headers.
So we need to keep them in the event list, but provide a new option to
show them. The new option is "--deprecated".
With this patch, the deprecated events are hidden by default but they
can be displayed when option "--deprecated" is enabled.
Signed-off-by: Jin Yao <yao.jin@linux.intel.com>
Acked-by: Jiri Olsa <jolsa@kernel.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Jin Yao <yao.jin@intel.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lore.kernel.org/lkml/20191015025357.8708-1-yao.jin@linux.intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
Add some more missing events.
A trivial typo is also fixed.
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
Cc: linuxarm@huawei.com
Link: http://lore.kernel.org/lkml/1567612484-195727-5-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
Add some more missing events.
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
Cc: linuxarm@huawei.com
Link: http://lore.kernel.org/lkml/1567612484-195727-4-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
Add some more missing events.
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
Cc: linuxarm@huawei.com
Link: http://lore.kernel.org/lkml/1567612484-195727-3-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
The "EventName" for the DDRC precharge command event is incorrect, so
fix it.
Fixes: 57cc732479ba ("perf jevents: Add support for Hisi hip08 DDRC PMU aliasing")
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
Cc: linuxarm@huawei.com
Link: http://lore.kernel.org/lkml/1567612484-195727-2-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
The Intel fixed counters use a special table to override the JSON
information.
During this override the period information from the JSON file got
dropped, which results in inst_retired.any and similar running with
frequency mode instead of a period.
Just specify the expected period in the table.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Link: http://lore.kernel.org/lkml/20190927233546.11533-2-andi@firstfloor.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
In the pmu-events directory for JSON file definitions use the
official machine name IBM z15 instead of machine type number
8561. This is consistent with previous machines.
Signed-off-by: Thomas Richter <tmricht@linux.ibm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Vasily Gorbik <gor@linux.ibm.com>
Link: http://lore.kernel.org/lkml/20190927081147.18345-2-tmricht@linux.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
Add s390 transaction counter definition for machine 8561. This is the
same file as for the predecessor machine.
Fixes: 6e67d77d673d ("perf vendor events s390: Add JSON files for machine type 8561")
Signed-off-by: Thomas Richter <tmricht@linux.ibm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Vasily Gorbik <gor@linux.ibm.com>
Link: http://lore.kernel.org/lkml/20190927081147.18345-1-tmricht@linux.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
This patch is to remove following hardware events
from JSON file which are not supported on POWER8.
pm_l3_p0_grp_pump
pm_l3_p0_lco_data
pm_l3_p0_lco_no_data
pm_l3_p0_lco_rty
Note: Unfortunately power8 event list is not publicly available.
Fixes: c3b4d5c4afb0 ("perf vendor events: Remove P8 HW events which are not supported")
Signed-off-by: Mamatha Inamdar <mamatha4@linux.vnet.ibm.com>
Acked-by: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lore.kernel.org/lkml/20190909065624.11956.3992.stgit@localhost.localdomain
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
Some grammatical fixes, and updates to some path references that have
since changed.
Signed-off-by: Kim Phillips <kim.phillips@amd.com>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Borislav Petkov <bp@suse.de>
Cc: Janakarajan Natarajan <janakarajan.natarajan@amd.com>
Cc: Jin Yao <yao.jin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Luke Mujica <lukemujica@google.com>
Cc: Martin Liška <mliska@suse.cz>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lore.kernel.org/lkml/20190919204306.12598-3-kim.phillips@amd.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
Remove the redundant '['.
'perf list' output before:
ex_ret_brn
[[Retired Branch Instructions]
'perf list' output after:
ex_ret_brn
[Retired Branch Instructions]
Fixes: 98c07a8f74f8 ("perf vendor events amd: perf PMU events for AMD Family 17h")
Signed-off-by: Kim Phillips <kim.phillips@amd.com>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Borislav Petkov <bp@suse.de>
Cc: Janakarajan Natarajan <janakarajan.natarajan@amd.com>
Cc: Jin Yao <yao.jin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Luke Mujica <lukemujica@google.com>
Cc: Martin Liška <mliska@suse.cz>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lore.kernel.org/lkml/20190919204306.12598-2-kim.phillips@amd.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
Allow users to symbolically specify L3 events for Family 17h processors
using the existing AMD Uncore driver.
Source of events descriptions are from section 2.1.15.4.1 "L3 Cache PMC
Events" of the latest Family 17h PPR, available here:
https://www.amd.com/system/files/TechDocs/55570-B1_PUB.zip
Opnly BriefDescriptions added, since they show with and without
the -v and --details flags.
Tested with:
# perf stat -e l3_request_g1.caching_l3_cache_accesses,amd_l3/event=0x01,umask=0x80/,l3_comb_clstr_state.request_miss,amd_l3/event=0x06,umask=0x01/ perf bench mem memcpy -s 4mb -l 100 -f default
...
7,006,831 l3_request_g1.caching_l3_cache_accesses
7,006,830 amd_l3/event=0x01,umask=0x80/
366,530 l3_comb_clstr_state.request_miss
366,568 amd_l3/event=0x06,umask=0x01/
Signed-off-by: Kim Phillips <kim.phillips@amd.com>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Borislav Petkov <bp@suse.de>
Cc: Janakarajan Natarajan <janakarajan.natarajan@amd.com>
Cc: Jin Yao <yao.jin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Luke Mujica <lukemujica@google.com>
Cc: Martin Liška <mliska@suse.cz>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lore.kernel.org/lkml/20190919204306.12598-1-kim.phillips@amd.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
The source of the event codes and description text was the Neoverse N1
technical reference manual at:
http://infocenter.arm.com/help/topic/com.arm.doc.100616_0301_01_en/neoverse_n1_trm_100616_0301_01_en.pdf
The Cortex-A76 shares the same event IDs as the Neoverse N1 and they
can be viewed at:
https://static.docs.arm.com/100798/0400/cortex_a76_trm_100798_0400_00_en.pdf
Signed-off-by: James Clark <james.clark@arm.com>
Cc: "linux-perf-users@vger.kernel.org" <linux-perf-users@vger.kernel.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Jeremy Linton <jeremy.linton@arm.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Suzuki Poulouse <suzuki.poulose@arm.com>
Cc: james clark <james.clark@arm.com>
Cc: nd <nd@arm.com>
Link: http://lore.kernel.org/lkml/20190902160713.1425-2-james.clark@arm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
Add a Intel event file for perf.
Signed-off-by: Haiyan Song <haiyanx.song@intel.com>
Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Jin Yao <yao.jin@intel.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/20190815035942.30602-1-haiyanx.song@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
Add a Intel event file for perf.
Signed-off-by: Haiyan Song <haiyanx.song@intel.com>
Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Jin Yao <yao.jin@intel.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: https://lkml.kernel.org/r/8859095e-5b02-d6b7-fbdc-3f42b714bae0@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
To get closer to upstream and check if we need to sync more UAPI
headers, pick up fixes for libbpf that prevent perf's container tests
from completing successfuly, etc.
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
The events defined in pmu-events JSON are parsed and added into perf
tool. For fixed counters, we handle the encodings between JSON and perf
by using a static array fixed[].
But the fixed[] has missed an important event "cpu_clk_unhalted.core".
For example, on the Tremont platform,
[root@localhost ~]# perf stat -e cpu_clk_unhalted.core -a
event syntax error: 'cpu_clk_unhalted.core'
\___ parser error
With this patch, the event cpu_clk_unhalted.core can be parsed.
[root@localhost perf]# ./perf stat -e cpu_clk_unhalted.core -a -vvv
------------------------------------------------------------
perf_event_attr:
type 4
size 112
config 0x3c
sample_type IDENTIFIER
read_format TOTAL_TIME_ENABLED|TOTAL_TIME_RUNNING
disabled 1
inherit 1
exclude_guest 1
------------------------------------------------------------
...
Signed-off-by: Jin Yao <yao.jin@linux.intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Jin Yao <yao.jin@intel.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/20190729072755.2166-1-yao.jin@linux.intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
|
|
Documentation source:
https://wiki.raptorcs.com/w/images/6/6b/POWER9_PMU_UG_v12_28NOV2018_pub.pdf
Signed-off-by: Michael Petlan <mpetlan@redhat.com>
Reviewed-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: Ananth N Mavinakayanahalli <ananth@linux.vnet.ibm.com>
Cc: Carl Love <cel@us.ibm.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Cc: Paul Clarke <pc@us.ibm.com>
Cc: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: linuxppc-dev@ozlabs.org
LPU-Reference: 20190719100837.7503-1-mpetlan@redhat.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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Add CPU measurement counter facility event description files (JSON) for
IBM machine types 8561 and 8562.
Signed-off-by: Thomas Richter <tmricht@linux.ibm.com>
Reviewed-by: Vasily Gorbik <gor@linux.ibm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Hendrik Brueckner <brueckner@linux.ibm.com>
Link: http://lkml.kernel.org/r/20190712123113.100882-1-tmricht@linux.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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To allow for destructors to check if they're operating on a object still
in a list, and to avoid going from use after free list entries into
still valid, or even also other already removed from list entries.
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Link: https://lkml.kernel.org/n/tip-deh17ub44atyox3j90e6rksu@git.kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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- Add a missing filter for the DRAM_Latency / DRAM_Parallel_Reads metrics
- Remove the useless PMM_* metrics from Skylake
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Link: http://lkml.kernel.org/r/20190628220737.13259-1-andi@firstfloor.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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Add support for Hisi hip08 L3C PMU aliasing.
The kernel driver is in drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Jiri Olsa <jolsa@kernel.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ben Hutchings <ben@decadent.org.uk>
Cc: Hendrik Brueckner <brueckner@linux.ibm.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Thomas Richter <tmricht@linux.ibm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1561732552-143038-5-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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Add support for Hisi hip08 HHA PMU aliasing.
The kernel driver is in drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Jiri Olsa <jolsa@kernel.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ben Hutchings <ben@decadent.org.uk>
Cc: Hendrik Brueckner <brueckner@linux.ibm.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Thomas Richter <tmricht@linux.ibm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1561732552-143038-4-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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Add support for Hisi hip08 DDRC PMU aliasing. We can now do something like
this:
$perf list
[snip]
uncore ddrc:
uncore_hisi_ddrc.act_cmd
[DDRC active commands. Unit: hisi_sccl,ddrc]
uncore_hisi_ddrc.flux_rcmd
[DDRC read commands. Unit: hisi_sccl,ddrc]
uncore_hisi_ddrc.flux_wcmd
[DDRC write commands. Unit: hisi_sccl,ddrc]
uncore_hisi_ddrc.flux_wr
[DDRC precharge commands. Unit: hisi_sccl,ddrc]
uncore_hisi_ddrc.rnk_chg
[DDRC rank commands. Unit: hisi_sccl,ddrc]
uncore_hisi_ddrc.rw_chg
[DDRC read and write changes. Unit: hisi_sccl,ddrc]
Performance counter stats for 'system wide':
0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl1_ddrc0]
0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl3_ddrc1]
0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl5_ddrc2]
0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl7_ddrc3]
0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl5_ddrc0]
0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl7_ddrc1]
0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl1_ddrc3]
0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl1_ddrc1]
0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl3_ddrc2]
0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl5_ddrc3]
0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl3_ddrc0]
0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl5_ddrc1]
0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl7_ddrc2]
0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl7_ddrc0]
20,421 uncore_hisi_ddrc.flux_rcmd [hisi_sccl1_ddrc2]
0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl3_ddrc3]
1.001559011 seconds time elapsed
The kernel driver is in drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Jiri Olsa <jolsa@kernel.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ben Hutchings <ben@decadent.org.uk>
Cc: Hendrik Brueckner <brueckner@linux.ibm.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Thomas Richter <tmricht@linux.ibm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1561732552-143038-3-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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