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path: root/include/soc/tegra/bpmp-abi.h
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2018-11-08soc/tegra: bpmp: Update ABI headerTimo Alho
Update the firmware header file to a more recent version. The major changes in the new version are: * add a new MRQ for firmware version query ABI and deprecates the old * add ABI to query Tegra194 CPU frequency limits * add ABI to control subset of PCIE UPHY state The new header contains also some editorial changes to the documentation. Signed-off-by: Timo Alho <talho@nvidia.com> Acked-by: Sivaram Nair <sivaramn@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-06-13soc/tegra: bpmp: Update ABI headerThierry Reding
Update the BPMP ABI header to a more recent version. The new version adds support for a new powergating ABI as well as access to the ring buffer console, which allows debug messages to be output to the BPMP debug console. Some of the previously undocumented fields have been documented and missing bitmasks have been added. Furthermore the MRQ_RESET request now has a sub-command that allows to determine the maximum ID which in turn allows the resets to be enumerated, thereby allowing drivers to become agnostic of the Tegra generation. Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-18firmware: tegra: Add BPMP supportThierry Reding
The Boot and Power Management Processor (BPMP) is a co-processor found on Tegra SoCs. It is designed to handle the early stages of the boot process and offload power management tasks (such as clocks, resets, powergates, ...) as well as system control services. Compared to the ARM SCPI, the services provided by BPMP are message- based rather than method-based. The BPMP firmware driver provides the services to transmit data to and receive data from the BPMP. Users can also register a Message ReQuest (MRQ), for which a service routine will be run when a corresponding event is received from the firmware. A set of messages, called the BPMP ABI, are specified for a number of different services provided by the BPMP (such as clocks or resets). Based on work by Sivaram Nair <sivaramn@nvidia.com> and Joseph Lo <josephl@nvidia.com>. Signed-off-by: Thierry Reding <treding@nvidia.com>