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2023-02-06Merge branch 'icc-ip0-migration' into icc-nextGeorgi Djakov
Commits 2f3724930eb4 ("interconnect: qcom: sc7180: Drop IP0 interconnects") and 2fb251c26560 ("interconnect: qcom: sdx55: Drop IP0 interconnects") removed IP0 interconnects (and ipa-virt devices support) in favour of the RPMH clocks. Follow this example for other platforms defining IP0 RPMH resource. While we are at it, remove several leftover from the mentioned patches. * icc-ip0-migration: interconnect: qcom: sdx55: drop IP0 remnants interconnect: qcom: sc7180: drop IP0 remnants interconnect: move ignore_list out of of_count_icc_providers() interconnect: qcom: sm8150: Drop IP0 interconnects interconnect: qcom: sm8250: Drop IP0 interconnects interconnect: qcom: sc8180x: Drop IP0 interconnects interconnect: qcom: sc8280xp: Drop IP0 interconnects dt-bindings: interconnect: qcom: Remove ipa-virt compatibles dt-bindings: interconnect: qcom: drop IPA_CORE related defines Link: https://lore.kernel.org/r/20230109002935.244320-1-dmitry.baryshkov@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-02-06Merge tag 'ti-k3-dt-for-v6.3' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/dt TI K3 device tree updates for v6.3 New features: J784S4 SoC and EVM support AM68 and AM69 StarterKit, phyBOARD-Electra-AM642, Siemens IoT2050 M.2 AM62A7 SK additional peripherals AM62 SK USB support Non critical fixes AM62: McSPI Clock ID fixes MMC TAP value updates J7200: pinmux range update All: Cache DT node fixes Cleanups: Reorder dts Makefile entries alphabetically * tag 'ti-k3-dt-for-v6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (25 commits) arm64: dts: ti: Makefile: Rearrange entries alphabetically arch: arm64: dts: Add support for AM69 Starter Kit dt-bindings: arm: ti: Add binding for AM69 Starter Kit arm64: dts: ti: iot2050: Add support for M.2 variant dt-bindings: arm: ti: Add binding for Siemens IOT2050 M.2 variant arm64: dts: ti: iot2050: Add layout of OSPI flash arm64: dts: ti: k3-j7200: Fix wakeup pinmux range arm64: dts: ti: k3-am68-sk: Add support for AM68 SK base board arm64: dts: ti: Add initial support for AM68 SK System on Module dt-bindings: arm: ti: Add binding for AM68 SK arm64: dts: Update cache properties for ti arm64: dts: ti: Add support for phyBOARD-Electra-AM642 dt-bindings: arm: ti: Add bindings for PHYTEC AM64x based hardware arm64: dts: ti: k3-am62a7-sk: Enable USB1 node arm64: dts: ti: k3-am62a7-sk: Enable ethernet port arm64: dts: ti: k3-am62a-main: Add more peripheral nodes arm64: dts: ti: k3-am62a-mcu: Add MCU domain peripherals arm64: dts: ti: Add support for J784S4 EVM board arm64: dts: ti: Add initial support for J784S4 SoC dt-bindings: pinctrl: k3: Introduce pinmux definitions for J784s4 ... Link: https://lore.kernel.org/r/642cf238-43e5-d6fa-68b5-a9dfbc0277bf@ti.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-02-03Merge tag 'v6.2-next-soc' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into soc/drivers Introduce MediaTek regulator coupler driver to ensure that the SRAM voltage in par with the GPU voltage. This allows for a stable use of the GPU. mtk-mutex: - add support for MT8188 vdosys0 path - allow it to be build as module - add support for MT8195 vdosys1 path mmsys: - add MT8188 vdosys0 path - allow to be build as a module - add MT8195 vdosys1 path - add support for CMDQ - allow for up to 64 reset bits - add supprot for the MT8195 vppsys[0,1] pathes pm-domains: - keep power for the MT8186 ADSP on by default - add support for MT8188 - add support for buck isolation needed in specific pm-domains for MT8188 and MT8192 mtk-svs: - enable IRQ later to allow using kexec - several improvments on the code base - fix modalias pmic wrapper: - convert binding to yaml. As this is thightly coupled to the MT6357 PMIC, I took patches regarding it as well. * tag 'v6.2-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (41 commits) soc: mediatek: mtk-svs: add missing MODULE_DEVICE_TABLE soc: mediatek: mtk-devapc: Switch to devm_clk_get_enabled() soc: mtk-svs: mt8183: refactor o_slope calculation soc: mediatek: mtk-svs: delete superfluous platform data entries soc: mediatek: mtk-svs: move svs_platform_probe into probe soc: mediatek: mtk-svs: improve readability of platform_probe soc: mediatek: mtk-svs: clean up platform probing soc: mediatek: mtk-svs: keep svs alive if CONFIG_DEBUG_FS not supported soc: mediatek: mtk-svs: Use pm_runtime_resume_and_get() in svs_init01() soc: mediatek: mtk-svs: reset svs when svs_resume() fail soc: mediatek: mtk-svs: restore default voltages when svs_init02() fail soc: mediatek: mmsys: add support for MT8195 VPPSYS dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS soc: mediatek: Introduce mediatek-regulator-coupler driver soc: mediatek: mtk-svs: Enable the IRQ later soc: mediatek: add mtk-mutex support for mt8195 vdosys1 soc: mediatek: add mtk-mutex component - dp_intf1 soc: mediatek: mmsys: add reset control for MT8195 vdosys1 soc: mediatek: mmsys: add mmsys for support 64 reset bits soc: mediatek: add cmdq support of mtk-mmsys config API for mt8195 vdosys1 ... Link: https://lore.kernel.org/r/396d51fc-81f3-4a2b-d7a7-b966bfe3002a@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-01-31Merge branch '20230112204446.30236-2-quic_molvera@quicinc.com' into ↵Bjorn Andersson
arm64-for-6.3 Merge DT binding in order to get GCC clock defines.
2023-01-31Merge branch 'icc-qdu1000-immutable' of ↵Bjorn Andersson
https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into HEAD Merge DT binding to gain interconnect defines.
2023-01-31clk: imx6ul: add ethernet refclock mux supportOleksij Rempel
Add ethernet refclock mux support and set it to internal clock by default. This configuration will not affect existing boards. clock tree before this patch: fec1 <- enet1_ref_125m (gate) <- enet1_ref (divider) <-, |- pll6_enet fec2 <- enet2_ref_125m (gate) <- enet2_ref (divider) <-´ after this patch: fec1 <- enet1_ref_sel(mux) <- enet1_ref_125m (gate) <- ... `--<> enet1_ref_pad |- pll6_enet fec2 <- enet2_ref_sel(mux) <- enet2_ref_125m (gate) <- ... `--<> enet2_ref_pad Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Acked-by: Lee Jones <lee@kernel.org> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20230131084642.709385-17-o.rempel@pengutronix.de
2023-01-31clk: imx6ul: fix enet1 gate configurationOleksij Rempel
According to the "i.MX 6UltraLite Applications Processor Reference Manual, Rev. 2, 03/2017", BIT(13) is ENET1_125M_EN which is not controlling root of PLL6. It is controlling ENET1 separately. So, instead of this picture (implementation before this patch): fec1 <- enet_ref (divider) <---------------------------, |- pll6_enet (gate) fec2 <- enet2_ref_125m (gate) <- enet2_ref (divider) <-´ we should have this one (after this patch): fec1 <- enet1_ref_125m (gate) <- enet1_ref (divider) <-, |- pll6_enet fec2 <- enet2_ref_125m (gate) <- enet2_ref (divider) <-´ With this fix, the RMII reference clock will be turned off, after setting network interface down on each separate interface (ip l s dev eth0 down). Which was not working before, on system with both FECs enabled. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20230131084642.709385-16-o.rempel@pengutronix.de
2023-01-31clk: imx6q: add ethernet refclock mux supportOleksij Rempel
Add ethernet refclock mux support and set it to internal clock by default. This configuration will not affect existing boards since machine code currently overwrites this default. The machine code will be fixed in a separate patch. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20230131084642.709385-3-o.rempel@pengutronix.de
2023-01-30dt-bindings: clock: mediatek: add mt7981 clock IDsDaniel Golle
Add MT7981 clock dt-bindings, include topckgen, apmixedsys, infracfg, and ethernet subsystem clocks. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com> Signed-off-by: Daniel Golle <daniel@makrotopia.org> Link: https://lore.kernel.org/r/e353d32b5a4481766519a037afe1ed44e31ece1a.1674703830.git.daniel@makrotopia.org Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-01-30Merge tag 'amlogic-arm64-dt-for-v6.3' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/dt Amlogic ARM64 DT changes for v6.3: - Merge of immutable bindings branch with Reset & power domain binding - New boards: - Odroid-N2L (Smaller version of Odroid-N2+) - BananaPi M2-Pro (Variant of BPI=M5 with on-board wifi) - Radxa Zero2 (New version of Radza Zero with A311D SoC) - Add DT node for the VIPNano-QI on the A311D - DT bindings fixups covering all SoC families - MAC address nodes - ethernet PHY node name - scpi & child node names - SD/SDIO node name - USB supply name - invalid clock-names - rng node name - rtc node name - ETH phy mux node name - button & adc keys node name - leds node names - RK818 pmic properties - remove CPU opps below 1GHz for G12A boards, like it was done for G12B/SM1 - Fix WiFi/Bt definition around P212 & Khadas VIM1 - Add audio node to P212 - Fix FAN trip definition to Odroid-HC4 - Fix gpio-fan gpios definition - Permit Radxa Zero OTG on USB1 - Fix VDDIO_C enable gpio by using OPEN DRAIN flag * tag 'amlogic-arm64-dt-for-v6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: (43 commits) arm64: dts: meson: add support for Radxa Zero2 dt-bindings: arm: amlogic: add support for Radxa Zero2 arm64: dts: meson: add support for BananaPi M2-Pro dt-bindings: arm: amlogic: add support for BananaPi M2-Pro arm64: dts: meson: bananapi-m5: convert dts to dtsi arm64: dts: meson: bananapi-m5: remove redundant status from sound node arm64: dts: meson: bananapi-m5: switch VDDIO_C pin to OPEN_DRAIN arm64: dts: meson: radxa-zero: allow usb otg mode arm64: dts: meson-gxm-khadas-vim2: use gpio-fan matrix instead of an array arm64: dts: meson-g12b-odroid: Add initial support for Hardkernel ODROID-N2L arm64: dts: meson-g12b: move common node into new odroid.dtsi dt-bindings: arm: amlogic: document Odroid-N2L arm64: dts: amlogic: meson-sm1-odroid-hc4: fix active fan thermal trip arm64: dts: meson: add audio playback to S905X-P212 dts arm64: dts: meson: remove WiFi/BT nodes from Khadas VIM1 arm64: dts: meson: move pwm_ef node in P212 dtsi arm64: dts: meson: add Broadcom WiFi to P212 dtsi arm64: dts: amlogic: meson-g12b-odroid-go-ultra: fix rk818 pmic properties arm64: dts: amlogic: meson-gxbb-kii-pro: fix led node name arm64: dts: amlogic: meson-gxl-s905d-phicomm-n1: fix led node name ... Link: https://lore.kernel.org/r/c1641ffd-71c9-9ac9-89d9-c22da4acea10@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-01-30Merge tag 'amlogic-drivers-for-v6.3' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/drivers Amlogic Drivers changes for v6.3: - Merge of immutable bindings branch with Reset & power domain binding - Addition of NNA power domain for A311D SoC - meson_sm.txt conversionto dt-schema - mark amlogic,meson-gx-pwrc bindings as deprecated - fix of meson_sm driver by using NULL instead of 0 * tag 'amlogic-drivers-for-v6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: firmware: meson_sm: stop using 0 as NULL pointer dt-bindings: power: amlogic,meson-gx-pwrc: mark bindings as deprecated dt-bindings: firmware: convert meson_sm.txt to dt-schema soc: amlogic: meson-pwrc: Add NNA power domain for A311D dt-bindings: power: Add G12A NNA power domain dt-bindings: reset: meson-g12a: Add missing NNA reset Link: https://lore.kernel.org/r/ec9552d8-96df-a677-ab94-9723f5c30f1c@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-01-30Merge tag 'sunxi-drivers-for-6.3-1' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/drivers - introduce Allwinner PPU driver - limit iteration in sram debugfs * tag 'sunxi-drivers-for-6.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: soc: sunxi: Add Allwinner D1 PPU driver dt-bindings: power: Add Allwinner D1 PPU soc: sunxi: sram: Only iterate over SRAM children Link: https://lore.kernel.org/r/Y9RXXATRNqEv0GJT@jernej-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-01-30Merge tag 'riscv-soc-for-v6.3-mw0' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers RISC-V SoC drivers for v6.3-mw0 It's all StarFive stuff this time: Their new JH7110 SoC uses a SiFive core complex, and therefore a SiFive cache controller too. That needed a compatible added to both the binding and driver. The JH7110 also has power domains, which are supported by a new driver and a corresponding dt-binding. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-soc-for-v6.3-mw0' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: soc: starfive: Add StarFive JH71XX pmu driver dt-bindings: power: Add starfive,jh7110-pmu soc: sifive: ccache: Add StarFive JH7110 support dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC Link: https://lore.kernel.org/r/Y9LNIm9pkr+Owv/e@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-01-29dt-bindings: imx8ulp: clock: no spaces before tabsMarcel Ziswiler
This fixes the following warnings: include/dt-bindings/clock/imx8ulp-clock.h:204: warning: please, no space before tabs include/dt-bindings/clock/imx8ulp-clock.h:215: warning: please, no space before tabs Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20230119085421.102804-3-marcel@ziswiler.com
2023-01-29clk: imx6sll: add proper spdx license identifierMarcel Ziswiler
This fixes the following error: include/dt-bindings/clock/imx6sll-clock.h:1: warning: Improper SPDX comment style for 'include/dt-bindings/clock/imx6sll-clock.h', please use '/*' instead include/dt-bindings/clock/imx6sll-clock.h:1: warning: Missing or malformed SPDX-License-Identifier tag in line 1 Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20230119085421.102804-2-marcel@ziswiler.com
2023-01-27dt-bindings: power: Add Allwinner D1 PPUSamuel Holland
The Allwinner D1 family of SoCs contain a PPU power domain controller separate from the PRCM. It can power down the video engine and DSP, and it contains special logic for hardware-assisted CPU idle. Other recent Allwinner SoCs (e.g. TV303) have a PPU with a different set of domains. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20230126063419.15971-2-samuel@sholland.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-01-25dt-bindings: reset: mt8195: add vdosys1 reset control bitNancy.Lin
Add vdosys1 reset control bit for MT8195 platform. Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com> Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230113104434.28023-3-nancy.lin@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-20dt-bindings: power: Add starfive,jh7110-pmuWalker Chen
Add bindings for the Power Management Unit on the StarFive JH7110 SoC. Signed-off-by: Walker Chen <walker.chen@starfivetech.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-01-19dt-bindings: interconnect: qcom: document the interconnects for sa8775pBartosz Golaszewski
Add a DT binding document for the RPMh interconnects on Qualcomm sa8775p platforms. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230118140825.242544-2-brgl@bgdev.pl Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-01-19dt-bindings: interconnect: add sdm670 interconnectsRichard Acayan
There are controllable interconnects on Snapdragon 670. Add the compatible strings to the documentation and interconnect ID definitions. The device tree header was generated by linux-interconnect-driver-generator and the copyright year was changed. Signed-off-by: Richard Acayan <mailingradian@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230111005155.50452-2-mailingradian@gmail.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-01-19dt-bindings: power: Add MT8188 power domainsGarmin.Chang
Add power domains dt-bindings for MT8188. Signed-off-by: Garmin.Chang <Garmin.Chang@mediatek.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221223080553.9397-2-Garmin.Chang@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-18Revert "dt-bindings: power: rpmpd: Add SM4250 support"Konrad Dybcio
SM4250 and SM6115 use a shared device tree and the RPMPDs are identical. There's no need for a separate entry, so remove it. This reverts commit 45ac44ed10e58cf9b510e6552317ed7d2602346f. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230113152232.2624545-2-konrad.dybcio@linaro.org
2023-01-18Merge branch '20230112204446.30236-2-quic_molvera@quicinc.com' into HEADBjorn Andersson
2023-01-18dt-bindings: clock: Add QDU1000 and QRU1000 GCC clocksMelody Olvera
Add device tree bindings for global clock controller on QDU1000 and QRU1000 SoCs. Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230112204446.30236-2-quic_molvera@quicinc.com
2023-01-18dt-bindings: clock: qcom,gcc-apq8084: add GCC_MMSS_GPLL0_CLK_SRCDmitry Baryshkov
Add GCC_MMSS_GPLL0_CLK_SRC, the branch clock gating gpll0 clock for the multimedia subsystem. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230111060402.1168726-3-dmitry.baryshkov@linaro.org
2023-01-18Merge branch ↵Bjorn Andersson
'20230103-topic-sm8550-upstream-dispcc-v3-1-8a03d348c572@linaro.org' into HEAD Merge the DT binding in order to get the dispcc include file.
2023-01-18dt-bindings: clock: document SM8550 DISPCC clock controllerNeil Armstrong
Document device tree bindings for display clock controller for Qualcomm SM8550 SoC. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230103-topic-sm8550-upstream-dispcc-v3-1-8a03d348c572@linaro.org
2023-01-18dt-bindings: arm: qcom,ids: Add a bunch of older SoCsStephan Gerhold
Sync the SoC IDs in qcom,ids.h with relevant entries from Qualcomm's LK bootloader [1] that is used for almost all older Qualcomm SoCs. Several of these are already supported, e.g.: - MSM8960 -> APQ8060, MSM8260, ... - MSM8976 -> APQ8076 - MSM8956 -> APQ8056 Others are currently being worked on, e.g.: - MSM8909(W) -> APQ8009(W), MSM8905, MSM8209, ... - MSM8939 -> MSM8239, ... And even all remaining ones added are close enough to what is already supported so that future support is realistic (if someone steps up to do the work). Add all of them at once to avoid having to add them one by one in the future. This will also benefit other projects making use of the same dt-bindings, e.g. bootloaders where adding support for all these SoCs is a bit easier than on Linux. [1]: https://git.codelinaro.org/clo/la/kernel/lk/-/blob/9d563e4a1d38c5a662bf94215ffc828db57c9e19/platform/msm_shared/smem.h#L286 Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230104115348.25046-4-stephan@gerhold.net
2023-01-18dt-bindings: arm: qcom,ids: Add QRD board IDStephan Gerhold
QRD (Qualcomm Reference Design) = 0xb = 11 is used on many devices that were originally derived from some reference design provided by Qualcomm. Examples of existing devices in Linux would be: - msm8916-longcheer-l8150/l8910, msm8916-wingtech-wt88047 - msm8953-xiaomi-daisy/tissot/vince - msm8998-fxtec-pro1 - sm4250-oneplus-billie2 Add it to qcom,ids.h so the qcom,board-id properties can be rewritten more clearly using the macros in a future patch set, i.e. qcom,board-id = <QCOM_BOARD_ID(QRD, 1, 0) 0> instead of qcom,board-id = <0x1000b 0x00> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230104115348.25046-3-stephan@gerhold.net
2023-01-18dt-bindings: clock: Add Qualcomm SA8775P GCCBartosz Golaszewski
Add DT bindings for the GCC clock on SA8775P platforms. Add relevant DT include definitions as well. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230117180429.305266-2-brgl@bgdev.pl
2023-01-18dt-bindings: interconnect: qcom: drop IPA_CORE related definesDmitry Baryshkov
These interconnects are modeled as clks, not interconnects, therefore remove corresponding defines from the binding as they're unused. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230109002935.244320-10-dmitry.baryshkov@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-01-17dt-binding: gpio: publish binding IDs under dual licenseEtienne Carriere
Changes gpio.h DT binding header file to be published under GPLv2 or BSD-2-Clause license terms. This change allows this GPIO generic bindings header file to be used in software components as bootloaders and OSes that are not published under GPLv2 terms. All contributors to gpio.h file in copy. Cc: Stephen Warren <swarren@nvidia.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Laxman Dewangan <ldewangan@nvidia.com> Cc: Andrew Jeffery <andrew@aj.id.au> Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Cc: Nuno Sá <nuno.sa@analog.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Nuno Sá <nuno.sa@analog.com> Acked-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220905145555.674800-1-etienne.carriere@linaro.org Signed-off-by: Rob Herring <robh@kernel.org>
2023-01-16ARM: s3c: remove all s3c24xx supportArnd Bergmann
The platform was deprecated in commit 6a5e69c7ddea ("ARM: s3c: mark as deprecated and schedule removal") and can be removed. This includes all files that are exclusively for s3c24xx and not shared with s3c64xx, as well as the glue logic in Kconfig and the maintainer file entries. Cc: Arnaud Patard <arnaud.patard@rtp-net.org> Cc: Ben Dooks <ben-linux@fluff.org> Cc: Christer Weinigel <christer@weinigel.se> Cc: Guillaume GOURAT <guillaume.gourat@nexvision.tv> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Simtec Linux Team <linux@simtec.co.uk> Cc: openmoko-kernel@lists.openmoko.org Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-01-15dt-bindings: pinctrl: k3: Introduce pinmux definitions for J784s4Apurva Nandan
Add pinctrl macros for J784s4 SoC. These macro definitions are similar to that of J721s2, but adding new definitions to avoid any naming confusions in the soc dts files. checkpatch insists the following error exists: ERROR: Macros with complex values should be enclosed in parentheses However, we do not need parentheses enclosing the values for this macro as we do intend it to generate two separate values as has been done for other similar platforms. Signed-off-by: Hari Nagalla <hnagalla@ti.com> Signed-off-by: Apurva Nandan <a-nandan@ti.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20230112142725.77785-3-a-nandan@ti.com
2023-01-10Merge branch '20230109130523.298971-3-konrad.dybcio@linaro.org' into ↵Bjorn Andersson
drivers-for-6.3
2023-01-10dt-bindings: firmware: qcom: scm: Separate VMIDs from header to bindingsKonrad Dybcio
The SCM VMIDs represent predefined mappings that come from the irreplaceable and non-omittable firmware that comes with every Qualcomm SoC (unless you steal engineering samples from the factory) and help clarify otherwise totally magic numbers which we are required to pass to the secure world for some parts of the SoC to work at all (with modem being the prime example). On top of that, with changes to the rmtfs binding, secure VMIDs will become useful to have in device trees for readability. Separate them out and add to include/dt-bindings. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230109130523.298971-3-konrad.dybcio@linaro.org
2023-01-10dt-bindings: clock: qcom: gcc-sm8450: drop test clockDmitry Baryshkov
The test clock apparently it's not used by anyone upstream. Remove it. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221228185237.3111988-8-dmitry.baryshkov@linaro.org
2023-01-10dt-bindings: clock: qcom: gcc-sm8350: drop test clockDmitry Baryshkov
The test clock apparently it's not used by anyone upstream. Remove it. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221228185237.3111988-7-dmitry.baryshkov@linaro.org
2023-01-10Merge branch '20230104093450.3150578-2-abel.vesa@linaro.org' into arm64-for-6.3Bjorn Andersson
Merge the TCSR clock binding, to gain the Devicetree include file.
2023-01-10dt-bindings: clock: Add SM8550 TCSR CC clocksAbel Vesa
Add bindings documentation for clock TCSR driver on SM8550. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230104093450.3150578-2-abel.vesa@linaro.org
2023-01-10Merge branch 'icc-sm8550-immutable' of ↵Bjorn Andersson
https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into arm64-for-6.3 Merge the immutable SM8550 interconnect branch, to gain the include file from the binding.
2023-01-10dt-bindings: clock: document SM8550 DISPCC clock controllerNeil Armstrong
Document device tree bindings for display clock controller for Qualcomm SM8550 SoC. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230103-topic-sm8550-upstream-dispcc-v3-1-8a03d348c572@linaro.org
2023-01-10dt-bindings: power: qcom,rpmpd: document sa8775pBartosz Golaszewski
Add a compatible for sa8775p platforms and relevant defines to the include file. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230109174511.1740856-14-brgl@bgdev.pl
2023-01-08dt-bindings: clock: Add D1 CAN bus gates and resetsSamuel Holland
The D1 CCU contains gates and resets for two CAN buses. While the CAN bus controllers are only documented for the T113 SoC, the CCU is the same across all SoC variants. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221231231429.18357-6-samuel@sholland.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-01-06dt-bindings: clock: Add SM8550 TCSR CC clocksAbel Vesa
Add bindings documentation for clock TCSR driver on SM8550. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230104093450.3150578-2-abel.vesa@linaro.org
2023-01-05Merge branch 'icc-qdu1000' into icc-nextGeorgi Djakov
Add dt bindings and driver support for the Qualcomm QDU1000 and QRU1000 SoCs. The Qualcomm Technologies, Inc. Distributed Unit 1000 and Radio Unit 1000 are new SoCs meant for enabling Open RAN solutions. See more at https://www.qualcomm.com/content/dam/qcomm-martech/dm-assets/documents/qualcomm_5g_ran_platforms_product_brief.pdf Link: https://lore.kernel.org/r/20221216230914.21771-1-quic_molvera@quicinc.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-01-05dt-bindings: interconnect: Add QDU1000/QRU1000 devicesMelody Olvera
Add separate schema for QDU1000 and QRU1000 interconnect devices to document the different NoCs on these platforms. Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221216230914.21771-2-quic_molvera@quicinc.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-01-02dt-bindings: power: Add G12A NNA power domainTomeu Vizoso
Add define for the NNA power domain for the NPU in the G12A. Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Acked-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/20221202115223.39051-3-tomeu.vizoso@collabora.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-01-02dt-bindings: reset: meson-g12a: Add missing NNA resetTomeu Vizoso
Doesn't appear in the TRM I have, but it is used by the downstream galcore driver. Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Acked-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/20221202115223.39051-2-tomeu.vizoso@collabora.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2022-12-29dt-bindings: interconnect: Add Qualcomm SM8550Abel Vesa
The Qualcomm SM8550 SoC has several bus fabrics that could be controlled and tuned dynamically according to the bandwidth demand. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221202232054.2666830-2-abel.vesa@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2025-08-03 15:34:14 +0000