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2023-07-04Merge tag 'clk-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull more clk updates from Stephen Boyd: "Another set of clk driver updates and fixes for the merge window. The driver updates needed more time to bake in linux-next. Updates: - Support for more clk controllers in Qualcomm SoCs such as SM8350, SM8450, SDX75, SC8280XP, and IPQ9574 - Runtime PM enablement of some more Qualcomm clk controllers - Various fixes to Qualcomm clk driver data to use correct clk_ops and to check halt bits properly - AT91 updates to modernize with clk_parent_data structures Fixes: - Remove 'syscon' from dt binding fix for ti,j721e-system-controller - Fix determine rate in the Tegra driver that got wrecked by the refactorting of muxes this merge window" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (69 commits) clk: tegra: Avoid calling an uninitialized function dt-bindings: mfd: ti,j721e-system-controller: Remove syscon from example clk: at91: sama7g5: s/ep_chg_chg_id/ep_chg_id clk: at91: sama7g5: switch to parent_hw and parent_data clk: at91: sckc: switch to parent_data/parent_hw clk: at91: clk-sam9x60-pll: add support for parent_hw clk: at91: clk-utmi: add support for parent_hw clk: at91: clk-system: add support for parent_hw clk: at91: clk-programmable: add support for parent_hw clk: at91: clk-peripheral: add support for parent_hw clk: at91: clk-master: add support for parent_hw clk: at91: clk-generated: add support for parent_hw clk: at91: clk-main: add support for parent_data/parent_hw clk: qcom: gcc-sc8280xp: Add runtime PM clk: qcom: gpucc-sc8280xp: Add runtime PM clk: qcom: mmcc-msm8974: fix MDSS_GDSC power flags clk: qcom: gpucc-sm6375: Enable runtime pm dt-bindings: clock: sm6375-gpucc: Add VDD_GX clk: qcom: gcc-sm6115: Add missing PLL config properties clk: qcom: clk-alpha-pll: Add a way to update some bits of test_ctl(_hi) ...
2023-06-29Merge tag 'soc-newsoc-6.5' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull new ARM SoC support from Arnd Bergmann: "There are two new SoC families this time, and both appear fairly similar: The Nuvoton MA35D1 and the STMicroelectronics STM32MP2 are both dual-core Cortex-A35 based chips for the low-power industrial embedded market, and they mark the first 64-bit product in a widely used family of 32-bit Arm MCUs and SoCs. The way into the kernel is completely different here: The team at ST has a long history of working upstream with their STM32MP1 and other SoCs, and they produced a complete port to arm64 together with the initial announcement. Nuvoton also has multiple SoC product lines with current or previous upstream support, but those are maintained by third parties and are unrelated. The patch series from Nuvoton's Jacky Huang had to go through many revisisions to get to this point and is still missing a few drivers including the serial port for the moment. The branch contains the devicetree files as well as all the code changes, in order to have something that can be tested standalone" * tag 'soc-newsoc-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (25 commits) clk: nuvoton: Use clk_parent_data instead of string for parent clock clk: nuvoton: Update all constant hex values to lowercase clk: nuvoton: Add clk-ma35d1.h for driver extern functions remoteproc: stm32: use correct format strings on 64-bit MAINTAINERS: add entry for ARM/STM32 ARCHITECTURE arm64: defconfig: enable ARCH_STM32 and STM32 serial driver arm64: dts: st: add stm32mp257f-ev1 board support dt-bindings: stm32: document stm32mp257f-ev1 board arm64: dts: st: introduce stm32mp25 pinctrl files arm64: dts: st: introduce stm32mp25 SoCs family arm64: introduce STM32 family on Armv8 architecture dt-bindings: stm32: add st,stm32mp25-syscfg compatible for syscon pinctrl: stm32: add stm32mp257 pinctrl support dt-bindings: pinctrl: stm32: support for stm32mp257 and additional packages Documentation/process: add soc maintainer handbook reset: RESET_NUVOTON_MA35D1 should depend on ARCH_MA35 reset: Add Nuvoton ma35d1 reset driver support clk: nuvoton: Add clock driver for ma35d1 clock controller arm64: dts: nuvoton: Add initial ma35d1 device tree dt-bindings: serial: Document ma35d1 uart controller ...
2023-06-29Merge tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull ARM SoC devicetree updates from Arnd Bergmann: "The biggest change this time is for the 32-bit devicetree files, which are all moved to a new location, using separate subdirectories for each SoC vendor, following the same scheme that is used on arm64, mips and riscv. This has been discussed for many years, but so far we never did this as there was a plan to move the files out of the kernel entirely, which has never happened. The impact of this will be that all external patches no longer apply, and anything depending on the location of the dtb files in the build directory will have to change. The installed files after 'make dtbs_install' keep the current location. There are six added SoCs here that are largely variants of previously added chips. Two other chips are added in a separate branch along with their device drivers. - The Samsung Exynos 4212 makes its return after the Samsung Galaxy Express phone is addded at last. The SoC support was originally added in 2012 but removed again in 2017 as it was unused at the time. - Amlogic C3 is a Cortex-A35 based smart IP camera chip - Qualcomm MSM8939 (Snapdragon 615) is a more featureful variant of the still common MSM8916 (Snapdragon 410) phone chip that has been supported for a long time. - Qualcomm SC8180x (Snapdragon 8cx) is one of their earlier high-end laptop chips, used in the Lenovo Flex 5G, which is added along with the reference board. - Qualcomm SDX75 is the latest generation modem chip that is used as a peripherial in phones but can also run a standalone Linux. Unlike the prior 32-bit SDX65 and SDX55, this now has a 64-bit Cortex-A55. - Alibaba T-Head TH1520 is a quad-core RISC-V chip based on the Xuantie C910 core, a step up from all previously added rv64 chips. All of the above come with reference board implementations, those included there are 39 new board files, but only five more 32-bit this time, probably a new low: - Marantec Maveo board based on dhcor imx6ull module - Endian 4i Edge 200, based on the armv5 Marvell Kirkwood chip - Epson Moverio BT-200 AR glasses based on TI OMAP4 - PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM - ICnova ADB4006 board based on Allwinner A20 On the 64-bit side, there are also fewer addded machines than we had in the recent releases: - Three boards based on NXP i.MX8: Emtop SoM & Baseboard, NXP i.MX8MM EVKB board and i.MX8MP based Gateworks Venice gw7905-2x device. - NVIDIA IGX Orin and Jetson Orin Nano boards, both based on tegra234 - Qualcomm gains support for 6 reference boards on various members of their IPQ networking SoC series, as well as the Sony Xperia M4 Aqua phone, the Acer Aspire 1 laptop, and the Fxtec Pro1X board on top of the various reference platforms for their new chips. - Rockchips support for several newer boards: Indiedroid Nova (rk3588), Edgeble Neural Compute Module 6B (rk3588), FriendlyARM NanoPi R2C Plus (rk3328), Anbernic RG353PS (rk3566), Lunzn Fastrhino R66S/R68S (rk3568) - TI K3/AM625 based PHYTEC phyBOARD-Lyra-AM625 board and Toradex Verdin family with AM62 COM, carrier and dev boards Other changes to existing boards contain the usual minor improvements along with - continued updates to clean up dts files based on dtc warnings and binding checks, in particular cache properties and node names - support for devicetree overlays on at91, bcm283x - significant additions to existing SoC support on mediatek, qualcomm, ti k3 family, starfive jh71xx, NXP i.MX6 and i.MX8, ST STM32MP1 As usual, a lot more detail is available in the individual merge commits" * tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (926 commits) ARM: mvebu: fix unit address on armada-390-db flash ARM: dts: Move .dts files to vendor sub-directories kbuild: Support flat DTBs install ARM: dts: Add .dts files missing from the build ARM: dts: allwinner: Use quoted #include ARM: dts: lan966x: kontron-d10: add PHY interrupts ARM: dts: lan966x: kontron-d10: fix SPI CS ARM: dts: lan966x: kontron-d10: fix board reset ARM: dts: at91: Enable device-tree overlay support for AT91 boards arm: dts: Enable device-tree overlay support for AT91 boards arm64: dts: exynos: Remove clock from Exynos850 pmu_system_controller ARM: dts: at91: use generic name for shutdown controller ARM: dts: BCM5301X: Add cells sizes to PCIe nodes dt-bindings: firmware: brcm,kona-smc: convert to YAML riscv: dts: sort makefile entries by directory riscv: defconfig: enable T-HEAD SoC MAINTAINERS: add entry for T-HEAD RISC-V SoC riscv: dts: thead: add sipeed Lichee Pi 4A board device tree riscv: dts: add initial T-HEAD TH1520 SoC device tree riscv: Add the T-HEAD SoC family Kconfig option ...
2023-06-26Merge branches 'clk-qcom' and 'clk-microchip' into clk-nextStephen Boyd
* clk-qcom: (63 commits) clk: qcom: gcc-sc8280xp: Add runtime PM clk: qcom: gpucc-sc8280xp: Add runtime PM clk: qcom: mmcc-msm8974: fix MDSS_GDSC power flags clk: qcom: gpucc-sm6375: Enable runtime pm dt-bindings: clock: sm6375-gpucc: Add VDD_GX clk: qcom: gcc-sm6115: Add missing PLL config properties clk: qcom: clk-alpha-pll: Add a way to update some bits of test_ctl(_hi) clk: qcom: gcc-ipq6018: remove duplicate initializers clk: qcom: gcc-ipq9574: Enable crypto clocks dt-bindings: clock: Add crypto clock and reset definitions clk: qcom: Add lpass audio clock controller driver for SC8280XP clk: qcom: Add lpass clock controller driver for SC8280XP dt-bindings: clock: Add LPASS AUDIOCC and reset controller for SC8280XP dt-bindings: clock: Add LPASSCC and reset controller for SC8280XP dt-bindings: clock: qcom,mmcc: define clocks/clock-names for MSM8226 clk: qcom: gpucc-sm8550: Add support for graphics clock controller clk: qcom: Add support for SM8450 GPUCC clk: qcom: gcc-sm8450: Enable hw_clk_ctrl clk: qcom: rcg2: Make hw_clk_ctrl toggleable dt-bindings: clock: qcom: Add SM8550 graphics clock controller ... * clk-microchip: clk: at91: sama7g5: s/ep_chg_chg_id/ep_chg_id clk: at91: sama7g5: switch to parent_hw and parent_data clk: at91: sckc: switch to parent_data/parent_hw clk: at91: clk-sam9x60-pll: add support for parent_hw clk: at91: clk-utmi: add support for parent_hw clk: at91: clk-system: add support for parent_hw clk: at91: clk-programmable: add support for parent_hw clk: at91: clk-peripheral: add support for parent_hw clk: at91: clk-master: add support for parent_hw clk: at91: clk-generated: add support for parent_hw clk: at91: clk-main: add support for parent_data/parent_hw
2023-06-26Merge branch '20230608125315.11454-2-srinivas.kandagatla@linaro.org' into ↵Bjorn Andersson
clk-for-6.5 Merge the missing SC8280XP LPASS DeviceTree changes, which where brought in through a topic branch in order to be shared with the DeviceTree source files, but not merged into the clock tree until now.
2023-06-26Merge branches 'clk-imx', 'clk-microchip', 'clk-cleanup', 'clk-bindings', ↵Stephen Boyd
'clk-ti' and 'clk-kasprintf' into clk-next - Handle allocation failures from kasprintf() and friends * clk-imx: clk: imx: clk-imx8mp: improve error handling in imx8mp_clocks_probe() clk: imx93: fix memory leak and missing unwind goto in imx93_clocks_probe clk: imx: clk-imx8mn: fix memory leak in imx8mn_clocks_probe dt-bindings: clock: imx8m: Add missing interrupt property clk: imx: clk-imxrt1050: fix memory leak in imxrt1050_clocks_probe clk: imx: composite-8m: Add imx8m_divider_determine_rate clk: imx: scu: use _safe list iterator to avoid a use after free clk: imx: drop imx_unregister_clocks clk: imx6ul: retain early UART clocks during kernel init clk: imx: imx6sx: Remove CLK_SET_RATE_PARENT from the LDB clocks * clk-microchip: dt-bindings: clocks: at91sam9x5-sckc: convert to yaml dt-bindings: clocks: atmel,at91rm9200-pmc: convert to yaml clk: microchip: Use of_property_read_bool() for boolean properties clk: microchip: convert SOC_MICROCHIP_POLARFIRE to ARCH_MICROCHIP_POLARFIRE * clk-cleanup: clk: fix typo in clk_hw_register_fixed_rate_parent_data() macro clk: Fix memory leak in devm_clk_notifier_register() clk: mvebu: Iterate over possible CPUs instead of DT CPU nodes clk: mvebu: Use of_get_cpu_hwid() to read CPU ID MAINTAINERS: Add Marvell mvebu clock drivers clk: mvebu: Use of_address_to_resource() clk: tegra: tegra124-emc: Fix potential memory leak clk: clocking-wizard: Fix Oops in clk_wzrd_register_divider() clk: bcm: rpi: Fix off by one in raspberrypi_discover_clocks() clk: sifive: Use devm_platform_ioremap_resource() * clk-bindings: dt-bindings: clock: drop unneeded quotes and use absolute /schemas path dt-bindings: rcc: stm32: Sync with u-boot copy for STM32MP13 SoC * clk-ti: clk: keystone: syscon-clk: Add support for audio refclk dt-bindings: clock: Add binding documentation for TI Audio REFCLK dt-bindings: clock: ehrpwm: Remove unneeded syscon compatible clk: keystone: syscon-clk: Allow the clock node to not be of type syscon * clk-kasprintf: clk: clocking-wizard: check return value of devm_kasprintf() clk: ti: clkctrl: check return value of kasprintf() clk: keystone: sci-clk: check return value of kasprintf() clk: si5341: free unused memory on probe failure clk: si5341: check return value of {devm_}kasprintf() clk: si5341: return error if one synth clock registration fails clk: cdce925: check return value of kasprintf() clk: vc5: check memory returned by kasprintf()
2023-06-14dt-bindings: rcc: stm32: Sync with u-boot copy for STM32MP13 SoCPatrick Delaunay
Minor cosmetic change, aligned with files in U-Boot: - change obsolete SPDX id : GPL-2.0+ and use the same license GPL-2.0-only for the 2 files - use correct mail address gabriel.fernandez@foss.st.com - remove extra space Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Link: https://lore.kernel.org/r/20230510184305.v2.1.I417093ddcea282be479f10a37147d1935a9050b7@changeid Acked-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-06-13Merge branch '20230526161129.1454-2-quic_anusha@quicinc.com' into clk-for-6.5Bjorn Andersson
Merge the DeviceTree binding updates for IPQ9574 GCC adding clocks and resets related to Crypto Engine, through a topic branch in order to make them available in the DeviceTree source tree as well.
2023-06-13Merge branch '20230526161129.1454-2-quic_anusha@quicinc.com' into arm64-for-6.5Bjorn Andersson
Merge IPQ9574 Crypto Engine-related DeviceTree bindings, to gain the additional clock defines needed to add the related nodes.
2023-06-13dt-bindings: clock: Add crypto clock and reset definitionsAnusha Rao
Add crypto clock and reset ID definitions for ipq9574. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526161129.1454-2-quic_anusha@quicinc.com
2023-06-13Merge branch '20230608125315.11454-2-srinivas.kandagatla@linaro.org' into ↵Bjorn Andersson
arm64-for-6.5 Merge the SC8280XP LPASSCC DeviceTree bindings in order to get access to the newly added reset defines.
2023-06-13dt-bindings: clock: Add LPASS AUDIOCC and reset controller for SC8280XPSrinivas Kandagatla
The LPASS (Low Power Audio Subsystem) Audio clock controller provides reset support when it is under the control of Q6DSP. Add support for those resets and adds IDs for clients to request the reset. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230608125315.11454-3-srinivas.kandagatla@linaro.org
2023-06-13dt-bindings: clock: Add LPASSCC and reset controller for SC8280XPSrinivas Kandagatla
The LPASS (Low Power Audio Subsystem) clock controller provides reset support when it is under the control of Q6DSP. Add support for those resets and adds IDs for clients to request the reset. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230608125315.11454-2-srinivas.kandagatla@linaro.org
2023-06-13Merge branch '20230512122347.1219-3-quic_tdas@quicinc.com' into arm64-for-6.5Bjorn Andersson
Merge the SDX75 GCC DeviceTree binding, in order to get access to the clock defines in the DeviceTree source.
2023-06-05dt-bindings: clock: nuvoton: add binding for ma35d1 clock controllerJacky Huang
Add the dt-bindings header for Nuvoton ma35d1, that gets shared between the clock controller and clock references in the dts. Add documentation to describe nuvoton ma35d1 clock driver. Signed-off-by: Jacky Huang <ychuang3@nuvoton.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-05-30dt-bindings: clock: meson: add A1 Peripherals clock controller bindingsDmitry Rokosov
Add documentation and dt bindings for the Amlogic A1 Peripherals clock controller. A1 PLL clock controller has references to A1 Peripherals clock controller objects, so reflect them in the schema. Signed-off-by: Jian Hu <jian.hu@amlogic.com> Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230523135351.19133-6-ddrokosov@sberdevices.ru Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-05-30dt-bindings: clock: meson: add A1 PLL clock controller bindingsDmitry Rokosov
Add the documentation and dt bindings for Amlogic A1 PLL clock controller. Also include new A1 clock controller dt bindings to MAINTAINERS. Signed-off-by: Jian Hu <jian.hu@amlogic.com> Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/20230523135351.19133-4-ddrokosov@sberdevices.ru Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-05-26Merge branch 'sm8450-sm8550-gpucc-binding' into arm64-for-6.5Bjorn Andersson
Introduce DeviceTree bindings for SM8450 and SM8550 GPU clock controller, to introduce the constants necessary to referr to these clocks.
2023-05-26Merge branch 'sm8450-sm8550-gpucc-binding' into clk-for-6.5Bjorn Andersson
Bring GPUCC DeviceTree bindings for SM8450 and SM8550 in through a topic branch to allow sharing it with the DeviceTree source tree as well.
2023-05-26dt-bindings: clock: qcom: Add SM8550 graphics clock controllerJagadeesh Kona
Add device tree bindings for the graphics clock controller on Qualcomm SM8550 platform. Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230524181800.28717-2-quic_jkona@quicinc.com
2023-05-26dt-bindings: clock: Add Qcom SM8450 GPUCCKonrad Dybcio
Add device tree bindings for the graphics clock controller on Qualcomm Technology Inc's SM8450 SoCs. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230517-topic-waipio-gpucc-v1-1-4f40e282af1d@linaro.org
2023-05-24Merge branch '20230512122347.1219-3-quic_tdas@quicinc.com' into clk-for-6.5Bjorn Andersson
Merge SDX75 Global Clock Controller DeviceTree binding through a topic branch, to allow inclusion in DeviceTree source as well.
2023-05-24Merge branch '20230524140656.7076-2-quic_tdas@quicinc.com' into HEADBjorn Andersson
Merge the SM8450 Video Clock Controller DeviceTree binding through a topic branch, in order to be able to use the introduced constants in changes on DeviceTree source branch as well.
2023-05-24dt-bindings: clock: Add SM8350 VIDEOCCKonrad Dybcio
SM8350, like most recent higher-end chips has a separate clock controller block just for the Venus IP. Document it. The binding was separated as the driver, unlike the earlier ones, doesn't expect clock-names to keep it easier to maintain. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230413-topic-lahaina_vidcc-v4-1-86c714a66a81@linaro.org
2023-05-24dt-bindings: clock: qcom: Add SM8450 video clock controllerTaniya Das
Add device tree bindings for the video clock controller on Qualcomm SM8450 platform. Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230524140656.7076-2-quic_tdas@quicinc.com
2023-05-24dt-bindings: clock: qcom: Add GCC clocks for SDX75Imran Shaik
Add support for qcom global clock controller bindings for SDX75 platform. Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230512122347.1219-3-quic_tdas@quicinc.com
2023-04-29Merge tag 'clk-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "Nothing looks out of the ordinary in this batch of clk driver updates. There are a couple patches to the core clk framework, but they're all basically cleanups or debugging aids. The driver updates and new additions are dominated in the diffstat by Qualcomm and MediaTek drivers. Qualcomm gained a handful of new drivers for various SoCs, and MediaTek gained a bunch of drivers for MT8188. The MediaTek drivers are being modernized as well, so there are updates all over that vendor's clk drivers. There's also a couple other new clk drivers in here, for example the Starfive JH7110 SoC support is added. Outside of the two major SoC vendors though, we have the usual collection of non-critical fixes and cleanups to various clk drivers. It's good to see that we're getting more cleanups and modernization patches. Maybe one day we'll be able to properly split clk providers from clk consumers. Core: - Print an informational message before disabling unused clks New Drivers: - BCM63268 timer clock and reset controller - Frequency Hopping (FHCTL) on MediaTek MT6795, MT8173, MT8192 and MT8195 SoCs - Mediatek MT8188 SoC clk drivers - Clock driver for Sunplus SP7021 SoC - Clk driver support for Loongson-2 SoCs - Clock driver for Skyworks Si521xx I2C PCIe clock generators - Initial Starfive JH7110 clk/reset support - Global clock controller drivers for Qualcomm SM7150, IPQ9574, MSM8917 and IPQ5332 SoCs - GPU clock controller drivers for SM6115, SM6125, SM6375 and SA8775P SoCs Updates: - Shrink size of clk_fractional_divider a little - Convert various clk drivers to devm_of_clk_add_hw_provider() - Convert platform clk drivers to remove_new() - Converted most Mediatek clock drivers to struct platform_driver - MediaTek clock drivers can be built as modules - Reimplement Loongson-1 clk driver with DT support - Migrate socfpga clk driver to of_clk_add_hw_provider() - Support for i3c clks on Aspeed ast2600 SoCs - Add clock generic devm_clk_hw_register_gate_parent_data - Add audiomix block control for i.MX8MP - Add support for determine_rate to i.MX composite-8m - Let the LCDIF Pixel clock of i.MX8MM and i.MX8MN set parent rate - Provide clock name in error message for clk-gpr-mux on get parent failure - Drop duplicate imx_clk_mux_flags macro - Register the i.MX8MP Media Disp2 Pix clock as bus clock - Add Media LDB root clock to i.MX8MP - Make i.MX8MP nand_usdhc_bus clock as non-critical - Fix the rate table for i.MX fracn-gppll - Disable HW control for the fracn-gppll in order to be controlled by register write - Add support for interger PLL in fracn-gppll - Add mcore_booted module parameter to i.MX93 provider - Add NIC, A55 and ARM PLL clocks to i.MX93 - Fix i.MX8ULP XBAR_DIVBUS and AD_SLOW clock parents - Use "divider closest" clock type for PLL4_PFD dividers on i.MX8ULP to get more accurate clock rates - Mark the MU0_Bi and TPM5 clocks on i.MX8ULP as critical - Update some of the i.MX critical clocks flags to allow glitchless on-the-fly rate change. - Add I2C5 clock on Renesas R-Car V3H - Exynos850: Add CMU_G3D clock controller for the Mali GPU - Extract Exynos5433 (ARM64) clock controller power management code to common driver parts - Exynos850: make PMU_ALIVE_PCLK clock critical - Add Audio, thermal, camera (CSI-2), Image Signal Processor/Channel Selector (ISPCS), and video capture (VIN) clocks on Renesas R-Car V4H - Add video capture (VIN) clocks on Renesas R-Car V3H - Add Cortex-A53 System CPU (Z2) clocks on Renesas R-Car V3M and V3H - Support for Stromer Plus PLL on Qualcomm IPQ5332 - Add a missing reset to Qualcomm QCM2290 - Migrate Qualcomm IPQ4019 to clk_parent_data - Make USB GDSCs enter retention state when disabled on Qualcomm SM6375, MSM8996 and MSM8998 SoCs - Set floor rounding clk_ops for Qualcomm QCM2290 SDCC2 clk - Add two EMAC GDSCs on Qualcomm SC8280XP - Use shared rcg clk ops in Qualcomm SM6115 GCC - Park Qualcomm SM8350 PCIe PIPE clks when disabled - Add GDSCs to Qualcomm SC7280 LPASS audio clock controller - Add missing XO clocks to Qualcomm MSM8226 and MSM8974 - Convert some Qualcomm clk DT bindings to YAML - Reparenting fix for the clock supplying camera modules on Rockchip rk3399 - Mark more critical (bus-)clocks on Rockchip rk3588" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (290 commits) clk: qcom: gcc-sc8280xp: Add EMAC GDSCs clk: starfive: Delete the redundant dev_set_drvdata() in JH7110 clock drivers clk: rockchip: rk3588: make gate linked clocks critical clk: qcom: dispcc-qcm2290: Remove inexistent DSI1PHY clk clk: qcom: add the GPUCC driver for sa8775p dt-bindings: clock: qcom: describe the GPUCC clock for SA8775P clk: qcom: gcc-sm8350: fix PCIe PIPE clocks handling clk: qcom: lpassaudiocc-sc7280: Add required gdsc power domain clks in lpass_cc_sc7280_desc clk: qcom: lpasscc-sc7280: Skip qdsp6ss clock registration dt-bindings: clock: qcom,sc7280-lpasscc: Add qcom,adsp-pil-mode property clk: starfive: Avoid casting iomem pointers clk: microchip: fix potential UAF in auxdev release callback clk: qcom: rpm: Use managed `of_clk_add_hw_provider()` clk: mediatek: fhctl: Mark local variables static clk: sifive: make SiFive clk drivers depend on ARCH_ symbols clk: uniphier: Use managed `of_clk_add_hw_provider()` clk: si5351: Use managed `of_clk_add_hw_provider()` clk: si570: Use managed `of_clk_add_hw_provider()` clk: si514: Use managed `of_clk_add_hw_provider()` clk: lmk04832: Use managed `of_clk_add_hw_provider()` ...
2023-04-25Merge branch 'clk-imx' into clk-nextStephen Boyd
* clk-imx: (25 commits) clk: imx: imx8ulp: update clk flag for system critical clock clk: imx: imx8ulp: Add tpm5 clock as critical gate clock clk: imx: imx8ulp: keep MU0_B clock enabled always clk: imx: imx8ulp: Add divider closest support to get more accurate clock rate clk: imx: imx8ulp: Fix XBAR_DIVBUS and AD_SLOW clock parents clk: imx: imx93: Add nic and A55 clk dt-bindings: clock: imx93: add NIC, A55 and ARM PLL CLK clk: imx: imx93: add mcore_booted module paratemter clk: imx: fracn-gppll: Add 300MHz freq support for imx9 clk: imx: fracn-gppll: support integer pll clk: imx: fracn-gppll: disable hardware select control clk: imx: fracn-gppll: fix the rate table clk: imx: imx8mp: change the 'nand_usdhc_bus' clock to non-critical clk: imx: imx8mp: Add LDB root clock dt-bindings: clock: imx8mp: Add LDB clock entry clk: imx: imx8mp: correct DISP2 pixel clock type clk: imx: drop duplicated macro clk: imx: clk-gpr-mux: Provide clock name in error message clk: imx: Let IMX8MN_CLK_DISP_PIXEL set parent rate clk: imx8mm: Let IMX8MM_CLK_LCDIF_PIXEL set parent rate ...
2023-04-25Merge branches 'clk-of', 'clk-samsung', 'clk-rockchip' and 'clk-qcom' into ↵Stephen Boyd
clk-next * clk-of: clk: add missing of_node_put() in "assigned-clocks" property parsing * clk-samsung: clk: samsung: exynos850: Make PMU_ALIVE_PCLK critical clk: samsung: Convert to platform remove callback returning void clk: samsung: exynos5433: Extract PM support to common ARM64 layer clk: samsung: Extract parent clock enabling to common function clk: samsung: Extract clocks registration to common function clk: samsung: exynos850: Add AUD and HSI main gate clocks clk: samsung: exynos850: Implement CMU_G3D domain clk: samsung: clk-pll: Implement pll0818x PLL type clk: samsung: Set dev in samsung_clk_init() clk: samsung: Don't pass reg_base to samsung_clk_register_pll() clk: samsung: Remove np argument from samsung_clk_init() dt-bindings: clock: exynos850: Add AUD and HSI main gate clocks dt-bindings: clock: exynos850: Add Exynos850 CMU_G3D * clk-rockchip: clk: rockchip: rk3588: make gate linked clocks critical clk: rockchip: rk3399: allow clk_cifout to force clk_cifout_src to reparent * clk-qcom: (57 commits) clk: qcom: gcc-sc8280xp: Add EMAC GDSCs clk: qcom: dispcc-qcm2290: Remove inexistent DSI1PHY clk clk: qcom: add the GPUCC driver for sa8775p dt-bindings: clock: qcom: describe the GPUCC clock for SA8775P clk: qcom: gcc-sm8350: fix PCIe PIPE clocks handling clk: qcom: lpassaudiocc-sc7280: Add required gdsc power domain clks in lpass_cc_sc7280_desc clk: qcom: lpasscc-sc7280: Skip qdsp6ss clock registration dt-bindings: clock: qcom,sc7280-lpasscc: Add qcom,adsp-pil-mode property clk: qcom: rpm: Use managed `of_clk_add_hw_provider()` clk: qcom: Add Global Clock Controller driver for IPQ9574 dt-bindings: clock: Add ipq9574 clock and reset definitions clk: qcom: gpucc-sm6375: Configure CX_GDSC disable wait value clk: qcom: gcc-sm6115: Mark RCGs shared where applicable clk: qcom: dispcc-qcm2290: Add MDSS_CORE reset dt-bindings: clock: dispcc-qcm2290: Add MDSS_CORE reset clk: qcom: apss-ipq-pll: add support for IPQ5332 dt-bindings: clock: qcom,a53pll: add IPQ5332 compatible clk: qcom: apss-ipq-pll: refactor the driver to accommodate different PLL types dt-bindings: mailbox: qcom,apcs-kpss-global: fix SDX55 'if' match dt-bindings: mailbox: qcom,apcs-kpss-global: correct SDX55 clocks ...
2023-04-25Merge branches 'clk-starfive', 'clk-fractional' and 'clk-devmof' into clk-nextStephen Boyd
- Shrink size of clk_fractional_divider a little - Convert various clk drivers to devm_of_clk_add_hw_provider() * clk-starfive: clk: starfive: Delete the redundant dev_set_drvdata() in JH7110 clock drivers clk: starfive: Avoid casting iomem pointers MAINTAINERS: generalise StarFive clk/reset entries reset: starfive: Add StarFive JH7110 reset driver clk: starfive: Add StarFive JH7110 always-on clock driver clk: starfive: Add StarFive JH7110 system clock driver reset: starfive: jh71x0: Use 32bit I/O on 32bit registers reset: starfive: Rename "jh7100" to "jh71x0" for the common code reset: starfive: Extract the common JH71X0 reset code reset: starfive: Factor out common JH71X0 reset code reset: Create subdirectory for StarFive drivers reset: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE clk: starfive: Rename "jh7100" to "jh71x0" for the common code clk: starfive: Rename clk-starfive-jh7100.h to clk-starfive-jh71x0.h clk: starfive: Factor out common JH7100 and JH7110 code clk: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator dt-bindings: clock: Add StarFive JH7110 system clock and reset generator * clk-fractional: clk: Remove mmask and nmask fields in struct clk_fractional_divider clk: rockchip: Remove values for mmask and nmask in struct clk_fractional_divider clk: imx: Remove values for mmask and nmask in struct clk_fractional_divider clk: Compute masks for fractional_divider clk when needed. * clk-devmof: clk: uniphier: Use managed `of_clk_add_hw_provider()` clk: si5351: Use managed `of_clk_add_hw_provider()` clk: si570: Use managed `of_clk_add_hw_provider()` clk: si514: Use managed `of_clk_add_hw_provider()` clk: lmk04832: Use managed `of_clk_add_hw_provider()` clk: hsdk-pll: Use managed `of_clk_add_hw_provider()` clk: cdce706: Use managed `of_clk_add_hw_provider()` clk: axs10x: Use managed `of_clk_add_hw_provider()` clk: axm5516: Use managed `of_clk_add_hw_provider()` clk: axi-clkgen: Use managed `of_clk_add_hw_provider()`
2023-04-25Merge branches 'clk-xilinx', 'clk-broadcom' and 'clk-platform' into clk-nextStephen Boyd
- BCM63268 timer clock and reset controller - Convert platform clk drivers to remove_new * clk-xilinx: clocking-wizard: Support higher frequency accuracy clk: zynqmp: pll: Remove the limit * clk-broadcom: clk: bcm: Add BCM63268 timer clock and reset driver dt-bindings: clock: Add BCM63268 timer binding dt-bindings: reset: add BCM63268 timer reset definitions dt-bindings: clk: add BCM63268 timer clock definitions * clk-platform: (25 commits) clk: xilinx: Convert to platform remove callback returning void clk: x86: Convert to platform remove callback returning void clk: uniphier: Convert to platform remove callback returning void clk: ti: Convert to platform remove callback returning void clk: tegra: Convert to platform remove callback returning void clk: stm32: Convert to platform remove callback returning void clk: mvebu: Convert to platform remove callback returning void clk: mmp: Convert to platform remove callback returning void clk: keystone: Convert to platform remove callback returning void clk: hisilicon: Convert to platform remove callback returning void clk: stm32mp1: Convert to platform remove callback returning void clk: scpi: Convert to platform remove callback returning void clk: s2mps11: Convert to platform remove callback returning void clk: pwm: Convert to platform remove callback returning void clk: palmas: Convert to platform remove callback returning void clk: hsdk-pll: Convert to platform remove callback returning void clk: fixed-rate: Convert to platform remove callback returning void clk: fixed-mmio: Convert to platform remove callback returning void clk: fixed-factor: Convert to platform remove callback returning void clk: axm5516: Convert to platform remove callback returning void ...
2023-04-25Merge branches 'clk-mediatek', 'clk-sunplus', 'clk-loongson' and ↵Stephen Boyd
'clk-socfpga' into clk-next - Frequency Hopping (FHCTL) on MediaTek MT6795, MT8173, MT8192 and MT8195 SoCs - Converted most Mediatek clock drivers to struct platform_driver - MediaTek clock drivers can be built as modules - Mediatek MT8188 SoC clk drivers - Clock driver for Sunplus SP7021 SoC - Reimplement Loongson-1 clk driver with DT support - Clk driver support for Loongson-2 SoCs - Migrate socfpga clk driver to of_clk_add_hw_provider() * clk-mediatek: (84 commits) clk: mediatek: fhctl: Mark local variables static clk: mediatek: Use right match table, include mod_devicetable clk: mediatek: Add MT8188 adsp clock support clk: mediatek: Add MT8188 imp i2c wrapper clock support clk: mediatek: Add MT8188 wpesys clock support clk: mediatek: Add MT8188 vppsys1 clock support clk: mediatek: Add MT8188 vppsys0 clock support clk: mediatek: Add MT8188 vencsys clock support clk: mediatek: Add MT8188 vdosys1 clock support clk: mediatek: Add MT8188 vdosys0 clock support clk: mediatek: Add MT8188 vdecsys clock support clk: mediatek: Add MT8188 mfgcfg clock support clk: mediatek: Add MT8188 ipesys clock support clk: mediatek: Add MT8188 imgsys clock support clk: mediatek: Add MT8188 ccusys clock support clk: mediatek: Add MT8188 camsys clock support clk: mediatek: Add MT8188 infrastructure clock support clk: mediatek: Add MT8188 peripheral clock support clk: mediatek: Add MT8188 topckgen clock support clk: mediatek: Add MT8188 apmixedsys clock support ... * clk-sunplus: clk: Add Sunplus SP7021 clock driver * clk-loongson: clk: clk-loongson2: add clock controller driver support dt-bindings: clock: add loongson-2 boot clock index MAINTAINERS: remove obsolete file entry in MIPS/LOONGSON1 ARCHITECTURE MIPS: loongson32: Update the clock initialization clk: loongson1: Re-implement the clock driver clk: loongson1: Remove the outdated driver dt-bindings: clock: Add Loongson-1 clock * clk-socfpga: clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling clk: socfpga: use of_clk_add_hw_provider and improve error handling clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling clk: socfpga: use of_clk_add_hw_provider and improve error handling clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling clk: socfpga: use of_clk_add_hw_provider and improve error handling
2023-04-24clk: qcom: gcc-sc8280xp: Add EMAC GDSCsAndrew Halaney
Add the EMAC GDSCs to allow the EMAC hardware to be enabled. Acked-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230413191541.1073027-2-ahalaney@redhat.com
2023-04-14Merge tag 'qcom-arm64-for-6.4-2' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt More Qualcomm ARM64 Devicetree updated for v6.4 Devicetree for the QCM2210/QCM2290 is introduced. Support for the RB1 board is introduced on QRB2210, RB2 on QRB4210, the AL02 board on IPQ9574, the MI01.6 board is introduced on IPQ5332 and initial support for Xiaomi Mi A3 is introduced on SM6125. Support for the output-enable/disable flag is introduced in the pinctrl-msm driver, and the non-standard "input-enable" is dropped from a range of platforms. A wide range of smaller fixes are introduced, based on Devicetree validation. MSM8953 gains LPASS, MPSS and Wireless subsystem support. The iommus property is removed from PCIe nodes in all platforms, as the only the child devices should be associated with iommu groups, through the existing iommu-map property. A few QUP instances are introduced on the IPQ5332 platform, and support for the MI01.6 board is introduced. The reserved-memory map on Huawei Nexus 6P is updated with the addition of splash screen framebuffer memory and adjustment to the reserved memory region overlapping the smem region. Regulators are introduces for the SA8775P Ride platform. A regulator is marked always-on, for correctness, on Trogdor. Pinconf fixes are introduced to both sc7180 and sc7280 devices. A dedicated reviewers list is added for boards relevant to the Chromebook engineers. A set of pinconf fixes are introduced for sc8280xp, labels are introduced for Soundwire nodes. The sensor core remoteproc and FastRPC thereon, is introduce in SDM845 and enabled for OnePlus 6/6T and Shift Shift6mq. RMTFS, remoteprocs, ath10k and ramoops is introduced for the Lenovo Tab P11. UFS support is introduced on SM6125. SM8150 no longer defines the GPU to be in headless mode by default, GPU speedbins are introduced. GPU speedbins are introduced for SM8250 as well, as is support for display on Xiaomi Mi Pad 5 Pro, with two different panels supported. Soundwire controllers, ADSP audio codec macros and the Inline Crypto Engine support is added to the SM8550 platform. * tag 'qcom-arm64-for-6.4-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (85 commits) arm64: dts: qcom: Add base qrb4210-rb2 board dts arm64: dts: qcom: sm8550: add Soundwire controllers arm64: dts: qcom: sm8250: Add GPU speedbin support arm64: dts: qcom: sm8150: Add GPU speedbin support arm64: dts: qcom: sm8150: Don't start Adreno in headless mode arm64: dts: qcom: ipq5332: add support for the RDP468 variant arm64: dts: qcom: sdm630: move DSI opp-table out of DSI node arm64: dts: qcom: sm6115p-j606f: Enable ATH10K WiFi arm64: dts: qcom: sm6115p-j606f: Enable remoteprocs arm64: dts: qcom: sm6115: Add RMTFS arm64: dts: qcom: sm6115-j606f: Add ramoops node arm64: dts: qcom: msm8916-thwc-ufi001c: add function to pin config arm64: dts: qcom: sm8550: Add the Inline Crypto Engine node arm64: dts: MSM8953: Add lpass nodes arm64: dts: MSM8953: Add mpss nodes arm64: dts: MSM8953: Add wcnss nodes arm64: dts: qcom: sm8350: remove superfluous "input-enable" arm64: dts: qcom: sm8150: remove superfluous "input-enable" arm64: dts: qcom: apq8016: remove superfluous "input-enable" arm64: dts: qcom: sc8280xp-lenovo-thinkpad: correct pin drive-strength ... Link: https://lore.kernel.org/r/20230414031550.2412379-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-14Merge tag 'qcom-arm64-for-6.4' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt Qualcomm ARM64 updates for v6.4 PCI I/O and MEM ranges are corrected across all targets with PCIe enabled. Likewise is CPU clocks defined to be provided from CPUfreq for a wide range of platforms, to satisfy the OPP definitions, and LLCC bank information is corrected for all relevant platforms. IPQ5332 gains SMEM, CPUfreq and support for triggering download mode. The MI01.2 board is introduced. On MSM8916 WCN compatibles are moved to be defined per board, to avoid issues when boards rely on the incorrect defaults. Support for Yiming UZ801 4G modem stick is introduced. XO clock is defined and fed to RPMCC on MSM8953 and MSM8976, to ensure clock trees are properly rooted. DSI clocks feeding into gcc are described on MSM8953. On MSM8996 the external audio components are moved from the SoC dtsi. A few DWC3 quirks are added. On MSM8998 GPIO names are introduced for Sony Xperia XZ Premium, XZ1 and XZ1 Compact. A numbe of boards have GPIO keys properly marked as wakeup-source. The SA8775P platform is extended with CPUfreq, UARTs, I2C controllers, SPI controllers, SPMI and PMICs, PDC support. The associated PMICs gains reset and power key support, as well as thermal zones defined. Nodes are sorted. On top of this the SA8775P Ride board/platform is introduced. On SC7180 and SC7280 a range of fixes coming from DeviceTree validation are introduced, some clearing up unused properties, others correcting errors. A number of Google rev0 boards on SC7180 are dropped, as these are not considered to be in use by anyone anymore. On SC8280XP RTC support is introduced and enabled for the CRD and Lenovo Thinkpad X13s. It gains another UART, upon which Bluetooth is enabled on the Lenovo ThinkPad X13s. The touchpad definition is altered to attempt to probe both devices seen in the wild. A number of bug fixes are also introduced, and the regulator definitions on X13s are corrected. On SDM845 dynamic power coefficients are improved. BWMON compatible is corrected. Xiaomi Pocophone F1 gains notification LED. Sony Xperia XZ2, XZ2 Compact and XZ3 gains display, touchscreen, gpu and remoteproc support. OnePlus 6 and 6T gains hall sensor. GPU clock controller and remoteproc nodes are added for SM6115. CPU clock are defined to come from CPUfreq. Board-specific USB-properties are moved out of the SoC dtsi. On SM6375 L3 scaling, IMEM, RMTFS, RPM sleep stats, Tsens, modem remoteproc and WiFi nodes are added. Tsens thermal zones are defined and additional low power states are defined. Sony Xperia 10 IV gains volume down key support. On SM8150 another UART is introduced, to be used by GNSS on the SA8155 ADP. Support for the Flash LED block in PM8150L is added. On SM8250 TPDM MM and PRNG is defined, MHI region is added to PCIe node. A few bug fixes are introduced after Devicetree validation. The DisplayPort controller on both SM8350 and SM8450 is defined and the related QMP instance is transitioned to the USB3/DP combo variant. IMEM and PIL info is introduced, for post mortem debugging of remoteprocs. On the HDK PMIC GLINK is enabled and role switch is enabled. Some audio resources are corrected. A typo in the USB role property of the Microsoft Surface is corrected, thanks to DeviceTree validation. PCIe controllers and PHYs descriptions are corrected, and pinctrl state definitions are moved from the soc to the board definition. BWMON compatibles are corrected. PM8550B gains the definition of the eUSB2 repeater and this is enabled on the MTP. PMIC GLINK is also defined for the MTP and connected to DWC3, for role switching support. In addition to this, a range of cleanups based on Devicetree validation is introduced. A few clock bindings are introduced, from topic-branches shared with the clock tree, to aid introduction of references to these. * tag 'qcom-arm64-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (256 commits) arm64: dts: qcom: sc8280xp-x13s: Add bluetooth arm64: dts: qcom: sc8280xp: Define uart2 arm64: dts: qcom: sc8280xp: Add "mhi" region to the PCIe nodes arm64: dts: qcom: sm8250: Add "mhi" region to the PCIe nodes arm64: dts: qcom: sdm845: Add "mhi" region to the PCIe nodes arm64: dts: qcom: sa8775p-ride: set gpio-line-names for PMIC GPIOs arm64: dts: qcom: sa8775p: add PMIC GPIO controller nodes arm64: dts: qcom: sa8775p: pmic: add thermal zones arm64: dts: qcom: sa8775p: pmic: add support for the pmm8654 RESIN input arm64: dts: qcom: sa8775p: pmic: add the power key arm64: dts: qcom: sa8775p: add the Power On device node arm64: dts: qcom: sa8775p: add support for the on-board PMICs arm64: dts: qcom: sa8775p: add the spmi node arm64: dts: qcom: sa8775p: add the pdc node arm64: dts: qcom: sa8775p: sort soc nodes by reg property arm64: dts: qcom: sa8775p: pad reg properties to 8 digits arm64: dts: qcom: sc8280xp: correct Soundwire wakeup interrupt name arm64: dts: qcom: sdm845-tama: Enable GPI_DMA0/1 arm64: dts: qcom: sdm845-tama: Enable GPU arm64: dts: qcom: sdm845-tama: Enable remoteprocs ... Link: https://lore.kernel.org/r/20230410170233.5931-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-14Merge tag 'renesas-dts-for-v6.4-tag2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt Renesas DTS updates for v6.4 (take two) - Add PWM support for the R-Car H1 and H2 SoCs, - Add slide switch and I2C support for the Marzen development board, - Add SCI (serial) and Camera support for the RZ/G2L SoC and the RZ/G2L SMARC EVK development board, - Add IOMMU support for the R-Car V4H SoC, - Miscellaneous fixes and improvements. * tag 'renesas-dts-for-v6.4-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: dts: renesas: r8a779a0: Revise renesas,ipmmu-main arm64: dts: renesas: falcon-csi-dsi: Set bus-type for MAX96712 arm64: dts: renesas: r8a779g0: Add iommus to MMC node arm64: dts: renesas: r8a779g0: Add iommus to DMAC nodes arm64: dts: renesas: r8a779g0: Add IPMMU nodes arm64: dts: renesas: r8a779f0: Revise renesas,ipmmu-main arm64: dts: renesas: rzg2l-smarc: Enable CRU, CSI support arm64: dts: renesas: r9a07g044: Add CSI and CRU nodes arm64: dts: renesas: r9a07g044: Enable SCI0 using DT overlay ARM: dts: r8a7790: Add PWM device nodes ARM: dts: r8a7790: Add TPU device node ARM: dts: marzen: Enable I2C support ARM: dts: marzen: Add slide switches ARM: dts: r8a7779: Add PWM support dt-bindings: clock: r8a7779: Add PWM module clock arm64: dts: renesas: rzg2l: Add clock-names and reset-names to DMAC nodes Link: https://lore.kernel.org/r/cover.1681113117.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-14Merge tag 'riscv-dt-for-v6.4' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt RISC-V Devicetrees for v6.4 Microchip: A "fix" for the system controller's regs on PolarFire SoC, adding a missing reg property. The patch had been sitting there for months and I only re-found it recently, so you can guess how much of a "fix" it actually is. It'll become needed when the system controller's QSPI gets added in the future, but at present there's no urgency as the driver can handle both the current and "fixed" versions. StarFive: Basic support for the JH7110 & the associated first-party dev board, the VisionFive v2 (in two forms). There's a bunch of dt-bindings required for this too, all of which have had input from the DT folk. There's enough in this tag to boot to a console w/ an initramfs but little more. The SoC supports some of the "new" bit manipulation instructions, which is a good test for the recently added Zbb support in the kernel. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-dt-for-v6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device tree riscv: dts: starfive: Add StarFive JH7110 pin function definitions riscv: dts: starfive: Add initial StarFive JH7110 device tree dt-bindings: riscv: Add SiFive S7 compatible dt-bindings: interrupt-controller: Add StarFive JH7110 plic dt-bindings: timer: Add StarFive JH7110 clint dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator dt-bindings: clock: Add StarFive JH7110 system clock and reset generator riscv: dts: microchip: fix the mpfs' mailbox regs riscv: dts: microchip: add mpfs specific macb reset support Link: https://lore.kernel.org/r/20230406-shank-impromptu-3d483bbc249f@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-13dt-bindings: clock: qcom: describe the GPUCC clock for SA8775PBartosz Golaszewski
Add the compatible for the Qualcomm Graphics Clock control module present on sa8775p platforms. It matches the generic QCom GPUCC description. Add device-specific DT bindings defines as well. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230411125910.401075-2-brgl@bgdev.pl
2023-04-09dt-bindings: clock: imx93: add NIC, A55 and ARM PLL CLKPeng Fan
Add i.MX93 NIC, A55 and ARM PLL CLK. Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230403095300.3386988-7-peng.fan@oss.nxp.com Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
2023-04-09dt-bindings: clock: imx8mp: Add LDB clock entryPeng Fan
Add LDB clock entry for i.MX8MP Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20230403094633.3366446-2-peng.fan@oss.nxp.com Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
2023-04-07Merge branch '20230316072940.29137-2-quic_devipriy@quicinc.com' into HEADBjorn Andersson
Merge the IPQ9574 Global Clock Controller Devicetree binding, to make available the clock definitions used in the Devicetree source.
2023-04-07Merge branch '20230316072940.29137-2-quic_devipriy@quicinc.com' into clk-for-6.4Bjorn Andersson
Merge IPQ9574 Global Clock Controller binding through a topic branch to allow it also be introduced in the Devicetree source tree.
2023-04-07dt-bindings: clock: Add ipq9574 clock and reset definitionsDevi Priya
Add clock and reset ID definitions for ipq9574 Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Co-developed-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230316072940.29137-2-quic_devipriy@quicinc.com
2023-04-05dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generatorEmil Renner Berthing
Add bindings for the always-on clock and reset generator (AONCRG) on the JH7110 RISC-V SoC by StarFive Ltd. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-05dt-bindings: clock: Add StarFive JH7110 system clock and reset generatorEmil Renner Berthing
Add bindings for the system clock and reset generator (SYSCRG) on the JH7110 RISC-V SoC by StarFive Ltd. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-04Merge branch '20230208091340.124641-1-konrad.dybcio@linaro.org' into HEADBjorn Andersson
Introduce SM6115 GPUCC devicetree bindings, to make it possible to use clock defines in the devicetree source.
2023-04-04Merge branch '20230316-topic-qcm_dispcc_reset-v1-1-dd3708853014@linaro.org' ↵Bjorn Andersson
into clk-for-6.4 Merge dt-binding include file additions through topic branch, to allow them to be made available in DT source tree as well.
2023-04-04dt-bindings: clock: dispcc-qcm2290: Add MDSS_CORE resetKonrad Dybcio
Add the MDSS_CORE reset which can be asserted to reset the state of the entire MDSS. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230316-topic-qcm_dispcc_reset-v1-1-dd3708853014@linaro.org
2023-03-31dt-bindings: clock: mediatek: Add new MT8188 clockGarmin.Chang
Add the new binding documentation for system clock and functional clock on MediaTek MT8188. Signed-off-by: Garmin.Chang <Garmin.Chang@mediatek.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230331123621.16167-2-Garmin.Chang@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-03-30dt-bindings: clock: r8a7779: Add PWM module clockGeert Uytterhoeven
Add the module clock used by the PWM Timers on the Renesas R-Car H1 (R8A7779) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/1397b517fccbe716a71cfae770512ed577730a25.1679329211.git.geert+renesas@glider.be
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