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2025-09-08firmware: arm_scmi: imx: Support retrieving MISC protocol configuration infoPeng Fan
The MISC protocol can provide System Manager (SM) configuration information, including platform identifiers and board-specific attributes. Add support to retrieve this information during protocol initialization. If the firmware does not implement the CFG_INFO command, handle -EOPNOTSUPP gracefully and continue without failing init. Reviewed-by: Cristian Marussi <cristian.marussi@arm.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Message-Id: <20250904-sm-misc-api-v1-v4-3-0bf10eaabdf1@nxp.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2025-09-08firmware: arm_scmi: imx: Discover MISC build info from the system managerPeng Fan
MISC protocol can report System Manager (SM) build information (commit, build date/time, etc.). Discover those information at the init time. If the firmware doesn't support it, ignore -EOPNOTSUPP. Reviewed-by: Cristian Marussi <cristian.marussi@arm.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Message-Id: <20250904-sm-misc-api-v1-v4-2-0bf10eaabdf1@nxp.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2025-09-08firmware: arm_scmi: imx: Add documentation for MISC_BOARD_INFOPeng Fan
System Manager Firmware supports getting board information, add documentation for this MISC_BOARD_INFO command. Also extends the SYSLOG response to include NOT_SUPPORTED. Reviewed-by: Cristian Marussi <cristian.marussi@arm.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Message-Id: <20250904-sm-misc-api-v1-v4-1-0bf10eaabdf1@nxp.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2025-09-08pinctrl: renesas: r8a779g0: Fix trivial typo in SoC type commentMarek Vasut
Fix SoC type comment in the PFC table file, replace R8A779A0 likely copy-paste error with R8A779G0. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250904222806.193260-1-marek.vasut+renesas@mailbox.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-09-08pinctrl: renesas: Use int type to store negative error codesQianfeng Rong
Change the 'ret' variable in sh_pfc_pinconf_group_set() from unsigned int to int, as it needs to store either negative error codes or zero returned by sh_pfc_pinconf_set(). No effect on runtime. Signed-off-by: Qianfeng Rong <rongqianfeng@vivo.com> Fixes: d0593c363f04ccc4 ("pinctrl: sh-pfc: Propagate errors on group config") Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250831084958.431913-4-rongqianfeng@vivo.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-09-08pinctrl: renesas: rzg2l: Add suspend/resume support for Schmitt control ↵Biju Das
registers Renesas RZ/G3E supports a power-saving mode where power to most of the SoC components is lost, including the PIN controller. Save and restore the Schmitt control register contents to ensure the functionality is preserved after a suspend/resume cycle. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> # on RZ/G3S Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250819084022.20512-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-09-08pinctrl: renesas: rzg2l: Fix OEN resumeBiju Das
Writing to the PFC_OEN register is controlled by the write protect register (PWPR). Currently the OEN register write in resume() is done without enabling write access in PWPR leading to incorrect operation. Fixes: cd39805be85b ("pinctrl: renesas: rzg2l: Unify OEN handling across RZ/{G2L,V2H,V2N}") Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> [geert: Move spin_*lock*() calls inside if-statements] Link: https://lore.kernel.org/20250817143024.165471-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-09-08PM / devfreq: mtk-cci: avoid redundant conditionsLiao Yuanhong
While 'if (i <= 0) ... else if (i > 0) ...' is technically equivalent to 'if (i <= 0) ... else ...', the latter is vastly easier to read because it avoids writing out a condition that is unnecessary. Let's drop such unnecessary conditions. Signed-off-by: Liao Yuanhong <liaoyuanhong@vivo.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Link: https://patchwork.kernel.org/project/linux-pm/patch/20250903121452.387023-1-liaoyuanhong@vivo.com/
2025-09-08gpio: pisosr: Use devm_mutex_init()Christophe JAILLET
Use devm_mutex_init() instead of hand-writing it. This saves some LoC, improves readability and saves some space in the generated .o file. Before: ====== text data bss dec hex filename 8431 1808 192 10431 28bf drivers/gpio/gpio-pisosr.o After: ===== text data bss dec hex filename 8112 1736 192 10040 2738 drivers/gpio/gpio-pisosr.o Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Acked-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/01910ebdaba7d8d0cdc4ac60eb70da8e29cb85f1.1757251512.git.christophe.jaillet@wanadoo.fr Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08gpio: loongson-64bit: Add support for Loongson-2K0300 SoCYao Zi
This controller's input and output logic is similar to previous generations of SoCs. Additionally, it's capable of interrupt masking, and could be configured to detect levels and edges, and is supplied with a distinct reset signal. The interrupt functionality is implemented through an irqchip, whose operations are written with previous generation SoCs in mind and could be reused. Since all Loongson SoCs with similar interrupt capability (LS2K1500, LS2K2000) support byte-control mode, these operations are for byte-control mode only for simplicity. Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Huacai Chen <chenhuacai@loongson.cn> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20250904013438.2405-3-ziyao@disroot.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08gpio: Kconfig: Update help for GPIO_PCA953XAkhilesh Patil
Update help description with supported ICs from gpio-pca953x.c Include missing IC names. Signed-off-by: Akhilesh Patil <akhilesh@ee.iitb.ac.in> Link: https://lore.kernel.org/r/aLmtOWjAWPtWe/gH@bhairav-test.ee.iitb.ac.in Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08gpio: mlxbf3: use new generic GPIO chip APIBartosz Golaszewski
Convert the driver to using the new generic GPIO chip interfaces from linux/gpio/generic.h. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20250903-gpio-mmio-gpio-conv-part3-v1-12-ff346509f408@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08gpio: ep93xx: use new generic GPIO chip APIBartosz Golaszewski
Convert the driver to using the new generic GPIO chip interfaces from linux/gpio/generic.h. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20250903-gpio-mmio-gpio-conv-part3-v1-11-ff346509f408@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08gpio: ep93xx: order includes alphabeticallyBartosz Golaszewski
For better readability and easier maintenance, order the includes alphabetically. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20250903-gpio-mmio-gpio-conv-part3-v1-10-ff346509f408@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08gpio: ep93xx: allow building the module with COMPILE_TEST enabledBartosz Golaszewski
Increase build coverage by allowing the module to be built with COMPILE_TEST=y. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20250903-gpio-mmio-gpio-conv-part3-v1-9-ff346509f408@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08gpio: mlxbf: use new generic GPIO chip APIBartosz Golaszewski
Convert the driver to using the new generic GPIO chip interfaces from linux/gpio/generic.h. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20250903-gpio-mmio-gpio-conv-part3-v1-8-ff346509f408@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08gpio: tb10x: use new generic GPIO chip APIBartosz Golaszewski
Convert the driver to using the new generic GPIO chip interfaces from linux/gpio/generic.h. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20250903-gpio-mmio-gpio-conv-part3-v1-7-ff346509f408@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08gpio: tb10x: allow building the module with COMPILE_TEST=yBartosz Golaszewski
Increase build coverage by allowing the module to be built with COMPILE_TEST=y. We need an actual prompt entry in this case so add it. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20250903-gpio-mmio-gpio-conv-part3-v1-6-ff346509f408@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08gpio: tb10x: order includes alphabeticallyBartosz Golaszewski
For better readability and easier maintenance, order the includes alphabetically. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20250903-gpio-mmio-gpio-conv-part3-v1-5-ff346509f408@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08gpio: blzp1600: use new generic GPIO chip APIBartosz Golaszewski
Convert the driver to using the new generic GPIO chip interfaces from linux/gpio/generic.h. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20250903-gpio-mmio-gpio-conv-part3-v1-4-ff346509f408@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08gpio: idt3243x: use new generic GPIO chip APIBartosz Golaszewski
Convert the driver to using the new generic GPIO chip interfaces from linux/gpio/generic.h. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20250903-gpio-mmio-gpio-conv-part3-v1-3-ff346509f408@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08gpio: ixp4xx: use new generic GPIO chip APIBartosz Golaszewski
Convert the driver to using the new generic GPIO chip interfaces from linux/gpio/generic.h. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20250903-gpio-mmio-gpio-conv-part3-v1-2-ff346509f408@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08gpio: ixp4xx: allow building the module with COMPILE_TEST enabledBartosz Golaszewski
Increase build coverage by allowing the module to be built with COMPILE_TEST=y. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20250903-gpio-mmio-gpio-conv-part3-v1-1-ff346509f408@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08Merge tag 'v6.17-rc5' of ↵Bartosz Golaszewski
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into gpio/for-next Linux 6.17-rc5
2025-09-08firewire: core: code refactoring whether root node is cycle master capableTakashi Sakamoto
The check of cycle master capability in root node is currently just in a condition branch. In this case, the required variable should be within the branch. This commit is just for the purpose. Link: https://lore.kernel.org/r/20250908012108.514698-12-o-takashi@sakamocchi.jp Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2025-09-08firewire: core: code refactoring to investigate root node for bus managerTakashi Sakamoto
In the middle of bm_work function, both the value of gap_count and the state of root node are investigated. Current implementation is not a good shape since the investigation is aligned to be flat. This commit refactors the investigation with two large branches. Link: https://lore.kernel.org/r/20250908012108.514698-11-o-takashi@sakamocchi.jp Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2025-09-08firewire: core: code refactoring to detect both IEEE 1394:1995 IRM and Canon ↵Takashi Sakamoto
MV5i The detection of IEEE 1394:1995 and Canon MV5i is just required within some of the condition branches. In this case, these check can be capsulated within these branches. This commit refactors the checks. Link: https://lore.kernel.org/r/20250908012108.514698-10-o-takashi@sakamocchi.jp Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2025-09-08firewire: core: refer fw_card member to initiate bus reset under acquiring lockTakashi Sakamoto
The gap_count member of fw_card structure is referred when initiate bus reset. This reference is done out of acquiring lock. This is not good. This commit takes the reference within the acquiring lock, with additional code refactoring. Link: https://lore.kernel.org/r/20250908012108.514698-9-o-takashi@sakamocchi.jp Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2025-09-08firewire: core: code refactoring to evaluate transaction result to ↵Takashi Sakamoto
CSR_BUS_MANAGER_ID The call of bm_work should be done after acquiring spin lock of fw_card. For asynchronous transaction, the lock should be released temporarily due to event waiting. A commit 27310d561622 ("firewire: core: use guard macro to maintain properties of fw_card") applied scoped_guard() to the bm_work function, however it looks hard to follow to the control flow. This commit refactors the spin lock acquisition after the transaction. Link: https://lore.kernel.org/r/20250908012108.514698-8-o-takashi@sakamocchi.jp Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2025-09-08firewire: ohci: localize transaction data and rcode per condition branchTakashi Sakamoto
The function local variable, transaction_data, in bm_work function is conditionally used. In the case, the branch-level variable is sometimes useful. This commit uses this idea. Link: https://lore.kernel.org/r/20250908012108.514698-7-o-takashi@sakamocchi.jp Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2025-09-08firewire: core: use cleanup function in bm_workTakashi Sakamoto
In "bm_work" function, the references to fw_card and fw_node are released at last. This is achieved by using goto statements. For this case, the kernel cleanup framework is available. This commit uses the framework to remove these statements. Link: https://lore.kernel.org/r/20250908012108.514698-6-o-takashi@sakamocchi.jp Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2025-09-08firewire: core: add helper functions to access to fw_device data in fw_node ↵Takashi Sakamoto
structure The data mbmer in fw_node structure is an opaque pointer, while nowadays it is just used to refer to fw_device associated with the fw_node. This commit redefines the opaque pointer to a pointer to fw_device structure, and adds some helper functions to set/get it. Link: https://lore.kernel.org/r/20250908012108.514698-5-o-takashi@sakamocchi.jp Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2025-09-08firewire: ohci: use return value from fw_node_get()Takashi Sakamoto
The programming pattern, referring after increasing reference count, is supported by fw_node_get(). This commit simplify the programming pattern. Link: https://lore.kernel.org/r/20250908012108.514698-4-o-takashi@sakamocchi.jp Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2025-09-08firewire: core: utilize cleanup function to release workqueue in error pathTakashi Sakamoto
The helper macro, retain_and_null_ptr(), introduced by a commit 092d00ead733 ("cleanup: Provide retain_and_null_ptr()") in v6.16 kernel, is useful in the error path to release the part of structure member. This commit uses the relatively new function. Link: https://lore.kernel.org/r/20250908012108.514698-3-o-takashi@sakamocchi.jp Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2025-09-08firewire: ohci: use kcalloc() variant for array allocationTakashi Sakamoto
When allocating the list of isochronous context structure, a kzalloc() variant of managed device API is used. In this case, a kcalloc() variant is available. This commit replaces these lines with devm_kcalloc(). Link: https://lore.kernel.org/r/20250908012108.514698-2-o-takashi@sakamocchi.jp Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2025-09-07hwmon: add MP2869,MP29608,MP29612 and MP29816 series driverWensheng Wang
Add support for MPS VR mp2869/mp2869a,mp29608/mp29608a,mp29612/mp29612a and mp29816/mp29816a/mp29816b/mp29816c controller. This driver exposes telemetry and limit value readings and writtings. Signed-off-by: Wensheng Wang <wenswang@yeah.net> Link: https://lore.kernel.org/r/20250805102020.749850-2-wenswang@yeah.net Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-09-07hwmon: (nzxt-smart2) Use devm_mutex_init()Christophe JAILLET
Use devm_mutex_init() instead of hand-writing it. This saves some LoC, improves readability and saves some space in the generated .o file. Before: ====== text data bss dec hex filename 25878 11329 128 37335 91d7 drivers/hwmon/nzxt-smart2.o After: ===== text data bss dec hex filename 25551 11257 128 36936 9048 drivers/hwmon/nzxt-smart2.o Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/f51fac0871ec7dbe4e28447ee4f774d028a53426.1757240403.git.christophe.jaillet@wanadoo.fr Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-09-07hwmon: (asus-ec-sensors) add ROG STRIX X870-I GAMING WIFIMaciej Zonski
Add support for ROG STRIX X870-I GAMING WIFI Signed-off-by: Maciej Zonski <me@zonni.pl> Signed-off-by: Eugene Shalygin <eugene.shalygin@gmail.com> Link: https://lore.kernel.org/r/20250906161748.219567-1-eugene.shalygin@gmail.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-09-07hwmon: (ina238) Add support for INA700Guenter Roeck
INA700 is register compatible to INA780 but has different current, power, and energy LSB values. While the chip does not directly report the shunt voltage, report it anyway by calculating its value from the current register. Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz> # INA780 Cc: Christian Kahr <christian.kahr@sie.at> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-09-07hwmon: (ina238) Add support for INA780Guenter Roeck
INA780 is similar to the other chips in the series, but does not support the shunt voltage register. Shunt voltage limit registers have been renamed to current limit registers, but are otherwise identical. While the chip does not directly report the shunt voltage, report it anyway by calculating its value from the current register. Cc: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz> # INA780 Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-09-07hwmon: (ina238) Only configure calibration and shunt registers if neededGuenter Roeck
Prepare for supporting chips with internal shunt resistor by only setting calibration and shunt resistor registers if no current LSB is configured. Do not display a log message during probe if a chip does not have shunt and gain registers since those would otherwise display 0, and a message just indicating that the driver was loaded would be just noise. Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz> # INA780 Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-09-07hwmon: (ina238) Support active-high alert polarityGuenter Roeck
All chips supported by this driver support configurable active-high alert priority. This is already documented in the devicetree description. Add support for it to the driver. Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz> # INA780 Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-09-07hwmon: (ina238) Use the energy64 attribute type to report the energyGuenter Roeck
Use the energy64 attribute type instead of locally defined sysfs attributes to report the accumulated energy. No functional change intended. Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz> # INA780 Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-09-07hwmon: (ina238) Order chip information alphabeticallyGuenter Roeck
Order chip type enum and chip configuration data alphabetically to simplify adding support for additional chips. No functional change. Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz> # INA780 Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-09-07hwmon: (ina238) Add support for current limitsGuenter Roeck
Since the shunt voltage register and the current register now report the same values, use the shunt voltage limit registers to report and adjust current limits, using the same LSB as the LSB used for the actual current register. Handle current register accuracy differences in separate function to improve code readability. Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz> # INA780 Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-09-07hwmon: (ina238) Stop using the shunt voltage registerGuenter Roeck
Since the value of the current register and the value of the shunt register now match each other, it is no longer necessary to read the shunt voltage register in the first place. Read the current register instead and use it to calculate the shunt voltage. Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz> # INA780 Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-09-07hwmon: (ina238) Improve current dynamic rangeGuenter Roeck
The best possible dynamic range for current measurements is achieved if the shunt register value matches the current register value. Adjust the calibration register as well as fixed and default shunt resistor values accordingly to achieve this range. Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz> # INA780 Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-09-07hwmon: (ina238) Simplify voltage register accessesGuenter Roeck
Calculate voltage LSB values in the probe function and use throughout the code. Use a single function to read all voltages, independently of the register width. Use the pre-calculated LSB values to convert register values to voltages and do not rely on runtime chip specific code. Use ROUND_CLOSEST functions instead of divide operations to reduce rounding errors. Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz> # INA780 Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-09-07hwmon: (ina238) Pre-calculate current, power, and energy LSBGuenter Roeck
Current, power, and energy LSB do not change during runtime, so we can pre-calculate the respective values. The power LSB can be derived from the current LSB using the equation in the datasheets. Similar, the energy LSB can be derived from the power LSB. Also add support for chips with built-in shunt resistor by providing a chip specific configuration parameter for the current LSB. The relationship of current -> power -> energy LSB values in those chips is the same as in chips with external shunt resistor, so configuration parameters for power and energy LSB are not needed. Use ROUND_CLOSEST functions instead of divide operations to reduce rounding errors. Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz> # INA780 Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-09-07hwmon: (ina238) Rework and simplify temperature calculationsGuenter Roeck
The temperature register is 16 bit wide for all chips. The decimal point is at the same location (bit 7 = 1 degree C). That means we can use the resolution to calculate temperatures. Do that to simplify the code. There is only a single writeable temperature attribute, and it is very unlikely that the chips supported by this driver will ever require another one. That means checking for that attribute in the write function is unnecessary. Drop the check. Rename the write function from ina238_write_temp() to ina238_write_temp_max() to reflect that a single attribute is written. Also extend the accepted temperature value range to the range supported by the chip registers. Limiting the accepted value range to the temperature range supported by the chip would make it impossible to read an out-of-range limit from the chip and to write the same value back into it. This is undesirable, especially since the maximum temperature register does contain the maximum register value after a chip reset, not the temperature limit supported by the chip. Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz> # INA780 Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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