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path: root/drivers/usb/dwc3/dwc3-meson-g12a.c
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2019-08-28usb: dwc3: meson-g12a: fix suspend resume regulator unbalanced disablesNeil Armstrong
When going in suspend, in Device mode, then resuming back leads to the following: unbalanced disables for USB_PWR_EN WARNING: CPU: 0 PID: 163 at ../drivers/regulator/core.c:2590 _regulator_disable+0x104/0x180 Hardware name: Amlogic Meson G12A U200 Development Board (DT) [...] pc : _regulator_disable+0x104/0x180 lr : _regulator_disable+0x104/0x180 [...] Call trace: _regulator_disable+0x104/0x180 regulator_disable+0x40/0x78 dwc3_meson_g12a_otg_mode_set+0x84/0xb0 dwc3_meson_g12a_irq_thread+0x58/0xb8 irq_thread_fn+0x28/0x80 irq_thread+0x118/0x1b8 kthread+0xf4/0x120 ret_from_fork+0x10/0x18 This disables the regulator if enabled on suspend, and the reverse on resume. Fixes: c99993376f72 ("usb: dwc3: Add Amlogic G12A DWC3 glue") Tested-by: Kevin Hilman <khilman@baylibre.com> Reported-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2019-08-09usb: dwc3: meson-g12a: use devm_platform_ioremap_resource() to simplify codeYueHaibing
Use devm_platform_ioremap_resource() to simplify the code a bit. This is detected by coccinelle. Acked-by: Neil Armstrong <narmstrong@baylibre.com> Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2019-06-18usb: dwc3: meson-g12a: Add support for IRQ based OTG switchingNeil Armstrong
Add support for the OTG ID change interrupt to switch between Host and Device mode. Tested on the Hardkernel Odroid-N2 board. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2019-05-03usb: dwc3: Add Amlogic G12A DWC3 glueNeil Armstrong
Adds support for Amlogic G12A USB Control Glue HW. The Amlogic G12A SoC Family embeds 2 USB Controllers : - a DWC3 IP configured as Host for USB2 and USB3 - a DWC2 IP configured as Peripheral USB2 Only A glue connects these both controllers to 2 USB2 PHYs, and optionnally to an USB3+PCIE Combo PHY shared with the PCIE controller. The Glue configures the UTMI 8bit interfaces for the USB2 PHYs, including routing of the OTG PHY between the DWC3 and DWC2 controllers, and setups the on-chip OTG mode selection for this PHY. This drivers supports the on-probe setup of the OTG mode, and manually via a debugfs interface. The IRQ mode change detect is yet to be added in a future patchset, mainly due to lack of hardware to validate on. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>