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2024-08-16scsi: ufs: qcom: Add UFSHCD_QUIRK_BROKEN_LSDBS_CAP for SM8550 SoCManivannan Sadhasivam
SM8550 SoC has the UFSHCI 4.0 compliant UFS controller and only supports legacy single doorbell mode without MCQ. But due to a hardware bug, it reports 1 in the 'Legacy Queue & Single Doorbell Support (LSDBS)' field of the Controller Capabilities register. This field is supposed to read as 0 if legacy single doorbell mode is supported and 1 otherwise. Starting with commit 0c60eb0cc320 ("scsi: ufs: core: Check LSDBS cap when !mcq"), ufshcd driver is now relying on the LSDBS field to decide when to use the legacy doorbell mode if MCQ is not supported. And this ends up breaking UFS on SM8550: ufshcd-qcom 1d84000.ufs: ufshcd_init: failed to initialize (legacy doorbell mode not supported) ufshcd-qcom 1d84000.ufs: error -EINVAL: Initialization failed with error -22 So use the UFSHCD_QUIRK_BROKEN_LSDBS_CAP quirk for SM8550 SoC so that the ufshcd driver could use legacy doorbell mode correctly. Fixes: 0c60eb0cc320 ("scsi: ufs: core: Check LSDBS cap when !mcq") Tested-by: Amit Pundir <amit.pundir@linaro.org> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20240816-ufs-bug-fix-v3-2-e6fe0e18e2a3@linaro.org Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-08-16scsi: ufs: ufshcd-pltfrm: Signedness bug in ufshcd_parse_clock_info()Dan Carpenter
The "sz" variable needs to be a signed type for the error handling to work as intended. Fortunately, there is some sanity checking on "sz" on the next line, so negative values would be caught and it doesn't really affect runtime. Fixes: eab0dce11dd9 ("scsi: ufs: ufshcd-pltfrm: Use of_property_count_u32_elems() to get property length") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Link: https://lore.kernel.org/r/404a4727-89c6-410b-9ece-301fa399d4db@stanley.mountain Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-08-12scsi: ufs: ufshcd-pltfrm: Use of_property_count_u32_elems() to get property ↵Rob Herring (Arm)
length Replace of_get_property() with the type specific of_property_count_u32_elems() to get the property length. This is part of a larger effort to remove callers of of_get_property() and similar functions. of_get_property() leaks the DT property data pointer which is a problem for dynamically allocated nodes which may be freed. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20240808170704.1438658-1-robh@kernel.org Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-08-12scsi: ufs: ufshcd-pltfrm: Use of_property_present()Rob Herring (Arm)
Use of_property_present() to test for property presence rather than of_find_property(). This is part of a larger effort to remove callers of of_find_property() and similar functions. of_find_property() leaks the DT struct property and data pointers which is a problem for dynamically allocated nodes which may be freed. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20240808170644.1436991-1-robh@kernel.org Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-07-22scsi: ufs: exynos: Don't resume FMP when crypto support is disabledEric Biggers
If exynos_ufs_fmp_init() did not enable FMP support, then exynos_ufs_fmp_resume() should not execute the FMP-related SMC calls. Fixes: c96499fcb403 ("scsi: ufs: exynos: Add support for Flash Memory Protector (FMP)") Signed-off-by: Eric Biggers <ebiggers@google.com> Link: https://lore.kernel.org/r/20240721183840.209284-1-ebiggers@kernel.org Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-07-10Merge patch series "Basic inline encryption support for ufs-exynos"Martin K. Petersen
Eric Biggers <ebiggers@kernel.org> says: Add support for Flash Memory Protector (FMP), which is the inline encryption hardware on Exynos and Exynos-based SoCs. Specifically, add support for the "traditional FMP mode" that works on many Exynos-based SoCs including gs101. This is the mode that uses "software keys" and is compatible with the upstream kernel's existing inline encryption framework in the block and filesystem layers. I plan to add support for the wrapped key support on gs101 at a later time. Tested on gs101 (specifically Pixel 6) by running the 'encrypt' group of xfstests on a filesystem mounted with the 'inlinecrypt' mount option. This patchset applies to v6.10-rc6, and it has no prerequisites that aren't already upstream. Link: https://lore.kernel.org/r/20240708235330.103590-1-ebiggers@kernel.org Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-07-10scsi: ufs: exynos: Add support for Flash Memory Protector (FMP)Eric Biggers
Add support for Flash Memory Protector (FMP), which is the inline encryption hardware on Exynos and Exynos-based SoCs. Specifically, add support for the "traditional FMP mode" that works on many Exynos-based SoCs including gs101. This is the mode that uses "software keys" and is compatible with the upstream kernel's existing inline encryption framework in the block and filesystem layers. I plan to add support for the wrapped key support on gs101 at a later time. Tested on gs101 (specifically Pixel 6) by running the 'encrypt' group of xfstests on a filesystem mounted with the 'inlinecrypt' mount option. Signed-off-by: Eric Biggers <ebiggers@google.com> Link: https://lore.kernel.org/r/20240708235330.103590-7-ebiggers@kernel.org Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Tested-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-07-10Merge patch series "UFS patches for kernel 6.11"Martin K. Petersen
Bart Van Assche <bvanassche@acm.org> says: Hi Martin, Please consider this series of UFS driver patches for the next merge window. Thank you, Bart. Link: https://lore.kernel.org/r/20240708211716.2827751-1-bvanassche@acm.org Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-07-10scsi: ufs: core: Inline is_mcq_enabled()Bart Van Assche
Improve code readability by inlining is_mcq_enabled(). Cc: Peter Wang <peter.wang@mediatek.com> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Link: https://lore.kernel.org/r/20240708211716.2827751-7-bvanassche@acm.org Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-07-04scsi: ufs: qcom: Enable suspending clk scaling on no requestRam Prakash Gupta
Enable suspending clk scaling on no request for Qualcomm SoC. Signed-off-by: Ram Prakash Gupta <quic_rampraka@quicinc.com> Link: https://lore.kernel.org/r/20240627083756.25340-3-quic_rampraka@quicinc.com Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-06-26scsi: ufs: ufs-pci: Add support for Intel Panther LakeAdrian Hunter
Add PCI ID to support Intel Panther Lake, same as MTL. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20240618073158.38504-1-adrian.hunter@intel.com Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-06-26scsi: ufs: qcom: Add missing MODULE_DESCRIPTION() macroJeff Johnson
With ARCH=arm64, make allmodconfig && make W=1 C=1 reports: WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/ufs/host/ufs-qcom.o Add the missing invocation of the MODULE_DESCRIPTION() macro. Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com> Link: https://lore.kernel.org/r/20240625-md-drivers-ufs-host-v2-1-59a56974b05a@quicinc.com Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-06-04scsi: ufs: pci: Add support MCQ for QEMU-based UFSMinwoo Im
Recently, ufs-mcq feature has been introduced to QEMU hw/ufs device [1]. This patch adds MCQ support for upstream QEMU UFS PCI controller. This patch provides mandatory vops callbacks to make UFS controller work properly on MCQ mode. Operation and Runtime Config register stride is fixed to 48bytes which is implemented by qemu. [1] https://lore.kernel.org/qemu-devel/cover.1716876237.git.jeuk20.kim@samsung.com/ Signed-off-by: Minwoo Im <minwoo.im@samsung.com> Link: https://lore.kernel.org/r/20240531212244.1593535-2-minwoo.im@samsung.com Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-05-30scsi: ufs: core: Maximum RTT supported by the host driverAvri Altman
Allow platform vendors to take precedence having their own max rtt support. This makes sense because the host controller's nortt characteristic may vary among vendors. while at it, set this value for Mediatek, as requested by Peter - https://lore.kernel.org/all/0a57d6bab739d6a10584f2baba115d00dfc9c94c.camel@mediatek.com/ Signed-off-by: Avri Altman <avri.altman@wdc.com> Link: https://lore.kernel.org/r/20240530142510.734-3-avri.altman@wdc.com Reviewed-by: Peter Wang <peter.wang@mediatek.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-05-14Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsiLinus Torvalds
Pull SCSI updates from James Bottomley: "Updates to the usual drivers (ufs, lpfc, qla2xxx, mpi3mr, libsas). The major update (which causes a conflict with block, see below) is Christoph removing the queue limits and their associated block helpers. The remaining patches are assorted minor fixes and deprecated function updates plus a bit of constification" * tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: (141 commits) scsi: mpi3mr: Sanitise num_phys scsi: lpfc: Copyright updates for 14.4.0.2 patches scsi: lpfc: Update lpfc version to 14.4.0.2 scsi: lpfc: Add support for 32 byte CDBs scsi: lpfc: Change lpfc_hba hba_flag member into a bitmask scsi: lpfc: Introduce rrq_list_lock to protect active_rrq_list scsi: lpfc: Clear deferred RSCN processing flag when driver is unloading scsi: lpfc: Update logging of protection type for T10 DIF I/O scsi: lpfc: Change default logging level for unsolicited CT MIB commands scsi: target: Remove unused list 'device_list' scsi: iscsi: Remove unused list 'connlist_err' scsi: ufs: exynos: Add support for Tensor gs101 SoC scsi: ufs: exynos: Add some pa_dbg_ register offsets into drvdata scsi: ufs: exynos: Allow max frequencies up to 267Mhz scsi: ufs: exynos: Add EXYNOS_UFS_OPT_TIMER_TICK_SELECT option scsi: ufs: exynos: Add EXYNOS_UFS_OPT_UFSPR_SECURE option scsi: ufs: dt-bindings: exynos: Add gs101 compatible scsi: qla2xxx: Fix debugfs output for fw_resource_count scsi: qedf: Ensure the copied buf is NUL terminated scsi: bfa: Ensure the copied buf is NUL terminated ...
2024-05-06Merge patch series "ufs-exynos support for Tensor GS101"Martin K. Petersen
Peter Griffin <peter.griffin@linaro.org> says: Hi Martin, James & Alim, This series adds support to the ufs-exynos driver for Tensor gs101 found in Pixel 6. It was send previously in [1] and [2] but included the other clock, phy and DTS parts. This series has been split into just the ufs-exynos part to hopefully make things easier. With this series, plus the phy, clock and dts changes UFS is functional upstream for Pixel 6. The SKhynix HN8T05BZGKX015 can be enumerated, partitions mounted etc. The series is split into some prepatory patches for ufs-exynos and a final patch that adds the gs101 support. Note the sysreg clock has been moved to ufs node as fine grained clock control around the syscon sysreg register accesses doesn't result in functional UFS. regards, Peter Link: https://lore.kernel.org/r/20240426122004.2249178-1-peter.griffin@linaro.org Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-05-06scsi: ufs: exynos: Add support for Tensor gs101 SoCPeter Griffin
Add a dedicated compatible and drv_data with associated hooks for gs101 SoC found on Pixel 6. Note we make use of the previously added EXYNOS_UFS_OPT_UFSPR_SECURE option, to skip initialisation of UFSPR registers as these are only accessible via SMC call. EXYNOS_UFS_OPT_TIMER_TICK_SELECT option is also set to select tick source. This has been done so as not to effect any existing platforms. DBG_OPTION_SUITE on gs101 has different address offsets to other SoCs so these register offsets now come from uic_attr struct. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20240426122004.2249178-7-peter.griffin@linaro.org Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Tested-by: Will McVicker <willmcvicker@google.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-05-06scsi: ufs: exynos: Add some pa_dbg_ register offsets into drvdataPeter Griffin
This allows these registers to be at different offsets or not exist at all on some SoCs variants. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20240426122004.2249178-6-peter.griffin@linaro.org Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Tested-by: Will McVicker <willmcvicker@google.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-05-06scsi: ufs: exynos: Allow max frequencies up to 267MhzPeter Griffin
Platforms such as Tensor gs101 the pclk frequency is 267Mhz. Increase PCLK_AVAIL_MAX so we don't fail the frequency check. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20240426122004.2249178-5-peter.griffin@linaro.org Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Tested-by: Will McVicker <willmcvicker@google.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-05-06scsi: ufs: exynos: Add EXYNOS_UFS_OPT_TIMER_TICK_SELECT optionPeter Griffin
This option is intended to be set for SoCs that have HCI_V2P1_CTRL register and can select their tick source via IA_TICK_SEL bit. Source clock selection for timer tick 0x0 = Bus clock (aclk) 0x1 = Function clock (mclk) Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20240426122004.2249178-4-peter.griffin@linaro.org Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Will McVicker <willmcvicker@google.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-05-06scsi: ufs: exynos: Add EXYNOS_UFS_OPT_UFSPR_SECURE optionPeter Griffin
This option is intended to be set on platforms whose ufspr registers are only accessible via smc call (such as gs101). Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20240426122004.2249178-3-peter.griffin@linaro.org Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Will McVicker <willmcvicker@google.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-04-12Merge patch series "convert SCSI to atomic queue limits, part 1 (v3)"Martin K. Petersen
Christoph Hellwig <hch@lst.de> says: Hi all, this series converts the SCSI midlayer and LLDDs to use atomic queue limits API. It is pretty straight forward, except for the mpt3mr driver which does really weird and probably already broken things by setting limits from unlocked device iteration callbacks. I will probably defer the (more complicated) ULD changes to the next merge window as they would heavily conflict with Damien's zone write plugging series. With that the series could go in through the SCSI tree if Jens' ACKs the core block layer bits. Link: https://lore.kernel.org/r/20240409143748.980206-1-hch@lst.de Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-04-11scsi: ufs: mediatek: Fix module autoloadingKrzysztof Kozlowski
Add MODULE_DEVICE_TABLE() so the module can be properly autoloaded based on the alias from of_device_id table. Cc: Will McVicker <willmcvicker@google.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240409203954.80484-1-krzysztof.kozlowski@linaro.org Reviewed-by: Will McVicker <willmcvicker@google.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Peter Wang <peter.wang@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-04-11scsi: ufs: exynos: Support module autoloadingWill McVicker
Export the module alias information using the MODULE_DEVICE_TABLE() macro in order to support auto-loading this module for devices that support it. $ modinfo -F alias out/linux/drivers/ufs/host/ufs-exynos.ko of:N*T*Ctesla,fsd-ufsC* of:N*T*Ctesla,fsd-ufs of:N*T*Csamsung,exynosautov9-ufs-vhC* of:N*T*Csamsung,exynosautov9-ufs-vh of:N*T*Csamsung,exynosautov9-ufsC* of:N*T*Csamsung,exynosautov9-ufs of:N*T*Csamsung,exynos7-ufsC* of:N*T*Csamsung,exynos7-ufs Signed-off-by: Will McVicker <willmcvicker@google.com> Link: https://lore.kernel.org/r/20240409202203.1308163-1-willmcvicker@google.com Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-04-11scsi: ufs: Remove support for old UFSHCI versionsAvri Altman
UFS spec version 2.1 was published more than 10 years ago. It is vanishingly unlikely that even there are out there platforms that uses earlier host controllers, let alone that those ancient platforms will ever run a V6.10 kernel. To be extra cautious, leave out removal of UFSHCI 2.0 support from this patch, and just remove support of host controllers prior to UFS2.0. This patch removes some legacy tuning calls that no longer apply. Signed-off-by: Avri Altman <avri.altman@wdc.com> Link: https://lore.kernel.org/r/20240410183720.908-2-avri.altman@wdc.com Acked-by: Bean Huo <beanhuo@micron.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-04-11scsi: ufs: ufs-exynos: Move setting the the DMA alignment to the init methodChristoph Hellwig
Use the SCSI host's dma_alignment field and set it in ->init and remove the now unused config_scsi_dev method. Signed-off-by: Christoph Hellwig <hch@lst.de> Link: https://lore.kernel.org/r/20240409143748.980206-9-hch@lst.de Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Damien Le Moal <dlemoal@kernel.org> Reviewed-by: Hannes Reinecke <hare@suse.de> Reviewed-by: Johannes Thumshirn <johannes.thumshirn@wdc.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-04-08scsi: ufs: qcom: Add sanity checks for gear/lane values during ICC scalingManivannan Sadhasivam
Let's add the checks to warn the user if the ICC scaling is not supported for the gear/lane values and also fallback to the max value if that's the case. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20240403-ufs-icc-fix-v2-2-958412a5eb45@linaro.org Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-04-08scsi: ufs: qcom: Add missing interconnect bandwidth values for Gear 5Manivannan Sadhasivam
These entries are necessary to scale the interconnect bandwidth while operating in Gear 5. Cc: Amit Pundir <amit.pundir@linaro.org> Fixes: 03ce80a1bb86 ("scsi: ufs: qcom: Add support for scaling interconnects") Tested-by: Amit Pundir <amit.pundir@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20240403-ufs-icc-fix-v2-1-958412a5eb45@linaro.org Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-04-05Merge patch series "scsi: ufs: Remove overzealous memory barriers"Martin K. Petersen
Andrew Halaney <ahalaney@redhat.com> says: Please review with care as I'm not all that confident in this subject. UFS has a lot of mb() variants used, most with comments saying "ensure this takes effect before continuing". mb()'s aren't really the way to guarantee that, a read back is the best method. Some of these though I think could go a step further and remove the mb() variant without a read back. As far as I can tell there's no real reason to ensure it takes effect in most cases (there's no delay() or anything afterwards, and eventually another readl()/writel() happens which is by definition ordered). Some of the patches in this series do that if I was confident it was safe (or a reviewer pointed out prior that they thought it was safe to do so). Thanks in advance for the help, Andrew Link: https://lore.kernel.org/r/20240329-ufs-reset-ensure-effect-before-delay-v5-0-181252004586@redhat.com Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-04-05scsi: ufs: cdns-pltfrm: Perform read back after writing HCLKDIVAndrew Halaney
Currently, HCLKDIV is written to and then completed with an mb(). mb() ensures that the write completes, but completion doesn't mean that it isn't stored in a buffer somewhere. The recommendation for ensuring this bit has taken effect on the device is to perform a read back to force it to make it all the way to the device. This is documented in device-io.rst and a talk by Will Deacon on this can be seen over here: https://youtu.be/i6DayghhA8Q?si=MiyxB5cKJXSaoc01&t=1678 Let's do that to ensure the bit hits the device. Because the mb()'s purpose wasn't to add extra ordering (on top of the ordering guaranteed by writel()/readl()), it can safely be removed. Fixes: d90996dae8e4 ("scsi: ufs: Add UFS platform driver for Cadence UFS") Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20240329-ufs-reset-ensure-effect-before-delay-v5-6-181252004586@redhat.com Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-04-05scsi: ufs: qcom: Perform read back after writing CGC enableAndrew Halaney
Currently, the CGC enable bit is written and then an mb() is used to ensure that completes before continuing. mb() ensures that the write completes, but completion doesn't mean that it isn't stored in a buffer somewhere. The recommendation for ensuring this bit has taken effect on the device is to perform a read back to force it to make it all the way to the device. This is documented in device-io.rst and a talk by Will Deacon on this can be seen over here: https://youtu.be/i6DayghhA8Q?si=MiyxB5cKJXSaoc01&t=1678 Let's do that to ensure the bit hits the device. Because the mb()'s purpose wasn't to add extra ordering (on top of the ordering guaranteed by writel()/readl()), it can safely be removed. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Can Guo <quic_cang@quicinc.com> Fixes: 81c0fc51b7a7 ("ufs-qcom: add support for Qualcomm Technologies Inc platforms") Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20240329-ufs-reset-ensure-effect-before-delay-v5-5-181252004586@redhat.com Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-04-05scsi: ufs: qcom: Perform read back after writing unipro modeAndrew Halaney
Currently, the QUNIPRO_SEL bit is written to and then an mb() is used to ensure that completes before continuing. mb() ensures that the write completes, but completion doesn't mean that it isn't stored in a buffer somewhere. The recommendation for ensuring this bit has taken effect on the device is to perform a read back to force it to make it all the way to the device. This is documented in device-io.rst and a talk by Will Deacon on this can be seen over here: https://youtu.be/i6DayghhA8Q?si=MiyxB5cKJXSaoc01&t=1678 But, there's really no reason to even ensure completion before continuing. The only requirement here is that this write is ordered to this endpoint (which readl()/writel() guarantees already). For that reason the mb() can be dropped altogether without anything forcing completion. Fixes: f06fcc7155dc ("scsi: ufs-qcom: add QUniPro hardware support and power optimizations") Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20240329-ufs-reset-ensure-effect-before-delay-v5-4-181252004586@redhat.com Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-04-05scsi: ufs: qcom: Remove unnecessary mb() after writing testbus configAndrew Halaney
Currently, the testbus configuration is written and completed with an mb(). mb() ensures that the write completes, but completion doesn't mean that it isn't stored in a buffer somewhere. The recommendation for ensuring this bit has taken effect on the device is to perform a read back to force it to make it all the way to the device. This is documented in device-io.rst and a talk by Will Deacon on this can be seen over here: https://youtu.be/i6DayghhA8Q?si=MiyxB5cKJXSaoc01&t=1678 But, there's really no reason to even ensure completion before continuing. The only requirement here is that this write is ordered to this endpoint (which readl()/writel() guarantees already). For that reason the mb() can be dropped altogether without anything forcing completion. Fixes: 9c46b8676271 ("scsi: ufs-qcom: dump additional testbus registers") Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20240329-ufs-reset-ensure-effect-before-delay-v5-3-181252004586@redhat.com Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-04-05scsi: ufs: qcom: Perform read back after writing REG_UFS_SYS1CLK_1USAndrew Halaney
Currently after writing to REG_UFS_SYS1CLK_1US a mb() is used to ensure that write has gone through to the device. mb() ensures that the write completes, but completion doesn't mean that it isn't stored in a buffer somewhere. The recommendation for ensuring this bit has taken effect on the device is to perform a read back to force it to make it all the way to the device. This is documented in device-io.rst and a talk by Will Deacon on this can be seen over here: https://youtu.be/i6DayghhA8Q?si=MiyxB5cKJXSaoc01&t=1678 Let's do that to ensure the bit hits the device. Because the mb()'s purpose wasn't to add extra ordering (on top of the ordering guaranteed by writel()/readl()), it can safely be removed. Fixes: f06fcc7155dc ("scsi: ufs-qcom: add QUniPro hardware support and power optimizations") Reviewed-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20240329-ufs-reset-ensure-effect-before-delay-v5-2-181252004586@redhat.com Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-04-05scsi: ufs: qcom: Perform read back after writing reset bitAndrew Halaney
Currently, the reset bit for the UFS provided reset controller (used by its phy) is written to, and then a mb() happens to try and ensure that hit the device. Immediately afterwards a usleep_range() occurs. mb() ensures that the write completes, but completion doesn't mean that it isn't stored in a buffer somewhere. The recommendation for ensuring this bit has taken effect on the device is to perform a read back to force it to make it all the way to the device. This is documented in device-io.rst and a talk by Will Deacon on this can be seen over here: https://youtu.be/i6DayghhA8Q?si=MiyxB5cKJXSaoc01&t=1678 Let's do that to ensure the bit hits the device. By doing so and guaranteeing the ordering against the immediately following usleep_range(), the mb() can safely be removed. Fixes: 81c0fc51b7a7 ("ufs-qcom: add support for Qualcomm Technologies Inc platforms") Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20240329-ufs-reset-ensure-effect-before-delay-v5-1-181252004586@redhat.com Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-03-25Merge patch series "ufs: host: mediatek: Provide features and fixes in ↵Martin K. Petersen
MediaTek platforms" Peter Wang <peter.wang@mediatek.com> says: This series fixes some defects and provide features in MediaTek UFS drivers. Link: https://lore.kernel.org/r/20240315083448.7185-1-peter.wang@mediatek.com Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-03-25scsi: ufs: mediatek: Support rtff in PM flowAlice Chao
Add mtcmos control function and config. Signed-off-by: Alice Chao <alice.chao@mediatek.com> Reviewed-by: Peter Wang <peter.wang@mediatek.com> Acked-by: Chun-Hung Wu <Chun-Hung.Wu@mediatek.com> Signed-off-by: Peter Wang <peter.wang@mediatek.com> Link: https://lore.kernel.org/r/20240315083448.7185-8-peter.wang@mediatek.com Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-03-25scsi: ufs: mediatek: Support mphy resetPeter Wang
Reset mphy when resetting host. Backup mphy setting after mphy reset control get. Restore mphy setting after mphy reset. Acked-by: Chun-Hung Wu <Chun-Hung.Wu@mediatek.com> Signed-off-by: Peter Wang <peter.wang@mediatek.com> Link: https://lore.kernel.org/r/20240315083448.7185-7-peter.wang@mediatek.com Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-03-25scsi: ufs: mediatek: Rename host power control APIPo-Wen Kao
Mediatek host power includes two parts: 1. ufshci power, which is the main power of ufs host controller. 2. ufshci crypto sram power, which is the power of ufs crypto engine. The host power control is actually controlling crypto sram power. Rename it. Signed-off-by: Po-Wen Kao <powen.kao@mediatek.com> Acked-by: Chun-Hung Wu <Chun-Hung.Wu@mediatek.com> Reviewed-by: Peter Wang <peter.wang@mediatek.com> Signed-off-by: Peter Wang <peter.wang@mediatek.com> Reviewed-by: Avri Altman <avri.altman@wdc.com> Link: https://lore.kernel.org/r/20240315083448.7185-6-peter.wang@mediatek.com Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-03-25scsi: ufs: mediatek: UFS mtk sip command reconstructPo-Wen Kao
Move sip command and associated define to a new sip header file. Signed-off-by: Po-Wen Kao <powen.kao@mediatek.com> Acked-by: Chun-Hung Wu <Chun-Hung.Wu@mediatek.com> Reviewed-by: Peter Wang <peter.wang@mediatek.com> Signed-off-by: Peter Wang <peter.wang@mediatek.com> Link: https://lore.kernel.org/r/20240315083448.7185-5-peter.wang@mediatek.com Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-03-25scsi: ufs: mediatek: Add UFS_MTK_CAP_DISABLE_MCQPo-Wen Kao
Add new mediatek host cap UFS_MTK_CAP_DISABLE_MCQ to allow disabling MCQ feature by assigning dts boolean property "mediatek,ufs-disable-mcq". Signed-off-by: Po-Wen Kao <powen.kao@mediatek.com> Reviewed-by: Peter Wang <peter.wang@mediatek.com> Acked-by: Chun-Hung Wu <Chun-Hung.Wu@mediatek.com> Signed-off-by: Peter Wang <peter.wang@mediatek.com> Reviewed-by: Avri Altman <avri.altman@wdc.com> Link: https://lore.kernel.org/r/20240315083448.7185-4-peter.wang@mediatek.com Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-03-25scsi: ufs: mediatek: TX skew fixPeter Wang
Fix Mediatek TX skew issue by checking dts setting and vendor/model. Then set PA_TACTIVATE to 8. Signed-off-by: Peter Wang <peter.wang@mediatek.com> Acked-by: Chun-Hung Wu <Chun-Hung.Wu@mediatek.com> Reviewed-by: Avri Altman <avri.altman@wdc.com> Link: https://lore.kernel.org/r/20240315083448.7185-3-peter.wang@mediatek.com Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-03-25scsi: ufs: mediatek: Fix vsx/vccqx control logicPeter Wang
VSX (the upper layer of VCCQ/VCCQ2) should: 1. Always set to hpm mode if ufs device is active. 2. Enter lpm mode only if ufs device is not active. VCCQX should: 1. Keep hpm mode if vccq and vccq2 not set in dts. 2. Keep hpm mode if vcc not set in dts keep vcc always on. 3. Keep hpm if broken vcc keep vcc always on and not allow vccq lpm. 4. Except upper case, can enter lpm mode if ufs device is not active. Acked-by: Chun-Hung Wu <Chun-Hung.Wu@mediatek.com> Signed-off-by: Peter Wang <peter.wang@mediatek.com> Link: https://lore.kernel.org/r/20240315083448.7185-2-peter.wang@mediatek.com Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-03-25Merge branch '6.9/scsi-queue' into 6.9/scsi-fixesMartin K. Petersen
Pull in the outstanding updates from the 6.9/scsi-queue branch. Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-03-16Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsiLinus Torvalds
Pull SCSI updates from James Bottomley: "Only a couple of driver updates this time (lpfc and mpt3sas) plus the usual assorted minor fixes and updates. The major core update is a set of patches moving retries out of the drivers and into the core" * tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: (84 commits) scsi: core: Constify the struct device_type usage scsi: libfc: replace deprecated strncpy() with memcpy() scsi: lpfc: Replace deprecated strncpy() with strscpy() scsi: bfa: Fix function pointer type mismatch for state machines scsi: bfa: Fix function pointer type mismatch for hcb_qe->cbfn scsi: bfa: Remove additional unnecessary struct declarations scsi: csiostor: Avoid function pointer casts scsi: qla1280: Remove redundant assignment to variable 'mr' scsi: core: Make scsi_bus_type const scsi: core: Really include kunit tests with SCSI_LIB_KUNIT_TEST scsi: target: tcm_loop: Make tcm_loop_lld_bus const scsi: scsi_debug: Make pseudo_lld_bus const scsi: iscsi: Make iscsi_flashnode_bus const scsi: fcoe: Make fcoe_bus_type const scsi: lpfc: Copyright updates for 14.4.0.0 patches scsi: lpfc: Update lpfc version to 14.4.0.0 scsi: lpfc: Change lpfc_vport load_flag member into a bitmask scsi: lpfc: Change lpfc_vport fc_flag member into a bitmask scsi: lpfc: Protect vport fc_nodes list with an explicit spin lock scsi: lpfc: Change nlp state statistic counters into atomic_t ...
2024-03-10scsi: ufs: qcom: Provide default cycles_in_1us valueDmitry Baryshkov
The MSM8996 DT doesn't provide frequency limits for the core_clk_unipro clock, which results in miscalculation of the cycles_in_1us value. Provide the backwards-compatible default to support existing MSM8996 DT files. Fixes: b4e13e1ae95e ("scsi: ufs: qcom: Add multiple frequency support for MAX_CORE_CLK_1US_CYCLES") Cc: Nitin Rawat <quic_nitirawa@quicinc.com> Cc: stable@vger.kernel.org # 6.7.x Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240218-msm8996-fix-ufs-v3-1-40aab49899a3@linaro.org Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-02-15irqchip: Convert all platform MSI users to the new APIThomas Gleixner
Switch all the users of the platform MSI domain over to invoke the new interfaces which branch to the original platform MSI functions when the irqdomain associated to the caller device does not yet provide MSI parent functionality. No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240127161753.114685-7-apatel@ventanamicro.com
2024-01-24scsi: ufs: qcom: Avoid re-init quirk when gears matchEric Chanudet
On sa8775p-ride, probing the HBA will go through the UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH path although the power info is the same during the second init. The REINIT quirk only applies starting with controller v4. For these, ufs_qcom_get_hs_gear() reads the highest supported gear when setting the host_params. After the negotiation, if the host and device are on the same gear, it is the highest gear supported between the two. Skip REINIT to save some time. Signed-off-by: Eric Chanudet <echanude@redhat.com> Link: https://lore.kernel.org/r/20240123192854.1724905-4-echanude@redhat.com Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8775p-ride Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-01-24scsi: ufs: qcom: Clarify comments about the initial phy_gearAndrew Halaney
The comments that currently are within the hw_ver < 4 conditional are misleading. They really apply to various branches of the conditionals there and incorrectly state that the phy_gear value can increase. Right now the logic is to: - Default to max supported gear for phy_gear - Set phy_gear to minimum value if version < 4 since those versions only support one PHY init sequence (and therefore don't need reinit) - Set phy_gear to the optimal value if the device version is already populated in the controller registers on boot Let's move some of the comment to outside the if statement and clean up the bit left about switching to a higher gear on reinit. This way the comment more accurately reflects the logic. Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20240123-ufs-reinit-comments-v1-1-ff2b3532d7fe@redhat.com Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-01-23scsi: ufs: mcq: Add definition for REG_UFS_MEM_CFG registerChanWoo Lee
Instead of hardcoding the register field, add the proper definition. While at it, let's also use ufshcd_rmwl() to simplify updating this register. Reviewed-by: Peter Wang <peter.wang@mediatek.com> Signed-off-by: ChanWoo Lee <cw9316.lee@samsung.com> Link: https://lore.kernel.org/r/20240102014222.23351-1-cw9316.lee@samsung.com Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-08-05 09:11:20 +0000