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path: root/drivers/soc/mediatek/mtk-pm-domains.c
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2023-01-19soc: mediatek: pm-domains: Add buck isolation setting in power domainAllen-KH Cheng
In some chipsets, we need to disable EXT_BUCK_ISO before turning on the specific power pm-domains (mtcmos), such as ADSP in MT8192 and CAM_VCORE in MT8188. Add the MTK_SCPD_EXT_BUCK_ISO flag to control the buck isolation setting in the mediatek power domain driver. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230117032640.13504-3-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-01-19soc: mediatek: pm-domains: Add support for mt8188Garmin.Chang
Add domain control data including bus protection data size change due to more protection steps in mt8188. Signed-off-by: Garmin.Chang <Garmin.Chang@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221223080553.9397-3-Garmin.Chang@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-12-16soc: mediatek: pm-domains: Fix the power glitch issueChun-Jie Chen
Power reset maybe generate unexpected signal. In order to avoid the glitch issue, we need to enable isolation first to guarantee the stable signal when power reset is triggered. Fixes: 59b644b01cf4 ("soc: mediatek: Add MediaTek SCPSYS power domains") Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: Miles Chen <miles.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221014102029.1162-1-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-08-31soc: mediatek: pm-domains: Simplify some error messageChristophe JAILLET
dev_err_probe() already prints the error code in a human readable way, so there is no need to duplicate it as a numerical value at the end of the message. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/e6ba80d8e27fdb2b1527c7eae6687e481960c81d.1659735996.git.christophe.jaillet@wanadoo.fr Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-07-08soc: mediatek: pm-domains: Add support for Helio X10 MT6795AngeloGioacchino Del Regno
Add pm-domains (mtcmos) data for MediaTek Helio X10 MT6795 SoC. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220503141441.125852-3-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-06-17soc: mediatek: pm-domains: Add support always on flagChunfeng Yun
There is a t-phy shared by PCIe and USB3 on mt8195, if the t-phy is used by PCIe, when power off its mtcmos, need software reset it (workaround way, usually hardware do it, but has an issue on mt8195), but it has side effect to USB2 phy(works with USB3 phy to support USB3.2 Gen1), so add support GENPD_FLAG_ALWAYS_ON flag, and make its power always on. Another reason is that USB3.2 Gen1/2 need keep power always on when support runtime-pm due to hardware limitation until now. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220617095841.23031-1-chunfeng.yun@mediatek.com [mb: smaller nit fixes on commit message] Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-02-28soc: mediatek: pm-domains: Add support for mt8186Chun-Jie Chen
Add power domain control data in mt8186. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Link: https://lore.kernel.org/r/20220215104917.5726-3-chun-jie.chen@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-02-28soc: mediatek: pm-domains: Add support for mt8195Chun-Jie Chen
Add domain control data including bus protection data size change due to more protection steps in mt8195. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220130012104.5292-6-chun-jie.chen@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-02-28soc: mediatek: pm-domains: Move power status offset to power domain dataChun-Jie Chen
MT8195 has more than 32 power domains so it needs two set of pwr_sta and pwr_sta2nd registers, so move the register offset from soc data into power domain data. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220130012104.5292-5-chun-jie.chen@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-02-28soc: mediatek: pm-domains: Add wakeup capacity support in power domainChun-Jie Chen
Due to some power domain needs to keep on for wakeup in system suspend, so add GENPD_FLAG_ACTIVE_WAKEUP support in Mediatek power domain driver. Fixes: 59b644b01cf4 ("soc: mediatek: Add MediaTek SCPSYS power domains") Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220130012104.5292-3-chun-jie.chen@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-06-02soc: mtk-pm-domains: Fix the clock prepared issueWeiyi Lu
In this new power domain driver, when adding one power domain it will prepare the dependent clocks at the same. So we only do clk_bulk_enable/disable control during power ON/OFF. When system suspend, the pm runtime framework will forcely power off power domains. However, the dependent clocks are disabled but kept prepared. In MediaTek clock drivers, PLL would be turned ON when we do clk_bulk_prepare control. Clock hierarchy: PLL --> DIV_CK --> CLK_MUX (may be dependent clocks) --> SUBSYS_CG (may be dependent clocks) It will lead some unexpected clock states during system suspend. This patch will fix by doing prepare_enable/disable_unprepare on dependent clocks at the same time while we are going to power on/off any power domain. Fixes: 59b644b01cf4 ("soc: mediatek: Add MediaTek SCPSYS power domains") Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: chun-jie.chen <chun-jie.chen@mediatek.com> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20210601035905.2970384-1-hsinyi@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-06-02soc: mtk-pm-domains: do not register smi node as sysconHsin-Yi Wang
Mediatek requires mmsys clocks to be unprepared during suspend, otherwise system has chances to hang. syscon_regmap_lookup_by_phandle_optional() will attach and prepare the first clock in smi node, leading to additional prepare to the clock which is not balanced with the prepare/unprepare pair in resume/suspend callbacks. If a power domain node requests an smi node and the smi node's first clock is an mmsys clock, it will results in an unstable suspend resume. Fixes: f414854c8843 ("soc: mediatek: pm-domains: Add SMI block as bus protection block") Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: chun-jie.chen <chun-jie.chen@mediatek.com> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20210601035905.2970384-2-hsinyi@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-04-01soc: mediatek: pm-domains: Add a meaningful power domain nameEnric Balletbo i Serra
Add the power domains names to the power domain struct so we have meaningful name for every power domain. This also removes the following debugfs error message. [ 2.242068] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present! [ 2.249949] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present! [ 2.257784] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present! ... Fixes: 59b644b01cf4 ("soc: mediatek: Add MediaTek SCPSYS power domains") Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org> Link: https://lore.kernel.org/r/20210225175000.824661-1-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-03-30soc: mediatek: pm-domains: Fix missing error code in scpsys_add_subdomain()Enric Balletbo i Serra
Adding one power domain in scpsys_add_subdomain is missing to assign an error code when it fails. Fix that assigning an error code to 'ret', this also fixes the follwowing smatch warning. drivers/soc/mediatek/mtk-pm-domains.c:492 scpsys_add_subdomain() warn: missing error code 'ret' Fixes: dd65030295e2 ("soc: mediatek: pm-domains: Don't print an error if child domain is deferred") Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20210303091054.796975-1-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-01-31soc: mediatek: pm-domains: Don't print an error if child domain is deferredEnric Balletbo i Serra
Child domains can be deferred by the core because one of its resources is not available yet, in such case, it will print an error, but later it will succeed to probe. Fix that using the dev_err_probe() function so it only prints an error on a real error. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org> Link: https://lore.kernel.org/r/20210113213012.67643-1-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-01-31soc: mediatek: pm-domains: Add domain regulator supplyHsin-Yi Wang
Some power domains (eg. mfg) needs to turn on power supply before power on. Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20210129101208.2625249-3-hsinyi@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-01-31soc: mediatek: pm-domains: Add support for mt8167Fabien Parent
Add the needed board data to support mt8167 SoC. Signed-off-by: Fabien Parent <fparent@baylibre.com> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20201209133238.384030-2-fparent@baylibre.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27soc: mediatek: pm-domains: Add support for mt8192Weiyi Lu
Add the needed board data to support mt8192 SoC. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Tested-by: Weiyi Lu <weiyi.lu@mediatek.com> Link: https://lore.kernel.org/r/20201030113622.201188-17-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27soc: mediatek: pm-domains: Add default power off flagWeiyi Lu
For some power domain, like conn on MT8192, it should be default OFF. Because the power on/off control relies the function of connectivity chip and its firmware. And if project choose other chip vendor solution, those necessary connectivity functions will not provided. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20201030113622.201188-16-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27soc: mediatek: pm-domains: Add support for mt8183Matthias Brugger
Add the needed board data to support mt8183 SoC. Signed-off-by: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20201030113622.201188-12-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27soc: mediatek: pm-domains: Allow bus protection to ignore clear ackMatthias Brugger
In some cases the hardware does not create an acknowledgment of the bus protection clearing. Add a flag to the bus protection indicating that a clear event will be ignored. Signed-off-by: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20201030113622.201188-10-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27soc: mediatek: pm-domains: Add subsystem clocksMatthias Brugger
For the bus protection operations, some subsystem clocks need to be enabled before releasing the protection. This patch identifies the subsystem clocks by it's name. Suggested-by: Weiyi Lu <weiyi.lu@mediatek.com> [Adapted the patch to the mtk-pm-domains driver] Signed-off-by: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20201030113622.201188-9-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27soc: mediatek: pm-domains: Add extra sram controlMatthias Brugger
For some power domains like vpu_core on MT8183 whose sram need to do clock and internal isolation while power on/off sram. We add a cap "MTK_SCPD_SRAM_ISO" to judge if we need to do the extra sram isolation control or not. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20201030113622.201188-8-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27soc: mediatek: pm-domains: Add SMI block as bus protection blockMatthias Brugger
Apart from the infracfg block, the SMI block is used to enable the bus protection for some power domains. Add support for this block. Signed-off-by: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20201030113622.201188-7-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27soc: mediatek: pm_domains: Make bus protection genericMatthias Brugger
Bus protection is not exclusively done by calling the infracfg misc driver. Make the calls for setting and clearing the bus protection generic so that we can use other blocks for it as well. Signed-off-by: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20201030113622.201188-6-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27soc: mediatek: pm-domains: Add bus protection protocolMatthias Brugger
Bus protection will need to update more then one register in infracfg. Add support for several operations. Signed-off-by: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20201030113622.201188-5-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27soc: mediatek: Add MediaTek SCPSYS power domainsEnric Balletbo i Serra
The System Control Processor System (SCPSYS) has several power management related tasks in the system. This driver implements support to handle the different power domains supported in order to meet high performance and low power requirements. Co-developed-by: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20201030113622.201188-3-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>