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path: root/drivers/pinctrl/renesas
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2020-11-13pinctrl: renesas: Remove superfluous goto in sh_pfc_gpio_set_direction()Geert Uytterhoeven
Commit b13431ed6eab808a ("pinctrl: sh-pfc: Remove incomplete flag "cfg->type"") removed the last statement in between the goto and the label. Hence remove both. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20201028151637.1734130-2-geert+renesas@glider.be
2020-11-13pinctrl: renesas: r8a7791: Optimize pinctrl image size for R8A774[34]Biju Das
This driver supports both RZ/G1[MN] and R-Car M2-W/M2-N SoCs. Optimize pinctrl image size for RZ/G1[MN], when support for R-Car M2-W/M2-N (R8A779[13]) is not enabled. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20201019124258.4574-7-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-11-13pinctrl: renesas: r8a7790: Optimize pinctrl image size for R8A7742Biju Das
This driver supports both RZ/G1H and R-Car H2 SoCs. Optimize pinctrl image size for RZ/G1H, when support for R-Car H2 (R8A7790) is not enabled. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20201019124258.4574-6-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-11-13pinctrl: renesas: r8a77990: Optimize pinctrl image size for R8A774C0Biju Das
This driver supports both RZ/G2E and R-Car E3 SoCs. Optimize pinctrl image size for RZ/G2E, when support for R-Car E3 (R8A77990) is not enabled. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20201019124258.4574-5-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-11-13pinctrl: renesas: r8a77965: Optimize pinctrl image size for R8A774B1Biju Das
This driver supports both RZ/G2N and R-Car M3-N SoCs. Optimize pinctrl image size for RZ/G2N, when support for R-Car M3-N (R8A77965) is not enabled. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20201019124258.4574-4-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-11-13pinctrl: renesas: r8a7796: Optimize pinctrl image size for R8A774A1Biju Das
This driver supports both RZ/G2M and R-Car M3-W/W+ SoCs. Optimize pinctrl image size for RZ/G2M, when support for R-Car M3-W/W+ (R8A7796[01]) is not enabled. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20201019132805.5996-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-11-13pinctrl: renesas: r8a77951: Optimize pinctrl image size for R8A774E1Biju Das
This driver supports both RZ/G2H and R-Car H3 ES2 SoCs. Optimize pinctrl image size for RZ/G2H, when support for R-Car H3 ES2 (R8A77951) is not enabled. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20201019124258.4574-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-10-26pinctrl: renesas: r8a7790: Add VIN1-B and VIN2-G pins, groups and functionsLad Prabhakar
Add pins, groups and functions for the VIN1-B [data/sync/field/clkenb/clk] and VIN2-G8. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu> Link: https://lore.kernel.org/r/20200917195924.20384-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-15pinctrl: renesas: Reintroduce SH_PFC for common sh-pfc codeGeert Uytterhoeven
Most, but not all, Renesas pin control drivers use the "sh-pfc" pin control framework. As of commit 8449bfa9e6a9f7ec ("pinctrl: sh-pfc: Collect Renesas related CONFIGs in one place"), the code for this framework is always built when Renesas SoC pin control support is enabled, regardless of whether the enabled pin control drivers need it or not. Fix this by reintroducing the CONFIG_SH_PFC symbol to control inclusion of the "sh-pfc" framework and its dependencies, and selecting it when needed. This reduces kernel size of a typical RZ/A1 or RZ/A2 kernel by more than 6 resp. 11 KiB. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200909131534.12897-4-geert+renesas@glider.be
2020-09-15pinctrl: Rename sh-pfc to renesasGeert Uytterhoeven
The drivers/pinctrl/sh-pfc subdirectory was originally created to group pin control drivers for various Renesas SuperH and SH-Mobile platforms. However, the name "sh-pfc" no longer reflects its contents, as the directory now contains pin control drivers for Renesas SuperH, ARM32, and ARM64 SoCs. Hence rename the subdirectory from drivers/pinctrl/sh-pfc to drivers/pinctrl/renesas, and the related Kconfig symbol from PINCTRL_SH_PFC to PINCTRL_RENESAS. Rename the git branch in MAINTAINERS, too, for consistency. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200909131534.12897-3-geert+renesas@glider.be