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path: root/drivers/pinctrl/qcom
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2023-06-09pinctrl: qcom: organize audio drivers in menuconfigKrzysztof Kozlowski
The audio pin controller drivers depend on PINCTRL_LPASS_LPI, but since PINCTRL_LPASS_LPI is not the first entry, they are not displayed in menuconfig as dependent of PINCTRL_LPASS_LPI. Re-order the entries to fix this. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230601152026.1182648-8-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-09pinctrl: qcom: organize main SoC drivers in new Kconfig.msmKrzysztof Kozlowski
In menuconfig, some entries depending on PINCTRL_MSM are indented and expressed as dependening but some not, because of other Kconfig entries in between, Move all main Qualcomm SoC pin controller driver entries into new Kconfig.msm file so they will be nicely ordered in Kconfig file (by CONFIG_ name) and properly indented as PINCTRL_MSM dependency in menuconfig. Functionally this is the same, but since entire file is guarded with "if PINCTRL_MSM" drop this dependency from individual entries. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20230601152026.1182648-7-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-09pinctrl: qcom: mark true OF dependency - common MSM pinctrl codeKrzysztof Kozlowski
The common MSM pinctrl driver code (PINCTRL_MSM) uses pinconf_generic_dt_node_to_map_group() from GENERIC_PINCONF, which is not available for compile testing for !OF cases. Drivers actually do not depend on OF. Move the OF dependency to the entry actually depending on it and drop any "|| COMPILE_TEST", because OF is required also for compile testing (lack of OF was never visible in compile testing because none of the drivers could be compile tested due to Makefile). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230601152026.1182648-5-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-09pinctrl: qcom: drop unneeded GPIOLIB dependencyKrzysztof Kozlowski
PINCTRL_MSM depends on GPIOLIB, thus individual driver entries depending on the first do not have to depend on the latter. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230601152026.1182648-4-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-09pinctrl: qcom: correct language typo (Technologies)Krzysztof Kozlowski
Correct typo: Tehcnologies->Technologies. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230601152026.1182648-3-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-09pinctrl: qcom: fix indentation in KconfigKrzysztof Kozlowski
Use tab for correct Kconfig indentation. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230601152026.1182648-2-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-09pinctrl: qcom: qdf2xxx: drop ACPI_PTRKrzysztof Kozlowski
Driver can bind only via ACPI matching and acpi_device_id is there unconditionally, so drop useless ACPI_PTR() macro. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20230601152026.1182648-1-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-09pinctrl: qcom: Add IPQ5018 pinctrl driverSricharan Ramabadhran
Add pinctrl definitions for the TLMM of IPQ5018. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Co-developed-by: Nitheesh Sekar <quic_nsekar@quicinc.com> Signed-off-by: Nitheesh Sekar <quic_nsekar@quicinc.com> Co-developed-by: Varadarajan Narayanan <quic_varada@quicinc.com> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> Link: https://lore.kernel.org/r/20230608122152.3930377-5-quic_srichara@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-29pinctrl: qcom: Add SDX75 pincontrol driverRohit Agarwal
Add initial Qualcomm SDX75 pinctrl driver to support pin configuration with pinctrl framework for SDX75 SoC. While at it, reordering the SDX65 entry. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1684425432-10072-4-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-22pinctrl: qcom: sa8775p: add the wakeirq mapBartosz Golaszewski
The SA8775P TLMM driver is missing the GPIO-to-wakeup-pin mapping. This adds it. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230515092515.180920-1-brgl@bgdev.pl Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-16pinctrl: qcom: sc8180x: gracefully handle missing IO memory resourceKrzysztof Kozlowski
If device was probed with incorrect DT or ACPI tables, the IO memory resource would be missing and driver would derefernce NULL pointer in sc8180x_pinctrl_add_tile_resources(). Add simplep check if IO memory resource was provided to silence Smatch warning: drivers/pinctrl/qcom/pinctrl-sc8180x.c:1664 sc8180x_pinctrl_add_tile_resources() error: potentially dereferencing uninitialized 'mres'. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230513113510.177666-1-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-16pinctrl: qcom: Refactor generic qcom pinctrl driverRohit Agarwal
Reuse the generic pingroup struct from pinctrl.h in msm_pingroup along with the macro defined. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1684133170-18540-3-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-16pinctrl: qcom: Remove the msm_function structRohit Agarwal
Remove the msm_function struct to reuse the generic pinfunction struct. Also, define a generic PINFUNCTION macro that can be used across qcom target specific pinctrl files to avoid code repetition. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1684133170-18540-2-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-08pinctrl: qcom: spmi-gpio: Add PM8953 supportLuca Weiss
Add support for the 8 GPIOs found on PM8953. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Link: https://lore.kernel.org/r/20230421-pm8953-gpio-v1-2-3d33e2de47e3@z3ntu.xyz Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-04-21pinctrl: qcom: spmi-gpio: Add PMI632 supportLuca Weiss
Add support for the 8 GPIOs found on PMI632. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230414-pmi632-v2-2-98bafa909c36@z3ntu.xyz Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-04-20pinctrl: qcom ssbi-gpio: Convert to immutable irq_chipLinus Walleij
Convert the driver to immutable irq-chip with a bit of intuition. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20230414-immutable-irqchips-2-v1-6-6b59a5186b00@linaro.org
2023-04-20pinctrl: qcom ssbi-mpp: Convert to immutable irq_chipLinus Walleij
Convert the driver to immutable irq-chip with a bit of intuition. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20230414-immutable-irqchips-2-v1-5-6b59a5186b00@linaro.org
2023-04-20pinctrl: qcom spmi-mpp: Convert to immutable irq_chipLinus Walleij
Convert the driver to immutable irq-chip with a bit of intuition. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20230414-immutable-irqchips-2-v1-4-6b59a5186b00@linaro.org
2023-04-11pinctrl: qcom: Add "and" to PIN_CONFIG_INPUT_ENABLE commentDouglas Anderson
The comment recently added talking about PIN_CONFIG_INPUT_ENABLE is clearly missing the word "and". Comments live forever, so let's fix it. Fixes: e49eabe3e13f ("pinctrl: qcom: Support OUTPUT_ENABLE; deprecate INPUT_ENABLE") Reported-by: Stephen Boyd <swboyd@chromium.org> Link: https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/4409769/comment/9a1d5def_e1e71db7/ Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20230407142859.1.Ia5d70e320b60d6707c6182879097708e49b8b519@changeid Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-04-11pinctrl: qcom: spmi-gpio: add support for pmm8654au-gpioBartosz Golaszewski
Add support for the GPIO controller present on the pmm8654au PMIC. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20230327125316.210812-14-brgl@bgdev.pl Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-29Merge branch 'ib-qcom-quad-spi' into develLinus Walleij
2023-03-29pinctrl: qcom: Support OUTPUT_ENABLE; deprecate INPUT_ENABLEDouglas Anderson
The Qualcomm pinctrl driver has been violating the documented meaning of PIN_CONFIG_INPUT_ENABLE. That documentation says: Note that this does not affect the pin's ability to drive output. ...yet the Qualcomm driver's sole action when asked to "enable input" on a pin is to disable its output. The Qualcomm driver's implementation stems from the fact that "output-disable" is a "new" property from 2017. It was introduced in commit 425562429d4f ("pinctrl: generic: Add output-enable property"). The "input-enable" handling in Qualcomm drivers is from 2015 introduced in commit 407f5e392f9c ("pinctrl: qcom: handle input-enable pinconf property"). Let's change the Qualcomm driver to move us in the right direction. As part of this: 1. We'll now support PIN_CONFIG_OUTPUT_ENABLE 2. We'll still support using PIN_CONFIG_INPUT_ENABLE to disable a pin's output (in violation of the docs) with a big comment in the code. This is needed because old device trees have "input-enable" in them and, in some cases, people might need the old behavior. While we could programmatically change all old device trees, it doesn't really hurt to keep supporting the old behavior and we're _supposed_ to try to be compatible with old device trees anyway. It can also be noted that the PIN_CONFIG_INPUT_ENABLE handling code seems to have purposefully ignored its argument. That means that old boards that had _either_ "input-disable" or "input-enable" in them would have had the effect of disabling a pin's output. While we could change this behavior, since we're only leaving the PIN_CONFIG_INPUT_ENABLE there for backward compatibility we might as well be fully backward compatible. NOTE: despite the fact that we'll still support PIN_CONFIG_INPUT_ENABLE for _setting_ config, we take it away from msm_config_group_get(). This appears to be only used for populating debugfs and fixing debugfs to "output enabled" where relevant instead of "input enabled" makes more sense and has more truthiness. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20230323102605.8.Id740ae6a993f9313b58add6b10f6a92795d510d4@changeid Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19pinctrl: qcom: Add IPQ9574 pinctrl driverDevi Priya
Add pinctrl definitions for the TLMM of IPQ9574 Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Co-developed-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Link: https://lore.kernel.org/r/20230316072940.29137-5-quic_devipriy@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19pinctrl: qcom: Add SM7150 pinctrl driverDanila Tikhonov
Add pinctrl driver for TLMM block found in SM7150 SoC. Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Link: https://lore.kernel.org/r/20230311212114.108870-3-danila@jiaxyga.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-13pinctrl: qcom: sm8550-lpass-lpi: allow GPIO functionKrzysztof Kozlowski
All LPASS pins have basic GPIO function and most of the code is ready for that. Add missing glue pieces to allow LPASS pins to work as GPIO, which is going to be used on MTP8550 and QRD8550 boards. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230309154949.658380-4-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-13pinctrl: qcom: lpass-lpi: allow glitch-free output GPIOKrzysztof Kozlowski
When choosing GPIO function for pins, use the same glitch-free method as main TLMM pinctrl-msm.c driver in msm_pinmux_set_mux(). This replicates the commit d21f4b7ffc22 ("pinctrl: qcom: Avoid glitching lines when we first mux to output") to LPASS pin controller with same justification. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230309154949.658380-3-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-13pinctrl: qcom: lpass-lpi: use consistent name for "group" variableKrzysztof Kozlowski
The set_mux callback in SoC TLMM driver (pinctrl-msm.c) uses "group", not "group_num" for the number of the pin group. Other places of lpass-lpi also use "group", so let's be consistent for code readability. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230309154949.658380-2-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-13pinctrl: qcom: lpass-lpi: set output value before enabling outputKrzysztof Kozlowski
As per Hardware Programming Guide, when configuring pin as output, set the pin value before setting output-enable (OE). Similar approach is in main SoC TLMM pin controller. Cc: <stable@vger.kernel.org> Fixes: 6e261d1090d6 ("pinctrl: qcom: Add sm8250 lpass lpi pinctrl driver") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230309154949.658380-1-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-13pinctrl: qcom: msm8998: Add MPM pin mappingsKonrad Dybcio
Add MPM <-> TLMM pin mappings to allow for waking up the AP from sleep through MPM-connected pins. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230308213651.647098-1-konrad.dybcio@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-09pinctrl: qcom: Use devm_platform_get_and_ioremap_resource()Md Sadre Alam
Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com> Link: https://lore.kernel.org/r/20230306144641.21955-1-quic_mdalam@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-02-27Merge tag 'soc-drivers-6.3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "As usual, there are lots of minor driver changes across SoC platforms from NXP, Amlogic, AMD Zynq, Mediatek, Qualcomm, Apple and Samsung. These usually add support for additional chip variations in existing drivers, but also add features or bugfixes. The SCMI firmware subsystem gains a unified raw userspace interface through debugfs, which can be used for validation purposes. Newly added drivers include: - New power management drivers for StarFive JH7110, Allwinner D1 and Renesas RZ/V2M - A driver for Qualcomm battery and power supply status - A SoC device driver for identifying Nuvoton WPCM450 chips - A regulator coupler driver for Mediatek MT81xxv" * tag 'soc-drivers-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (165 commits) power: supply: Introduce Qualcomm PMIC GLINK power supply soc: apple: rtkit: Do not copy the reg state structure to the stack soc: sunxi: SUN20I_PPU should depend on PM memory: renesas-rpc-if: Remove redundant division of dummy soc: qcom: socinfo: Add IDs for IPQ5332 and its variant dt-bindings: arm: qcom,ids: Add IDs for IPQ5332 and its variant dt-bindings: power: qcom,rpmpd: add RPMH_REGULATOR_LEVEL_LOW_SVS_L1 firmware: qcom_scm: Move qcom_scm.h to include/linux/firmware/qcom/ MAINTAINERS: Update qcom CPR maintainer entry dt-bindings: firmware: document Qualcomm SM8550 SCM dt-bindings: firmware: qcom,scm: add qcom,scm-sa8775p compatible soc: qcom: socinfo: Add Soc IDs for IPQ8064 and variants dt-bindings: arm: qcom,ids: Add Soc IDs for IPQ8064 and variants soc: qcom: socinfo: Add support for new field in revision 17 soc: qcom: smd-rpm: Add IPQ9574 compatible soc: qcom: pmic_glink: remove redundant calculation of svid soc: qcom: stats: Populate all subsystem debugfs files dt-bindings: soc: qcom,rpmh-rsc: Update to allow for generic nodes soc: qcom: pmic_glink: add CONFIG_NET/CONFIG_OF dependencies soc: qcom: pmic_glink: Introduce altmode support ...
2023-02-22Merge tag 'pinctrl-v6.3-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "Nothing special, notably a lot of new Qualcomm hardware is supported, a RISC-V reference SoC and then some cleanups both in code and device tree bindings. Core changes: - Add PINCTRL_PINFUNCTION() macro and use it in several drivers New drivers: - New driver for the StarFive JH7110 SoC "sys" and "aon" (always-on) pin controllers. (RISC-V.) - New subdriver for the Qualcomm QDU1000/QRU1000 SoC pin controller - New subdrivers for the Qualcomm SM8550 SoC and LPASS pin controllers - New subdriver for the Qualcomm SA8775P SoC pin controller - New subdriver for the Qualcomm IPQ5332 SoC pin controller - New (trivial) support for Qualcomm PM8550 and PMR735D PMIC pin control - New subdriver for the Mediatek MT7981 SoC pin controller Improvements: - Several cleanups and refactorings to the Intel drivers - Add 4KOhm bias support to the Intel driver - Use the NOIRQ_SYSTEM_SLEEP_PM_OPS for the AT91 driver - Support general purpose clocks in the Qualcomm MSM8226 SoC - Several conversions to use the new I2C .probe_new() call - Massive clean-up of the Qualcomm Device Tree YAML schemas - Add VIN[45] pins, groups and functions to the Renesas r8a77950 SoC driver" * tag 'pinctrl-v6.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (118 commits) pinctrl: qcom: Add support for i2c specific pull feature pinctrl: starfive: Add StarFive JH7110 aon controller driver pinctrl: starfive: Add StarFive JH7110 sys controller driver dt-bindings: pinctrl: Add StarFive JH7110 aon pinctrl dt-bindings: pinctrl: Add StarFive JH7110 sys pinctrl pinctrl: add mt7981 pinctrl driver dt-bindings: pinctrl: add bindings for MT7981 SoC dt-bindings: pinctrl: rockchip,pinctrl: mark gpio sub nodes of pinctrl as deprecated pinctrl: qcom: Introduce IPQ5332 TLMM driver dt-bindings: pinctrl: qcom: add IPQ5332 pinctrl dt-bindings: pinctrl: qcom: lpass-lpi: correct GPIO name pattern pinctrl: qcom: pinctrl-sm8550-lpass-lpi: add SM8550 LPASS dt-bindings: pinctrl: qcom,sm8550-lpass-lpi-pinctrl: add SM8550 LPASS pinctrl: at91: use devm_kasprintf() to avoid potential leaks dt-bindings: pinctrl: qcom: correct gpio-ranges in examples dt-bindings: pinctrl: qcom,msm8994: correct number of GPIOs dt-bindings: pinctrl: qcom,sdx55: correct GPIO name pattern dt-bindings: pinctrl: qcom,msm8953: correct GPIO name pattern dt-bindings: pinctrl: qcom,sm6375: correct GPIO name pattern and example dt-bindings: pinctrl: qcom,msm8909: correct GPIO name pattern and example ...
2023-02-10pinctrl: qcom: Add support for i2c specific pull featureAbel Vesa
Add support for the new i2c_pull property introduced for SM8550 setting a I2C specific pull mode on I2C able pins. Add the bit to the SM8550 specific driver while at it. Co-developed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230209074510.4153294-1-abel.vesa@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-02-08firmware: qcom_scm: Move qcom_scm.h to include/linux/firmware/qcom/Elliot Berman
Move include/linux/qcom_scm.h to include/linux/firmware/qcom/qcom_scm.h. This removes 1 of a few remaining Qualcomm-specific headers into a more approciate subdirectory under include/. Suggested-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Elliot Berman <quic_eberman@quicinc.com> Reviewed-by: Guru Das Srinagesh <quic_gurus@quicinc.com> Acked-by: Mukesh Ojha <quic_mojha@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230203210956.3580811-1-quic_eberman@quicinc.com
2023-02-07pinctrl: qcom: Introduce IPQ5332 TLMM driverKathiravan T
The IPQ5332 SoC comes with a TLMM block, like all other Qualcomm platforms, so add a driver for it. Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230206071217.29313-3-quic_kathirav@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-02-06pinctrl: qcom: pinctrl-sm8550-lpass-lpi: add SM8550 LPASSKrzysztof Kozlowski
Add druver for pin controller in Low Power Audio SubSystem (LPASS). The driver is similar to SM8450 LPASS pin controller, with differences in few pin groups (qua_mi2s -> i2s0). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230203174645.597053-2-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-02-06pinctrl: qcom: sm8450-lpass-lpi: correct swr_rx_data groupKrzysztof Kozlowski
According to hardware programming guide, the swr_rx_data pin group has only two pins (GPIO5 and GPIO6). This is also visible in "struct sm8450_groups" in the driver - GPIO15 does not have swr_rx_data function. Fixes: ec1652fc4d56 ("pinctrl: qcom: Add sm8450 lpass lpi pinctrl driver") Cc: <stable@vger.kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230203165054.390762-1-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-02-01pinctrl: qcom: add the tlmm driver sa8775p platformsYadu MG
Add support for Lemans TLMM configuration and control via the pinctrl framework. Signed-off-by: Yadu MG <quic_ymg@quicinc.com> Signed-off-by: Prasad Sodagudi <quic_psodagud@quicinc.com> [Bartosz: made the driver ready for upstream] Co-developed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230201150011.200613-3-brgl@bgdev.pl Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-26pinctrl: qcom: Unify accessing to device fwnodeAndy Shevchenko
The device fwnode can be get via dev_fwnode() getter. Use it where it makes sense. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20230113220703.45686-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-16pinctrl: qcom: lpass-lpi: Remove duplicate assignment of of_gpio_n_cellsAndy Shevchenko
The of_gpio_n_cells default is 2 when ->of_xlate() callback is not defined. No need to assign it explicitly in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20230112184923.80442-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-10pinctrl: qcom: msm8226: Add General Purpose clocksLuca Weiss
Add support for the general purpose clocks that are found on MSM8226. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Co-developed-by: Matti Lehtimäki <matti.lehtimaki@gmail.com> Signed-off-by: Matti Lehtimäki <matti.lehtimaki@gmail.com> Link: https://lore.kernel.org/r/20230106114403.275865-3-matti.lehtimaki@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-09pinctrl: qcom: spmi-gpio: add support for pm8550 & pmr735d gpio controlNeil Armstrong
Add support for the pm8550, pm8550b, pm8550ve, pm8550vs, pmk8550 & pmr735d gpio controllers providing GPIO control over SPMI. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20221114-narmstrong-sm8550-upstream-spmi-v2-3-b839bf2d558a@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-09pinctrl: qcom: pinctrl-msm8976: Correct function names for wcss pinsAdam Skladowski
Adjust names of function for wcss pins, also fix third gpio in bt group. Fixes: bcd11493f0ab ("pinctrl: qcom: Add a pinctrl driver for MSM8976 and 8956") Signed-off-by: Adam Skladowski <a39.skl@gmail.com> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Link: https://lore.kernel.org/r/20221231164250.74550-1-a39.skl@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-09pinctrl: qcom: Add SM8550 pinctrl driverAbel Vesa
Add pinctrl driver for TLMM block found in SM8550 SoC. Co-developed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20221230203637.2539900-3-abel.vesa@linaro.org Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-12-29pinctrl: qcom: Add QDU1000/QRU1000 pinctrl driverMelody Olvera
Add pin control driver for the TLMM block found in the QDU1000 and QRU1000 SoC. Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20221216230852.21691-3-quic_molvera@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-12-13Merge tag 'pinctrl-v6.2-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "The two large chunks is the header clean-up from Andy and the Qualcomm DT bindings clean-up from Krzysztof. Each which could give rise to conflicts, but I haven't seen any. The YAML conversions happening around the device tree is the biggest item in the series and is the result of Rob Herrings ambition to autovalidate these trees against strict schemas and it is paying off in lots of bugs found and ever prettier device trees. Sooner or later the transition will be complete, Krzysztof is fixing up all of the Qualcomm stuff, which is pretty voluminous. Core changes: - minor but nice and important documentation clean-ups New drivers: - subdriver for the Qualcomm SDM670 SoC - subdriver for the Intel Moorefield SoC - trivial support for the NXP Freescale i.MXRT1170 SoC Other changes and improvements - major clean-up of the Qualcomm pin control device tree bindings by Krzysztof - major header clean-up by Andy - some immutable irqchip clean-up for the Actions Semiconductor and Nuvoton drivers - GPIO helpers for The Cypress cy8c95x0 driver - bias handling in the Mediatek MT7986 driver - remove the unused pins-are-numbered concept that never flew" * tag 'pinctrl-v6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (231 commits) pinctrl: thunderbay: fix possible memory leak in thunderbay_build_functions() dt-bindings: pinctrl: st,stm32: Deprecate pins-are-numbered dt-bindings: pinctrl: mediatek,mt65xx: Deprecate pins-are-numbered pinctrl: stm32: Remove check for pins-are-numbered pinctrl: mediatek: common: Remove check for pins-are-numbered pinctrl: qcom: remove duplicate included header files pinctrl: sunxi: d1: Add CAN bus pinmuxes pinctrl: loongson2: Fix some const correctness pinctrl: pinconf-generic: add missing of_node_put() pinctrl: intel: Enumerate PWM device when community has a capability pwm: lpss: Rename pwm_lpss_probe() --> devm_pwm_lpss_probe() pwm: lpss: Allow other drivers to enable PWM LPSS pwm: lpss: Include headers we are the direct user of pwm: lpss: Rename MAX_PWMS --> LPSS_MAX_PWMS pwm: Add a stub for devm_pwmchip_add() pinctrl: k210: call of_node_put() pinctrl: starfive: Use existing variable gpio dt-bindings: pinctrl: semtech,sx150xq: fix match patterns for 16 GPIOs matching pinconf-generic: fix style issues in pin_config_param doc pinctrl: pinctrl-loongson2: fix Kconfig dependency ...
2022-11-28pinctrl: qcom: remove duplicate included header filesye xingchen
linux/seq_file.h is included more than once. Signed-off-by: ye xingchen <ye.xingchen@zte.com.cn> Link: https://lore.kernel.org/r/202211221631577017318@zte.com.cn Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-11-18Merge tag 'intel-pinctrl-v6.2-1' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel intel-pinctrl for v6.2-1 * Add Intel Moorefield pin control driver * Deduplicate COMMUNITY() macro in the Intel pin control drivers * Switch Freescale GPIO driver to use fwnode instead of of_node * Miscellaneous clenups here and there The following is an automated git shortlog grouped by driver: alderlake: - Deduplicate COMMUNITY macro code cannonlake: - Deduplicate COMMUNITY macro code device property: - Introduce fwnode_device_is_compatible() helper icelake: - Deduplicate COMMUNITY macro code intel: - Add Intel Moorefield pin controller support - Use temporary variable for struct device - Use str_enable_disable() helper merrifield: - Use temporary variable for struct device qcom: - lpass-lpi: Add missed bitfield.h soc: - fsl: qe: Switch to use fwnode instead of of_node sunrisepoint: - Deduplicate COMMUNITY macro code tigerlake: - Deduplicate COMMUNITY macro code
2022-11-08pinctrl: qcom: sc8280xp: Rectify UFS reset pinsAnjana Hari
UFS reset pin offsets are wrongly configured for SC8280XP, correcting the same for both UFS instances here. Signed-off-by: Anjana Hari <quic_ahari@quicinc.com> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Tested-by: Andrew Halaney <ahalaney@redhat.com> # QDrive3 Link: https://lore.kernel.org/r/20221103181051.26912-1-quic_bjorande@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-11-01pinctrl: qcom: lpass-lpi: Add missed bitfield.hAndy Shevchenko
Previously the cleanup change dropped the bitfield.h from the pinctrl-lpass-lpi.h, since it's not used there, but forgot to re-instantiate it in the C-file, where users are located. Fix this by adding missed bitfield.h to the C-file. Fixes: aa9430f8a6de ("pinctrl: qcom: Add missing header(s)") Reported-by: kernel test robot <lkp@intel.com> Reported-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-07-30 15:51:13 +0000