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2022-09-20phy: qcom-qmp-ufs: drop unused definesJohan Hovold
Drop defines and enums that are unused since the QMP driver split. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20220907110728.19092-9-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-09-20phy: qcom-qmp-ufs: drop unused runtime PM implementationJohan Hovold
Drop the unused and incomplete runtime PM implementation, which was only used by USB PHYs before splitting the QMP driver. Note that the runtime PM was never disabled (and state restored) on driver unbind. This effectively reverts commit ac0d239936bd ("phy: qcom-qmp: Add support for runtime PM"). Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220907110728.19092-8-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-09-20phy: qcom-qmp-pcie-msm8996: drop unused definesJohan Hovold
Drop defines and enums that are unused since the QMP driver split. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20220907110728.19092-7-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-09-20phy: qcom-qmp-pcie-msm8996: drop unused runtime PM implementationJohan Hovold
Drop the unused and incomplete runtime PM implementation, which was only used by USB PHYs before splitting the QMP driver. Note that the runtime PM was never disabled (and state restored) on driver unbind. This effectively reverts commit ac0d239936bd ("phy: qcom-qmp: Add support for runtime PM"). Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220907110728.19092-6-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-09-20phy: qcom-qmp-pcie: drop unused definesJohan Hovold
Drop defines and enums that are unused since the QMP driver split. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220907110728.19092-5-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-09-20phy: qcom-qmp-pcie: drop unused runtime PM implementationJohan Hovold
Drop the unused and incomplete runtime PM implementation, which was only used by USB PHYs before splitting the QMP driver. Note that the runtime PM was never disabled (and state restored) on driver unbind. This effectively reverts commit ac0d239936bd ("phy: qcom-qmp: Add support for runtime PM"). Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220907110728.19092-4-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-09-20phy: qcom-qmp-combo: drop unused definesJohan Hovold
Drop defines and enums that are unused since the QMP driver split. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220907110728.19092-3-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-09-20phy: qcom-qmp-combo: disable runtime PM on unbindJohan Hovold
Make sure to disable runtime PM also on driver unbind. Fixes: ac0d239936bd ("phy: qcom-qmp: Add support for runtime PM"). Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220907110728.19092-2-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-09-13phy: qcom-snps: Add support for overriding phy tuning parametersKrishna Kurapati
Add support for overriding electrical signal tuning parameters for SNPS HS Phy. Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1662480933-12326-3-git-send-email-quic_kriskura@quicinc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-09-13phy: qcom-qmp: drop dual-lane commentsJohan Hovold
Drop the obsolete and misleading dual-lane comments which gave the impression that only combo PHYs have a second lane. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220906074550.4383-4-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-09-13phy: qcom-qmp-pcie: shorten function prefixesJohan Hovold
The driver function prefix has gotten unnecessarily long and hurts readability. Shorten "qcom_qmp_phy_" to "qmp_" (which likely stands for "Qualcomm Multi PHY" or similar anyway). Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220906074550.4383-3-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-09-13phy: qcom-qmp-pcie: drop if (table) conditionsDmitry Baryshkov
Drop unused if (table) conditions, since the function qcom_qmp_phy_pcie_configure_lane() has this check anyway. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20220906074550.4383-2-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-09-02phy: qcom: edp: Postpone clk_set_rate until the PLL is upBjorn Andersson
When the platform was booted with the involved clocks enabled the clk_set_rate() of the link and pixel clocks will perculate to the children, which will fail to update because the PHY driver has just shut down the PLL. Postpone the clock rate updates until the PLL is back online to avoid reconfiguring the clocks while the PLL is not ticking. Fixes: f199223cb490 ("phy: qcom: Introduce new eDP PHY driver") Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220805154432.546740-1-bjorn.andersson@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-08-30phy: qcom-qmp-usb: drop pipe clock lane suffixJohan Hovold
The pipe clock is defined in the "lane" node so there's no need to keep adding a redundant lane-number suffix to the clock name. Update driver to support the new binding where the pipe clock name has been deprecated by instead requesting the clock by index. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20220830112923.3725-31-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-08-30phy: qcom-qmp-pcie-msm8996: drop reset lane suffixJohan Hovold
The lane reset is defined in the "lane" node so there's no need to keep adding a redundant lane-number suffix to the reset name. Update driver to support the new binding where the "lane" reset name has been deprecated by instead requesting the reset by index. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20220830112923.3725-30-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-08-30phy: qcom-qmp-pcie-msm8996: drop pipe clock lane suffixJohan Hovold
The pipe clock is defined in the "lane" node so there's no need to keep adding a redundant lane-number suffix to the clock name. Update driver to support the new binding where the pipe clock name has been deprecated by instead requesting the clock by index. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20220830112923.3725-29-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-08-30phy: qcom-qmp-combo: drop pipe clock lane suffixJohan Hovold
The pipe clock is defined in the "lane" node so there's no need to keep adding a redundant lane-number suffix to the clock name. Update driver to support the new binding where the pipe clock name has been deprecated by instead requesting the clock by index. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20220830112923.3725-28-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-08-30phy: qcom-qmp-combo: drop unused lane resetJohan Hovold
Drop the unused lane reset pointer which isn't used by any combo PHY. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20220830112923.3725-27-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-08-30phy: qcom-qmp-pcie: drop pipe clock lane suffixJohan Hovold
The pipe clock is defined in the "lane" node so there's no need to keep adding a redundant lane-number suffix to the clock name. Update driver to support the new binding where the pipe clock name has been deprecated by instead requesting the clock by index. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20220830112923.3725-26-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-08-30phy: qcom-qmp-combo: Add sc8280xp USB/DP combo physBjorn Andersson
The SC8280P has two copies of an USB/DP compbo PHY, add support for this to the Qualcomm QMP PHY driver. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220810042303.3583194-5-bjorn.andersson@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-08-30phy: qcom-qmp: Add SC8280XP USB3 UNI phyBjorn Andersson
The SC8280XP platform has two instances of the 5nm USB3 UNI phy attached to the multi-port USB controller, add definition for these. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220810042303.3583194-4-bjorn.andersson@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-08-30phy: qcom-qmp-combo: Parameterize swing and pre_emphasis tablesBjorn Andersson
The swing and pre-emphasis tables differ between different PHY versions, or perhaps between different platforms. In particular in order to introduce SC8280XP these tables needs to be replaced. Make it possible to specify these tables per PHY config. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220810042303.3583194-3-bjorn.andersson@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-08-30phy: qualcomm: phy-qcom-qmp: add support for combo USB3+DP phy on SDM845Dmitry Baryshkov
Define configuration to be used by combo USB3 + DisplayPort phy on SDM845 SoC family. It closely follows sc7180, however like the main USB3 phy it uses the qmp_v3_usb3phy_cfg config. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220810030926.2794179-1-bjorn.andersson@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-08-30phy: qcom: edp: Add SC8280XP eDP and DP PHYsBjorn Andersson
The Qualcomm SC8280XP platform has a number of eDP and DP PHY instances, add support for these. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220810040745.3582985-6-bjorn.andersson@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-08-30phy: qcom: edp: Introduce support for DisplayPortBjorn Andersson
The eDP phy can be used to drive either eDP or DP output, with some minor variations in some of the configuration and seemingly a need for implementing swing and pre_emphasis calibration. Introduce a config object, indicating if the phy is operating in eDP or DP mode and swing/pre-emphasis calibration to support this. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220810040745.3582985-5-bjorn.andersson@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-08-30phy: qcom: edp: Perform lane configurationBjorn Andersson
The TRANSCIEVER_BIAS_EN, HIGHZ_DRVR_EN and PHY_CFG_1 registers are used for lane configuration, with the currently hard coded configuration being a mix of 2 and 4 lane (effectively 2-lane). Properly implement lane configuration for 1, 2 and 4 lanes. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220810040745.3582985-4-bjorn.andersson@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-08-30phy: qcom: edp: Generate unique clock namesBjorn Andersson
With multiple Displayport PHYs the hard coded clock names collides, generate unique clock names based on the device name instead. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220810040745.3582985-3-bjorn.andersson@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-15phy: qcom-qmp-usb: statify qmp_phy_vreg_lVinod Koul
qmp_phy_vreg_l should be marked static, this resolves warning: drivers/phy/qualcomm/phy-qcom-qmp-combo.c:616:27: warning: symbol 'qmp_phy_vreg_l' was not declared. Should it be static? Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20220708052059.3049443-1-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-07phy: qcom-qmp-usb: define QPHY_V2_PCS_PLL_LOCK_CHK_DLY_TIME registerDmitry Baryshkov
Other PHYs tables directly reference QPHY_PLL_LOCK_CHK_DLY_TIME register without using reglayout. Define corresponding register to be used by msm8996 PHY tables and use it directly. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-29-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-07phy: qcom-qmp-usb: replace FLL layout writes for msm8996Dmitry Baryshkov
Other PHYs tables directly reference FLL registers without using reglayout. Define corresponding registers to be used by msm8996 PHY tables and use them directly. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-28-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-07phy: qcom-qmp: pcs-pcie-v4: add missing registersDmitry Baryshkov
Add missing registers, verified against: - msm-4.19's qcom,kona-qmp-usb3.h Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-27-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-07phy: qcom-qmp: pcs-v3: add missing registersDmitry Baryshkov
Add missing registers, verified against: - msm-4.19's qcom,usb3-11nm-qmp-combo.h Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-26-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-07phy: qcom-qmp: qserdes-com-v5: add missing registersDmitry Baryshkov
Add missing registers, verified against: - msm-5.4's qcom,usb3-5nm-qmp-uni.h - msm-5.4's qcom,usb3-5nm-qmp-combo.h Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-25-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-07phy: qcom-qmp: qserdes-com-v4: add missing registersDmitry Baryshkov
Add missing registers, verified against: - msm-4.19's qcom,kona-qmp-usb3.h The 0x1a0 register name was corrected, verified via msm-4.14's qcom,sdxprairie-qmp-usb3.h. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-24-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-07phy: qcom-qmp: qserdes-com-v3: add missing registersDmitry Baryshkov
Add missing registers, verified against: - msm-4.4's phy-qcom-ufs-qmp-v3.h Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-23-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-07phy: qcom-qmp: qserdes-com: add missing registersDmitry Baryshkov
Add missing registers, verified against: - msm-3.18's phy-qcom-ufs-qmp-14nm.h - msm-3.18's mdss-hdmi-pll-8996.c - msm-5.4's ep_pcie_phy.h Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-22-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-07phy: qcom-qmp: split PCS_UFS V3 symbols to separate headerDmitry Baryshkov
Several registers defined in the PCS V3 namespace in reality belong to the PCS_UFS V3 register space. Move them to the separate header and rename them to explicitly mention PCS_UFS. While we are at it, correct one register in the msm8998_usb3_pcs_tbl table to use PCS register name. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-21-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-07phy: qcom-qmp: split allegedly 4.20 and 5.20 PCS registersDmitry Baryshkov
Split registers definitions belonging allegedly to 4.20 and 5.20 QMP PHYs. They are used for the PCIe QMP PHYs, which have no good open source reference. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-20-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-07phy: qcom-qmp: split allegedly 4.20 and 5.20 TX/RX registersDmitry Baryshkov
Split registers definitions belonging allegedly to 4.20 and 5.20 QMP PHYs. They are used for the PCIe QMP PHYs, which have no good open source reference. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-19-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-07phy: qcom-qmp: move PCIE QHP registers to separate headerDmitry Baryshkov
Move PCIE QHP registers to the separate header. QHP is a sepecial PHY kind used on sdm845 to drive one of PCIe links. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-18-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-07phy: qcom-qmp: move PCS V5 registers to separate headersDmitry Baryshkov
Move PCS V5 registers to the separate headers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-17-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-07phy: qcom-qmp: move PCS V4 registers to separate headersDmitry Baryshkov
Move PCS V4 registers to the separate headers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-16-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-07phy: qcom-qmp: move PCS V3 registers to separate headersDmitry Baryshkov
Move PCS V3 registers to the separate headers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-15-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-07phy: qcom-qmp: move PCS V2 registers to separate headerDmitry Baryshkov
Move PCS V2 registers to the separate header. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-14-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-07phy: qcom-qmp: move QSERDES PLL registers to separate headerDmitry Baryshkov
Move QSERDES PLL registers to the separate header. This register set is unique for the IPQ PCIe Gen3 PHYs. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-13-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-07phy: qcom-qmp: move QSERDES V5 registers to separate headersDmitry Baryshkov
Move QSERDES V5 registers to the separate headers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-12-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-07phy: qcom-qmp: move QSERDES V4 registers to separate headersDmitry Baryshkov
Move QSERDES V4 registers to the separate headers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-11-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-07phy: qcom-qmp: move QSERDES V3 registers to separate headersDmitry Baryshkov
Move QSERDES V3 registers to the separate headers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-10-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-07phy: qcom-qmp: move QSERDES registers to separate headerDmitry Baryshkov
Move QSERDES V2 registers to the separate header. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-9-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-07phy: qcom-qmp: use QPHY_V4_PCS for ipq6018/ipq8074 PCIe gen3Dmitry Baryshkov
PCS_COM_* symbols duplicate the QPHY_V4_PCS_*. PCS_PCIE_* symbols duplicate the QPHY_V4_PCS_PCIE_*. Use generic register names for the IPQ6018 and IPQ8074 tables and drop the custom PCS_COM_*/PCS_PCIE* names. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220705094320.1313312-8-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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