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path: root/drivers/pci
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2017-08-16PCI: dra7xx: Use PCI_NUM_INTXBjorn Helgaas
Use the PCI_NUM_INTX macro to indicate the number of PCI INTx interrupts rather than the magic number 4. This makes it clearer where the number comes from & what it relates to. Based-on-similar-patches-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-16PCI: altera: Use size=4 IRQ domain for legacy INTxPaul Burton
The devicetree binding documentation for the Altera PCIe controller shows an example which uses an interrupt-map property to map PCI INTx interrupts to hardware IRQ numbers 1-4. The driver creates an IRQ domain with size 5 in order to cover this range, with hwirq=0 left unused. This patch cleans up this wasted IRQ domain entry, modifying the driver to use an IRQ domain of size 4 which matches the actual number of PCI INTx interrupts. Since the hwirq numbers 1-4 are part of the devicetree binding, and this is considered ABI, we cannot simply change the interrupt-map property to use the range 0-3. Instead we make use of the pci_irqd_intx_xlate() helper function to translate the range 1-4 used at the DT level into the range 0-3 which is now used within the driver, and stop adding 1 to decoded hwirq numbers in altera_pcie_isr(). Whilst cleaning up INTx handling we make use of the new PCI_NUM_INTX macro & drop the custom INTX_NUM definition. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Ley Foon Tan <lftan@altera.com>
2017-08-16PCI: altera: Remove unused num_of_vectors variableShawn Lin
The local variable "num_of_vectors" was unused, so remove it. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Ley Foon Tan <lftan@altera.com>
2017-08-16PCI: aardvark: Use PCI_NUM_INTXPaul Burton
Switch from using a custom LEGACY_IRQ_NUM macro to the generic PCI_NUM_INTX definition for the number of INTx interrupts. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2017-08-15Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netLinus Torvalds
Pull networking fixes from David Miller: 1) Fix TCP checksum offload handling in iwlwifi driver, from Emmanuel Grumbach. 2) In ksz DSA tagging code, free SKB if skb_put_padto() fails. From Vivien Didelot. 3) Fix two regressions with bonding on wireless, from Andreas Born. 4) Fix build when busypoll is disabled, from Daniel Borkmann. 5) Fix copy_linear_skb() wrt. SO_PEEK_OFF, from Eric Dumazet. 6) Set SKB cached route properly in inet_rtm_getroute(), from Florian Westphal. 7) Fix PCI-E relaxed ordering handling in cxgb4 driver, from Ding Tianhong. 8) Fix module refcnt leak in ULP code, from Sabrina Dubroca. 9) Fix use of GFP_KERNEL in atomic contexts in AF_KEY code, from Eric Dumazet. 10) Need to purge socket write queue in dccp_destroy_sock(), also from Eric Dumazet. 11) Make bpf_trace_printk() work properly on 32-bit architectures, from Daniel Borkmann. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (47 commits) bpf: fix bpf_trace_printk on 32 bit archs PCI: fix oops when try to find Root Port for a PCI device sfc: don't try and read ef10 data on non-ef10 NIC net_sched: remove warning from qdisc_hash_add net_sched/sfq: update hierarchical backlog when drop packet net_sched: reset pointers to tcf blocks in classful qdiscs' destructors ipv4: fix NULL dereference in free_fib_info_rcu() net: Fix a typo in comment about sock flags. ipv6: fix NULL dereference in ip6_route_dev_notify() tcp: fix possible deadlock in TCP stack vs BPF filter dccp: purge write queue in dccp_destroy_sock() udp: fix linear skb reception with PEEK_OFF ipv6: release rt6->rt6i_idev properly during ifdown af_key: do not use GFP_KERNEL in atomic contexts tcp: ulp: avoid module refcnt leak in tcp_set_ulp net/cxgb4vf: Use new PCI_DEV_FLAGS_NO_RELAXED_ORDERING flag net/cxgb4: Use new PCI_DEV_FLAGS_NO_RELAXED_ORDERING flag PCI: Disable Relaxed Ordering Attributes for AMD A1100 PCI: Disable Relaxed Ordering for some Intel processors PCI: Disable PCIe Relaxed Ordering if unsupported ...
2017-08-15PCI: fix oops when try to find Root Port for a PCI devicedingtianhong
Eric report a oops when booting the system after applying the commit a99b646afa8a ("PCI: Disable PCIe Relaxed..."): [ 4.241029] BUG: unable to handle kernel NULL pointer dereference at 0000000000000050 [ 4.247001] IP: pci_find_pcie_root_port+0x62/0x80 [ 4.253011] PGD 0 [ 4.253011] P4D 0 [ 4.253011] [ 4.258013] Oops: 0000 [#1] SMP DEBUG_PAGEALLOC [ 4.262015] Modules linked in: [ 4.265005] CPU: 31 PID: 1 Comm: swapper/0 Not tainted 4.13.0-dbx-DEV #316 [ 4.271002] Hardware name: Intel RML,PCH/Iota_QC_19, BIOS 2.40.0 06/22/2016 [ 4.279002] task: ffffa2ee38cfa040 task.stack: ffffa51ec0004000 [ 4.285001] RIP: 0010:pci_find_pcie_root_port+0x62/0x80 [ 4.290012] RSP: 0000:ffffa51ec0007ab8 EFLAGS: 00010246 [ 4.295003] RAX: 0000000000000000 RBX: ffffa2ee36bae000 RCX: 0000000000000006 [ 4.303002] RDX: 000000000000081c RSI: ffffa2ee38cfa8c8 RDI: ffffa2ee36bae000 [ 4.310013] RBP: ffffa51ec0007b58 R08: 0000000000000001 R09: 0000000000000000 [ 4.317001] R10: 0000000000000000 R11: 0000000000000000 R12: ffffa51ec0007ad0 [ 4.324005] R13: ffffa2ee36bae098 R14: 0000000000000002 R15: ffffa2ee37204818 [ 4.331002] FS: 0000000000000000(0000) GS:ffffa2ee3fcc0000(0000) knlGS:0000000000000000 [ 4.339002] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 4.345001] CR2: 0000000000000050 CR3: 000000401000f000 CR4: 00000000001406e0 [ 4.351002] Call Trace: [ 4.354012] ? pci_configure_device+0x19f/0x570 [ 4.359002] ? pci_conf1_read+0xb8/0xf0 [ 4.363002] ? raw_pci_read+0x23/0x40 [ 4.366011] ? pci_read+0x2c/0x30 [ 4.370014] ? pci_read_config_word+0x67/0x70 [ 4.374012] pci_device_add+0x28/0x230 [ 4.378012] ? pci_vpd_f0_read+0x50/0x80 [ 4.382014] pci_scan_single_device+0x96/0xc0 [ 4.386012] pci_scan_slot+0x79/0xf0 [ 4.389001] pci_scan_child_bus+0x31/0x180 [ 4.394014] acpi_pci_root_create+0x1c6/0x240 [ 4.398013] pci_acpi_scan_root+0x15f/0x1b0 [ 4.402012] acpi_pci_root_add+0x2e6/0x400 [ 4.406012] ? acpi_evaluate_integer+0x37/0x60 [ 4.411002] acpi_bus_attach+0xdf/0x200 [ 4.415002] acpi_bus_attach+0x6a/0x200 [ 4.418014] acpi_bus_attach+0x6a/0x200 [ 4.422013] acpi_bus_scan+0x38/0x70 [ 4.426011] acpi_scan_init+0x10c/0x271 [ 4.429001] acpi_init+0x2fa/0x348 [ 4.433004] ? acpi_sleep_proc_init+0x2d/0x2d [ 4.437001] do_one_initcall+0x43/0x169 [ 4.441001] kernel_init_freeable+0x1d0/0x258 [ 4.445003] ? rest_init+0xe0/0xe0 [ 4.449001] kernel_init+0xe/0x150 ====================== cut here ============================= It looks like the pci_find_pcie_root_port() was trying to find the Root Port for the PCI device which is the Root Port already, it will return NULL and trigger the problem, so check the highest_pcie_bridge to fix thie problem. Fixes: a99b646afa8a ("PCI: Disable PCIe Relaxed Ordering if unsupported") Fixes: c56d4450eb68 ("PCI: Turn off Request Attributes to avoid Chelsio T5 Completion erratum") Reported-by: Eric Dumazet <eric.dumazet@gmail.com> Signed-off-by: Eric Dumazet <eric.dumazet@gmail.com> Signed-off-by: Ding Tianhong <dingtianhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-08-15PCI: rcar: Fix memory leak when no PCIe card is insertedHarunobu Kurokawa
When no PCIe card is inserted, there is a memory leak as pci_free_resource_list() is not called before returning. Signed-off-by: Harunobu Kurokawa <harunobu.kurokawa.dn@renesas.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Simon Horman <horms+renesas@verge.net.au>
2017-08-15PCI: rcar: Fix error exit pathLorenzo Pieralisi
Commit 90634e854079 ("PCI: rcar: Convert PCI scan API to pci_scan_root_bus_bridge()") converted PCI root bus scan API to the new pci_scan_root_bus_bridge() API; in the process some error paths were not updated correctly which may cause memory leaks. Fix the driver error exit path reinstating the previous correct error exit behaviour. Fixes: 90634e854079 ("PCI: rcar: Convert PCI scan API to pci_scan_root_bus_bridge()") Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Harunobu Kurokawa <harunobu.kurokawa.dn@renesas.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Simon Horman <horms+renesas@verge.net.au>
2017-08-15PCI: pciehp: Report power fault only once until we clear itKeith Busch
When a power fault occurs, the power controller sets Power Fault Detected in the Slot Status register, and pciehp_isr() queues an INT_POWER_FAULT event to handle it. It also clears Power Fault Detected, but since nothing has yet changed to correct the power fault, the power controller will likely set it again immediately, which may cause an infinite loop when pcie_isr() rechecks Slot Status. Fix that by masking off Power Fault Detected from new events if the driver hasn't seen the power fault clear from the previous handling attempt. Fixes: fad214b0aa72 ("PCI: pciehp: Process all hotplug events before looking for new ones") Signed-off-by: Keith Busch <keith.busch@intel.com> [bhelgaas: changelog, pull test out and add comment] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Mayurkumar Patel <mayurkumar.patel@intel.com> Cc: stable@vger.kernel.org # 4.9+
2017-08-14PCI: Disable Relaxed Ordering Attributes for AMD A1100dingtianhong
Casey reported that the AMD ARM A1100 SoC has a bug in its PCIe Root Port where Upstream Transaction Layer Packets with the Relaxed Ordering Attribute clear are allowed to bypass earlier TLPs with Relaxed Ordering set, it would cause Data Corruption, so we need to disable Relaxed Ordering Attribute when Upstream TLPs to the Root Port. Reported-and-suggested-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Ding Tianhong <dingtianhong@huawei.com> Acked-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-08-14PCI: Disable Relaxed Ordering for some Intel processorsdingtianhong
According to the Intel spec section 3.9.1 said: 3.9.1 Optimizing PCIe Performance for Accesses Toward Coherent Memory and Toward MMIO Regions (P2P) In order to maximize performance for PCIe devices in the processors listed in Table 3-6 below, the soft- ware should determine whether the accesses are toward coherent memory (system memory) or toward MMIO regions (P2P access to other devices). If the access is toward MMIO region, then software can command HW to set the RO bit in the TLP header, as this would allow hardware to achieve maximum throughput for these types of accesses. For accesses toward coherent memory, software can command HW to clear the RO bit in the TLP header (no RO), as this would allow hardware to achieve maximum throughput for these types of accesses. Table 3-6. Intel Processor CPU RP Device IDs for Processors Optimizing PCIe Performance Processor CPU RP Device IDs Intel Xeon processors based on 6F01H-6F0EH Broadwell microarchitecture Intel Xeon processors based on 2F01H-2F0EH Haswell microarchitecture It means some Intel processors has performance issue when use the Relaxed Ordering Attribute, so disable Relaxed Ordering for these root port. Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Ding Tianhong <dingtianhong@huawei.com> Acked-by: Alexander Duyck <alexander.h.duyck@intel.com> Acked-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-08-14PCI: Disable PCIe Relaxed Ordering if unsupporteddingtianhong
When bit4 is set in the PCIe Device Control register, it indicates whether the device is permitted to use relaxed ordering. On some platforms using relaxed ordering can have performance issues or due to erratum can cause data-corruption. In such cases devices must avoid using relaxed ordering. The patch adds a new flag PCI_DEV_FLAGS_NO_RELAXED_ORDERING to indicate that Relaxed Ordering (RO) attribute should not be used for Transaction Layer Packets (TLP) targeted towards these affected root complexes. This patch checks if there is any node in the hierarchy that indicates that using relaxed ordering is not safe. In such cases the patch turns off the relaxed ordering by clearing the capability for this device. Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Ding Tianhong <dingtianhong@huawei.com> Acked-by: Ashok Raj <ashok.raj@intel.com> Acked-by: Alexander Duyck <alexander.h.duyck@intel.com> Acked-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-08-14PCI/MSI: Assume MSIs use real Requester ID, not an aliasRobin Murphy
Currently, we handle all DMA aliases equally when calculating MSI requester IDs for the generic infrastructure. This turns out to be the wrong thing to do in the face of pure DMA quirks like those of Marvell SATA cards, where in the usual case the last thing seen in the alias walk is the DMA phantom function: we end up configuring the MSI doorbell to expect that alias, then find we have no interrupts since the MSI writes still come from the 'real' RID, thus get filtered out and ignored. Improve the alias walk to only account for the topological aliases that matter, based on the logic from the Intel IRQ remapping code. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com>
2017-08-14PCI: vmd: Free up IRQs on suspend pathScott Bauer
Free up the IRQs we request on the suspend path and reallocate them on the resume path. Fixes this error: CPU 111 disable failed: CPU has 9 vectors assigned and there are only 0 available. Error taking CPU111 down: -34 Non-boot CPUs are not disabled Enabling non-boot CPUs ... Signed-off-by: Scott Bauer <scott.bauer@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Keith Busch <keith.busch@intel.com>
2017-08-10PCI: Add ACS quirk for APM X-Gene devicesFeng Kan
The APM X-Gene PCIe root port does not support ACS at this point. However, the hardware provides isolation and source validation through the SMMU. The stream ID generated by the PCIe ports contain both the bus/device/ function number as well as the port ID in its 3 most significant bits. Turn on ACS but disable all the peer-to-peer features. Signed-off-by: Feng Kan <fkan@apm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Alex Williamson <alex.williamson@redhat.com> Acked-by: Tanmay Inamdar <tinamdar@apm.com>
2017-08-10PCI: Constify bin_attribute structuresBhumika Goyal
Add const to bin_attribute structures as they are only passed to the functions sysfs_{remove/create}_bin_file. The corresponding arguments are of type const, so declare the structures to be const. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-10PCI: Constify hotplug pci_device_id structuresArvind Yadav
pci_device_id are not supposed to change at runtime. All functions working with pci_device_id provided by <linux/pci.h> work with const pci_device_id. So mark the non-const structs as const. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> [bhelgaas: squash shpchp, ibmphp, bmphp_ebda, cpcihp_zt5550, cpqphp] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-10PCI: Constify hotplug attribute_group structuresArvind Yadav
attribute_groups are not supposed to change at runtime. All functions working with attribute_groups provided by <linux/sysfs.h> work with const attribute_group. So mark the non-const structs as const. File size before: text data bss dec hex filename 418 160 8 586 24a drivers/pci/hotplug/rpadlpar_sysfs.o File size After adding 'const': text data bss dec hex filename 482 96 8 586 232 drivers/pci/hotplug/rpadlpar_sysfs.o Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Tyrel Datwyler <tyreld@linux.vnet.ibm.com>
2017-08-10PCI: Constify label attribute_group structuresArvind Yadav
attribute_groups are not supposed to change at runtime. All functions working with attribute_groups provided by <linux/sysfs.h> work with const attribute_group. So mark the non-const structs as const. File size before: text data bss dec hex filename 930 320 0 1250 4e2 drivers/pci/pci-label.o File size After adding 'const': text data bss dec hex filename 1058 192 0 1250 4ca drivers/pci/pci-label.o Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-10PCI: Constify sysfs attribute_group structuresArvind Yadav
attribute_groups are not supposed to change at runtime. All functions working with attribute_groups provided by <linux/sysfs.h> work with const attribute_group. So mark the non-const structs as const. File size before: text data bss dec hex filename 8480 2024 4 10508 290c drivers/pci/pci-sysfs.o File size After adding 'const': text data bss dec hex filename 8736 1768 4 10508 290c drivers/pci/pci-sysfs.o Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-10PCI: Inline and remove pcibios_update_irq()Bjorn Helgaas
pcibios_update_irq() was a weak function with only one trivial implementation. Inline it and remove the weak function. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-10hyper-v: Globalize vp_indexVitaly Kuznetsov
To support implementing remote TLB flushing on Hyper-V with a hypercall we need to make vp_index available outside of vmbus module. Rename and globalize. Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Stephen Hemminger <sthemmin@microsoft.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Haiyang Zhang <haiyangz@microsoft.com> Cc: Jork Loeser <Jork.Loeser@microsoft.com> Cc: K. Y. Srinivasan <kys@microsoft.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Simon Xiao <sixiao@microsoft.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: devel@linuxdriverproject.org Link: http://lkml.kernel.org/r/20170802160921.21791-7-vkuznets@redhat.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-08-03PCI: hv: Do not sleep in compose_msi_msg()Stephen Hemminger
The setup of MSI with Hyper-V host was sleeping with locks held. This error is reported when doing SR-IOV hotplug with kernel built with lockdep: BUG: sleeping function called from invalid context at kernel/sched/completion.c:93 in_atomic(): 1, irqs_disabled(): 1, pid: 1405, name: ip 3 locks held by ip/1405: #0: (rtnl_mutex){+.+.+.}, at: [<ffffffff976b10bb>] rtnetlink_rcv+0x1b/0x40 #1: (&desc->request_mutex){+.+...}, at: [<ffffffff970ddd33>] __setup_irq+0xb3/0x720 #2: (&irq_desc_lock_class){-.-...}, at: [<ffffffff970ddd65>] __setup_irq+0xe5/0x720 irq event stamp: 3476 hardirqs last enabled at (3475): [<ffffffff971b3005>] get_page_from_freelist+0x225/0xc90 hardirqs last disabled at (3476): [<ffffffff978024e7>] _raw_spin_lock_irqsave+0x27/0x90 softirqs last enabled at (2446): [<ffffffffc05ef0b0>] ixgbevf_configure+0x380/0x7c0 [ixgbevf] softirqs last disabled at (2444): [<ffffffffc05ef08d>] ixgbevf_configure+0x35d/0x7c0 [ixgbevf] The workaround is to poll for host response instead of blocking on completion. Signed-off-by: Stephen Hemminger <sthemmin@microsoft.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-03PCI/PM: Expand description of pci_set_power_state()Piotr Gregor
Add two reasons for returning 0 value to the description of pci_set_power_state() to include the cases when: - the transition is to D1 or D2 but D1 and D2 are not supported - the transition is to D3 but D3 is not supported Signed-off-by: Piotr Gregor <piotrgregor@rsyncme.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-03PCI: armada8k: Check the return value from clk_prepare_enable()Fabio Estevam
clk_prepare_enable() may fail, so check its return value and propagate it in the case of error. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2017-08-03PCI: hisi: Remove unused variable driverShawn Lin
The local "driver" variable was unused and caused a warning, so remove it: drivers/pci/dwc/pcie-hisi.c: In function 'hisi_pcie_probe': drivers/pci/dwc/pcie-hisi.c:271:24: warning: variable 'driver' set but not used [-Wunused-but-set-variable] Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Zhou Wang <wangzhou1@hisilicon.com> Acked-by: Gabriele Paoloni <gabriele.paoloni@huawei.com>
2017-08-03PCI: qcom: Allow ->post_init() to failBjorn Andersson
host_init() should detect and propagate errors from post_init(). In addition, by acknowledging that post_init() can fail we must disable the post_init() resources in a step separate from the deinit, so that we don't try to disable the post_init() resources a second time. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
2017-08-03PCI: qcom: Don't unroll init if ->init() failsBjorn Andersson
When the init op fails it will restore the state of the resources, so we should not disable them one more time when this happens. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
2017-08-03PCI: vmd: Assign vector zero to all bridgesKeith Busch
We don't want slower IRQ handlers impacting faster devices that happen to be assigned the same VMD interrupt vector. The driver was trying to separate such devices by checking if MSI-X wasn't used, but really we just don't want endpoint devices to share with bridges. Most bridges may use MSI currently, so that criteria happened to work, but newer ones may use MSI-X, so this patch explicitly checks the device type when choosing a vector. Signed-off-by: Keith Busch <keith.busch@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-03PCI: vmd: Reserve IRQ pre-vector for better affinityKeith Busch
The driver has a special purpose for the VMD device's first IRQ, so this one shouldn't be considered for IRQ affinity. Signed-off-by: Keith Busch <keith.busch@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-03PCI: tegra: Explicitly request exclusive reset controlPhilipp Zabel
Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting reset lines") started to transition the reset control request API calls to explicitly state whether the driver needs exclusive or shared reset control behavior. Convert all drivers requesting exclusive resets to the explicit API call so the temporary transition helpers can be removed. No functional changes. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com>
2017-08-03PCI: imx6: Explicitly request exclusive reset controlPhilipp Zabel
Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting reset lines") started to transition the reset control request API calls to explicitly state whether the driver needs exclusive or shared reset control behavior. Convert all drivers requesting exclusive resets to the explicit API call so the temporary transition helpers can be removed. No functional changes. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Richard Zhu <hongxing.zhu@nxp.com> Cc: Lucas Stach <l.stach@pengutronix.de>
2017-08-03PCI: Remove unused pci_fixup_irqs() functionMatthew Minter
Now we have removed all callers of pci_fixup_irqs() and migrated everything to pci_assign_irq(), delete the pci_fixup_irqs() function completely. Signed-off-by: Matthew Minter <matt@masarand.com> [lorenzo.pieralisi@arm.com: updated commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-03treewide: Consolidate Apple DMI checksLukas Wunner
We're about to amend ACPI bus scan with DMI checks whether we're running on a Mac to support Apple device properties in AML. The DMI checks are performed for every single device, adding overhead for everything x86 that isn't Apple, which is the majority. Rafael and Andy therefore request to perform the DMI match only once and cache the result. Outside of ACPI various other Apple DMI checks exist and it seems reasonable to use the cached value there as well. Rafael, Andy and Darren suggest performing the DMI check in arch code and making it available with a header in include/linux/platform_data/x86/. To this end, add early_platform_quirks() to arch/x86/kernel/quirks.c to perform the DMI check and invoke it from setup_arch(). Switch over all existing Apple DMI checks, thereby fixing two deficiencies: * They are now #defined to false on non-x86 arches and can thus be optimized away if they're located in cross-arch code. * Some of them only match "Apple Inc." but not "Apple Computer, Inc.", which is used by BIOSes released between January 2006 (when the first x86 Macs started shipping) and January 2007 (when the company name changed upon introduction of the iPhone). Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Suggested-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Suggested-by: Darren Hart <dvhart@infradead.org> Signed-off-by: Lukas Wunner <lukas@wunner.de> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-08-03PCI: dwc: designware: Handle ->host_init() failuresBjorn Andersson
In several dwc-based drivers, ->host_init() can fail, so make sure to propagate and handle this to avoid continuing operation of a driver or hardware in an invalid state. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Joao Pinto <jpinto@synopsys.com> Acked-by: Jingoo Han <jingoohan1@gmail.com>
2017-08-02PCI: shpchp: Enable bridge bus mastering if MSI is enabledAleksandr Bezzubikov
An SHPC may generate MSIs to notify software about slot or controller events (SHPC spec r1.0, sec 4.7). A PCI device can only generate an MSI if it has bus mastering enabled. Enable bus mastering if the bridge contains an SHPC that uses MSI for event notifications. Signed-off-by: Aleksandr Bezzubikov <zuban32s@gmail.com> [bhelgaas: changelog] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Cc: stable@vger.kernel.org
2017-08-02PCI: dwc: designware: Test PCIE_ATU_ENABLE bit specificallyJisheng Zhang
The ATU CTRL2 register is 32 bits, and bits other than the enable bit may be set. To check whether the ATU is enabled or not, we should test the enable bit specifically. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Joao Pinto <jpinto@synopsys.com> Acked-by: Jingoo Han <jingoohan1@gmail.com>
2017-08-02PCI: dwc: designware: Make dw_pcie_prog_*_atu_unroll() staticCarlos Palminha
Helper functions dw_pcie_prog_*_atu_unroll() don't need to be in global scope, so make them static. Cleans up sparse warnings: - symbol 'dw_pcie_prog_outbound_atu_unroll' was not declared. Should it be static? - symbol 'dw_pcie_prog_inbound_atu_unroll' was not declared. Should it be static? Signed-off-by: Carlos Palminha <palminha@synopsys.com> [bhelgaas: rewrap to fit in 80 columns] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Joao Pinto <jpinto@synopsys.com> Acked-by: Jingoo Han <jingoohan1@gmail.com>
2017-08-02PCI: mvebu: Remove unneeded gpiod NULL checkFabio Estevam
The gpiod API checks for NULL descriptors, so there is no need to duplicate the check in the driver. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com
2017-08-02PCI: Add a generic weak pcibios_align_resource()Palmer Dabbelt
Multiple architectures define this as a trivial function, and I'm adding another one as part of the RISC-V port. Add a __weak version of pcibios_align_resource() and delete the now-obselete ones in a handful of ports. The only functional change should be that a handful of ports used to export pcibios_fixup_bus(). Only some architectures export this, so I just dropped it. Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-02PCI: Add a generic weak pcibios_fixup_bus()Palmer Dabbelt
Multiple architectures define this as an empty function, and I'm adding another one as part of the RISC-V port. Add a __weak version of pcibios_fixup_bus() and delete the now-obselete ones in a handful of ports. The only functional change should be that microblaze used to export pcibios_fixup_bus(). None of the other architectures exports this, so I just dropped it. Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-01PCI: Add pci_reset_function_locked()Marc Zyngier
The implementation of PCI workarounds may require that the device is reset from its probe function. This implies that the PCI device lock is already held, and makes calling pci_reset_function() impossible (since it will itself try to take that lock). Add pci_reset_function_locked(), which is the equivalent of pci_reset_function(), except that it requires the PCI device lock to be already held by the caller. Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> [bhelgaas: folded in fix for conflict with 52354b9d1f46 ("PCI: Remove __pci_dev_reset() and pci_dev_reset()")] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: stable@vger.kernel.org # 4.11: 52354b9d1f46: PCI: Remove __pci_dev_reset() and pci_dev_reset() Cc: stable@vger.kernel.org # 4.11
2017-08-01ACPI / PCI / PM: Rework acpi_pci_propagate_wakeup()Rafael J. Wysocki
The acpi_pci_propagate_wakeup() routine is there to handle cases in which PCI bridges (or PCIe ports) are expected to signal wakeup for devices below them, but currently it doesn't do that correctly. The problem is that acpi_pci_propagate_wakeup() uses acpi_pm_set_device_wakeup() for bridges and if that routine is called for multiple times to disable wakeup for the same device, it will disable it on the first invocation and the next calls will have no effect (it works analogously when called to enable wakeup, but that is not a problem). Now, say acpi_pci_propagate_wakeup() has been called for two different devices under the same bridge and it has called acpi_pm_set_device_wakeup() for that bridge each time. The bridge is now enabled to generate wakeup signals. Next, suppose that one of the devices below it resumes and acpi_pci_propagate_wakeup() is called to disable wakeup for that device. It will then call acpi_pm_set_device_wakeup() for the bridge and that will effectively disable remote wakeup for all devices under it even though some of them may still be suspended and remote wakeup may be expected to work for them. To address this (arguably theoretical) issue, allow wakeup.enable_count under struct acpi_device to grow beyond 1 in certain situations. In particular, allow that to happen in acpi_pci_propagate_wakeup() when wakeup is enabled or disabled for PCI bridges, so that wakeup is actually disabled for the bridge when all devices under it resume and not when just one of them does that. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-01PCI / PM: Skip bridges in pci_enable_wake()Rafael J. Wysocki
PCI bridges only have a reason to generate wakeup signals on behalf of devices below them, so avoid preparing bridges for wakeup directly in pci_enable_wake(). Also drop the pci_has_subordinate() check from pci_pm_default_resume() as this will be done by pci_enable_wake() itself now. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com>
2017-07-31PCI: Mark AMD Stoney GPU ATS as brokenJoerg Roedel
ATS is broken on this hardware and causes IOMMU stalls and system failure. Disable ATS on these devices to make them usable again with IOMMU enabled. Note that the commit in the Fixes tag is not buggy; it just uncovers the problem in the hardware by increasing the ATS flush rate. Link: https://lists.linuxfoundation.org/pipermail/iommu/2017-March/020836.html Link: https://bugzilla.redhat.com/show_bug.cgi?id=1409201 Fixes: b1516a14657a ("iommu/amd: Implement flush queue") Signed-off-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-31PCI: iproc: Remove unused struct iproc_pcie *pcieShawn Lin
The local variable "pcie" was unused, so remove it. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Ray Jui <rjui@broadcom.com>
2017-07-31PCI: Mark Broadcom HT2100 Root Port Extended Tags as brokenSinan Kaya
Per PCIe r3.1, sec 2.2.6.2 and 7.8.4, a Requester may not use 8-bit Tags unless its Extended Tag Field Enable is set, but all Receivers/Completers must handle 8-bit Tags correctly regardless of their Extended Tag Field Enable. Some devices do not handle 8-bit Tags as Completers, so add a quirk for them. If we find such a device, we disable Extended Tags for the entire hierarchy to make peer-to-peer DMA possible. The Broadcom HT2100 seems to have issues with handling 8-bit tags. Mark it as broken. The pci_walk_bus() in the quirk handles devices we've enumerated in the past, and pci_configure_device() handles devices we enumerate in the future. Fixes: 60db3a4d8cc9 ("PCI: Enable PCIe Extended Tags if supported") Link: https://bugzilla.redhat.com/show_bug.cgi?id=1467674 Reported-and-tested-by: Wim ten Have <wim.ten.have@oracle.com> Signed-off-by: Sinan Kaya <okaya@codeaurora.org> [bhelgaas: changelog, tweak messages, rename bit and quirk] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-07-31PCI/portdrv: Move error handler methods to struct pcie_port_service_driverChristoph Hellwig
Move the error handler methods to struct pcie_port_service_driver and avoid the detour through the mostly unused pci_error_handlers structure. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-07-14Merge tag 'pm-fixes-4.13-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull power management fixes from Rafael Wysocki: "These fix a recently exposed issue in the PCI device wakeup code and one older problem related to PCI device wakeup that has been reported recently, modify one more piece of computations in intel_pstate to get rid of a rounding error, fix a possible race in the schedutil cpufreq governor, fix the device PM QoS sysfs interface to correctly handle invalid user input, fix return values of two probe routines in devfreq drivers and constify an attribute_group structure in devfreq. Specifics: - Avoid clearing the PCI PME Enable bit for devices as a result of config space restoration which confuses AML executed afterward and causes wakeup events to be lost on some systems (Rafael Wysocki). - Fix the native PCIe PME interrupts handling in the cases when the PME IRQ is set up as a system wakeup one so that runtime PM remote wakeup works as expected after system resume on systems where that happens (Rafael Wysocki). - Fix the device PM QoS sysfs interface to handle invalid user input correctly instead of using an unititialized variable value as the latency tolerance for the device at hand (Dan Carpenter). - Get rid of one more rounding error from intel_pstate computations (Srinivas Pandruvada). - Fix the schedutil cpufreq governor to prevent it from possibly accessing unititialized data structures from governor callbacks in some cases on systems when multiple CPUs share a single cpufreq policy object (Vikram Mulukutla). - Fix the return values of probe routines in two devfreq drivers (Gustavo Silva). - Constify an attribute_group structure in devfreq (Arvind Yadav)" * tag 'pm-fixes-4.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: PCI / PM: Fix native PME handling during system suspend/resume PCI / PM: Restore PME Enable after config space restoration cpufreq: schedutil: Fix sugov_start() versus sugov_update_shared() race PM / QoS: return -EINVAL for bogus strings cpufreq: intel_pstate: Fix ratio setting for min_perf_pct PM / devfreq: constify attribute_group structures. PM / devfreq: tegra: fix error return code in tegra_devfreq_probe() PM / devfreq: rk3399_dmc: fix error return code in rk3399_dmcfreq_probe()
2017-07-14Merge branch 'pm-pci'Rafael J. Wysocki
* pm-pci: PCI / PM: Fix native PME handling during system suspend/resume PCI / PM: Restore PME Enable after config space restoration
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