| Age | Commit message (Collapse) | Author |
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PARF hardware block which is a wrapper on top of DWC PCIe controller
mirrors the DBI and ATU register space. It uses PARF_SLV_ADDR_SPACE_SIZE
register to get the size of the memory block to be mirrored and uses
PARF_DBI_BASE_ADDR, PARF_ATU_BASE_ADDR registers to determine the base
address of DBI and ATU space inside the memory block that is being
mirrored.
When a memory region which is located above the SLV_ADDR_SPACE_SIZE
boundary is used for BAR region then there could be an overlap of DBI and
ATU address space that is getting mirrored and the BAR region. This
results in DBI and ATU address space contents getting updated when a PCIe
function driver tries updating the BAR/MMIO memory region. Reference
memory map of the PCIe memory region with DBI and ATU address space
overlapping BAR region is as below.
|---------------|
| |
| |
------- --------|---------------|
| | |---------------|
| | | DBI |
| | |---------------|---->DBI_BASE_ADDR
| | | |
| | | |
| PCIe | |---->2*SLV_ADDR_SPACE_SIZE
| BAR/MMIO|---------------|
| Region | ATU |
| | |---------------|---->ATU_BASE_ADDR
| | | |
PCIe | |---------------|
Memory | | DBI |
Region | |---------------|---->DBI_BASE_ADDR
| | | |
| --------| |
| | |---->SLV_ADDR_SPACE_SIZE
| |---------------|
| | ATU |
| |---------------|---->ATU_BASE_ADDR
| | |
| |---------------|
| | DBI |
| |---------------|---->DBI_BASE_ADDR
| | |
| | |
----------------|---------------|
| |
| |
| |
|---------------|
Currently memory region beyond the SLV_ADDR_SPACE_SIZE boundary is not
used for BAR region which is why the above mentioned issue is not
encountered. This issue is discovered as part of internal testing when we
tried moving the BAR region beyond the SLV_ADDR_SPACE_SIZE boundary. Hence
we are trying to fix this.
As PARF hardware block mirrors DBI and ATU register space after every
PARF_SLV_ADDR_SPACE_SIZE (default 0x1000000) boundary multiple, program
maximum possible size to this register by writing 0x80000000 to it(it
considers only powers of 2 as values) to avoid mirroring DBI and ATU to
BAR/MMIO region. Write the physical base address of DBI and ATU register
blocks to PARF_DBI_BASE_ADDR (default 0x0) and PARF_ATU_BASE_ADDR (default
0x1000) respectively to make sure DBI and ATU blocks are at expected
memory locations.
The register offsets PARF_DBI_BASE_ADDR_V2, PARF_SLV_ADDR_SPACE_SIZE_V2
and PARF_ATU_BASE_ADDR are applicable for platforms that use Qcom IP
rev 1.9.0, 2.7.0 and 2.9.0. PARF_DBI_BASE_ADDR_V2 and
PARF_SLV_ADDR_SPACE_SIZE_V2 are applicable for Qcom IP rev 2.3.3.
PARF_DBI_BASE_ADDR and PARF_SLV_ADDR_SPACE_SIZE are applicable for Qcom
IP rev 1.0.0, 2.3.2 and 2.4.0. Update init()/post_init() functions of the
respective Qcom IP versions to program applicable PARF_DBI_BASE_ADDR,
PARF_SLV_ADDR_SPACE_SIZE and PARF_ATU_BASE_ADDR register offsets. Update
the SLV_ADDR_SPACE_SZ macro to 0x80000000 to set highest bit in
PARF_SLV_ADDR_SPACE_SIZE register.
Cache DBI and iATU physical addresses in 'struct dw_pcie' so that
pcie_qcom.c driver can program these addresses in the PARF_DBI_BASE_ADDR
and PARF_ATU_BASE_ADDR registers.
Suggested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/linux-pci/20240814220338.1969668-1-quic_pyarlaga@quicinc.com
Signed-off-by: Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Mayank Rana <quic_mrana@quicinc.com>
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Historically, Qcom PCIe RC controllers lacked standard hotplug support. So
when an endpoint is attached to the SoC, users have to rescan the bus
manually to enumerate the device. But this can be avoided by using the Link
up event exposed by the Qcom specific 'global_irq' interrupt.
Qcom PCIe RC controllers are capable of generating the 'global' SPI
interrupt to the host CPUs. The device driver can use this interrupt to
identify events such as PCIe link specific events, safety events etc...
One such event is the PCIe Link up event generated when an endpoint is
detected on the bus and the Link is 'up'. This event can be used to
enumerate the PCIe endpoint devices without user intervention.
So add support for capturing the PCIe Link up event using the 'global'
interrupt in the driver. Once the Link up event is received, the bus
underneath the host bridge is scanned to enumerate PCIe endpoint devices.
All of the Qcom SoCs have only one Root Port per controller instance. So
only a single 'Link up' event is generated for the PCIe controller.
Link: https://lore.kernel.org/linux-pci/20240828-pci-qcom-hotplug-v4-11-263a385fbbcb@linaro.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
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Currently, the IRQ device name for both of these IRQs doesn't have Qcom
specific prefix and PCIe domain number. This causes 2 issues:
1. Pollutes the global IRQ namespace since 'global' is a common name.
2. When more than one EP controller instance is present in the SoC, naming
conflict will occur.
Hence, add 'qcom_pcie_ep_' prefix and PCIe domain number suffix to the IRQ
names to uniquely identify the IRQs and also to fix the above mentioned
issues.
Link: https://lore.kernel.org/linux-pci/20240828-pci-qcom-hotplug-v4-6-263a385fbbcb@linaro.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
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Current error message just prints the contents of PARF_INT_ALL_STATUS
register as if like the IRQ event number. It could mislead the users.
Reword it to make it clear that the error message is actually showing the
interrupt status register to help debug spurious IRQ events.
While at it, let's also switch over to dev_WARN_ONCE() so that any IRQ
storm won't flood the kernel log buffer.
Link: https://lore.kernel.org/linux-pci/20240828-pci-qcom-hotplug-v4-2-263a385fbbcb@linaro.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
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Once the events are disabled in PARF_INT_ALL_MASK register, only the
enabled events will generate global IRQ. So there is no need to do the
masking again in the IRQ handler, drop it.
If there are any spurious IRQs getting generated, they will be reported
using the existing dev_err() in the handler.
Link: https://lore.kernel.org/linux-pci/20240828-pci-qcom-hotplug-v4-1-263a385fbbcb@linaro.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
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The ACSPCIE module is capable of driving the reference clock required by
the PCIe Endpoint device. It is an alternative to on-board and external
reference clock generators. Enabling the output from the ACSPCIE module's
PAD IO Buffers requires clearing the "PAD IO disable" bits of the
ACSPCIE_PROXY_CTRL register in the CTRL_MMR register space.
Add support to enable the ACSPCIE reference clock output using the optional
device-tree property "ti,syscon-acspcie-proxy-ctrl".
Link: https://lore.kernel.org/linux-pci/20240829105316.1483684-3-s-vadapalli@ti.com
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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Add support for Xilinx QDMA Soft IP core as Root Port.
The Versal Prime devices support QDMA soft IP module in programmable logic.
The integrated QDMA Soft IP block has integrated bridge function that can
act as PCIe Root Port.
Link: https://lore.kernel.org/linux-pci/20240811022345.1178203-3-thippesw@amd.com
Signed-off-by: Thippeswamy Havalige <thippesw@amd.com>
[kwilczynski: removed unused header]
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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Add support for enabling/disabling PCIe PHYs. We can't really do
anything about failures in the disable/remove path, so just print an
error.
Link: https://lore.kernel.org/r/20240531161337.864994-7-sean.anderson@linux.dev
Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Make sure we turn off the clock on probe failure and device removal.
Fixes: de0a01f52966 ("PCI: xilinx-nwl: Enable the clock through CCF")
Link: https://lore.kernel.org/r/20240531161337.864994-6-sean.anderson@linux.dev
Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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The conditions logged by the misc interrupt can occur repeatedly and
continuously. Avoid rendering the console unusable by rate-limiting
these messages.
Link: https://lore.kernel.org/r/20240531161337.864994-5-sean.anderson@linux.dev
Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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MSIC -> MISC
Fixes: c2a7ff18edcd ("PCI: xilinx-nwl: Expand error logging")
Link: https://lore.kernel.org/r/20240531161337.864994-4-sean.anderson@linux.dev
Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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MSGF_LEG_MASK is laid out with INTA in bit 0, INTB in bit 1, INTC in bit 2,
and INTD in bit 3. Hardware IRQ numbers start at 0, and we register
PCI_NUM_INTX IRQs. So to enable INTA (aka hwirq 0) we should set bit 0.
Remove the subtraction of one.
This bug would cause INTx interrupts not to be delivered, as enabling INTB
would actually enable INTA, and enabling INTA wouldn't enable anything at
all. It is likely that this got overlooked for so long since most PCIe
hardware uses MSIs. This fixes the following UBSAN error:
UBSAN: shift-out-of-bounds in ../drivers/pci/controller/pcie-xilinx-nwl.c:389:11
shift exponent 18446744073709551615 is too large for 32-bit type 'int'
CPU: 1 PID: 61 Comm: kworker/u10:1 Not tainted 6.6.20+ #268
Hardware name: xlnx,zynqmp (DT)
Workqueue: events_unbound deferred_probe_work_func
Call trace:
dump_backtrace (arch/arm64/kernel/stacktrace.c:235)
show_stack (arch/arm64/kernel/stacktrace.c:242)
dump_stack_lvl (lib/dump_stack.c:107)
dump_stack (lib/dump_stack.c:114)
__ubsan_handle_shift_out_of_bounds (lib/ubsan.c:218 lib/ubsan.c:387)
nwl_unmask_leg_irq (drivers/pci/controller/pcie-xilinx-nwl.c:389 (discriminator 1))
irq_enable (kernel/irq/internals.h:234 kernel/irq/chip.c:170 kernel/irq/chip.c:439 kernel/irq/chip.c:432 kernel/irq/chip.c:345)
__irq_startup (kernel/irq/internals.h:239 kernel/irq/chip.c:180 kernel/irq/chip.c:250)
irq_startup (kernel/irq/chip.c:270)
__setup_irq (kernel/irq/manage.c:1800)
request_threaded_irq (kernel/irq/manage.c:2206)
pcie_pme_probe (include/linux/interrupt.h:168 drivers/pci/pcie/pme.c:348)
Fixes: 9a181e1093af ("PCI: xilinx-nwl: Modify IRQ chip for legacy interrupts")
Link: https://lore.kernel.org/r/20240531161337.864994-3-sean.anderson@linux.dev
Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: stable@vger.kernel.org
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With commit 5b6272e0efd5 ("PCI: qcom: Add OPP support to scale
performance"), OPP was used to control the interconnect and power domains
if the platform supported OPP. Also to maintain the backward compatibility
with platforms not supporting OPP but just ICC, the above mentioned commit
assumed that if ICC was not available on the platform, it would resort to
OPP.
Unfortunately, some old platforms don't support either ICC or OPP. On those
platforms, resorting to OPP in the absence of ICC throws below errors from
OPP core during suspend and resume:
qcom-pcie 1c08000.pcie: dev_pm_opp_set_opp: device opp doesn't exist
qcom-pcie 1c08000.pcie: _find_key: OPP table not found (-19)
Also, it doesn't make sense to invoke the OPP APIs when OPP is not
supported by the platform at all.
Add a "use_pm_opp" flag to identify whether OPP is supported and use it to
control invoking the OPP APIs.
Fixes: 5b6272e0efd5 ("PCI: qcom: Add OPP support to scale performance")
Link: https://lore.kernel.org/linux-pci/20240722131128.32470-1-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Mayank Rana <quic_mrana@quicinc.com>
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SA8775P SoC has support for the hardware parity check feature on the MHI
RAM (entity that holds MHI registers, etc.) But due to a hardware bug in
the parity check logic, the data parity error interrupt is getting
generated all the time when using MHI. So the hardware team has suggested
disabling the parity check error to work around the hardware bug.
Mask the parity error interrupt in PARF_INT_ALL_5_MASK register.
Fixes: 58d0d3e032b3 ("PCI: qcom-ep: Add support for SA8775P SOC")
Link: https://lore.kernel.org/linux-pci/20240808063057.7394-1-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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This code accidentally uses && where || was intended. It potentially
results in a NULL dereference.
Thus, fix the if-statement expression to use the correct condition.
Fixes: 86f271f22bbb ("PCI: keystone: Add workaround for Errata #i2037 (AM65x SR 1.0)")
Link: https://lore.kernel.org/linux-pci/1b762a93-e1b2-4af3-8c04-c8843905c279@stanley.mountain
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
[kwilczynski: commit log]
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
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Use MSI_FLAG_NO_AFFINITY, which keeps .irq_set_affinity() unset and allows
migrate_one_irq() to exit right away, without warnings like this:
IRQ...: set affinity failed(-22)
Remove the .irq_set_affinity() implementation that is no longer needed.
Link: https://lore.kernel.org/r/20240723132958.41320-16-marek.vasut+renesas@mailbox.org
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
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Use MSI_FLAG_NO_AFFINITY, which keeps .irq_set_affinity() unset and allows
migrate_one_irq() to exit right away, without warnings like this:
IRQ...: set affinity failed(-22)
Remove the .irq_set_affinity() implementation that is no longer needed.
Link: https://lore.kernel.org/r/20240723132958.41320-15-marek.vasut+renesas@mailbox.org
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
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Use MSI_FLAG_NO_AFFINITY, which keeps .irq_set_affinity() unset and allows
migrate_one_irq() to exit right away, without warnings like this:
IRQ...: set affinity failed(-22)
Remove the .irq_set_affinity() implementation that is no longer needed.
Link: https://lore.kernel.org/r/20240723132958.41320-14-marek.vasut+renesas@mailbox.org
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
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Use MSI_FLAG_NO_AFFINITY, which keeps .irq_set_affinity() unset and allows
migrate_one_irq() to exit right away, without warnings like this:
IRQ...: set affinity failed(-22)
Remove the .irq_set_affinity() implementation that is no longer needed.
Link: https://lore.kernel.org/r/20240723132958.41320-13-marek.vasut+renesas@mailbox.org
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Nirmal Patel <nirmal.patel@linux.intel.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
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Use MSI_FLAG_NO_AFFINITY, which keeps .irq_set_affinity() unset and allows
migrate_one_irq() to exit right away, without warnings like this:
IRQ...: set affinity failed(-22)
Remove the .irq_set_affinity() implementation that is no longer needed.
Link: https://lore.kernel.org/r/20240723132958.41320-12-marek.vasut+renesas@mailbox.org
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
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Use MSI_FLAG_NO_AFFINITY, which keeps .irq_set_affinity() unset and allows
migrate_one_irq() to exit right away, without warnings like this:
IRQ...: set affinity failed(-22)
Remove the .irq_set_affinity() implementation that is no longer needed.
Link: https://lore.kernel.org/r/20240723132958.41320-11-marek.vasut+renesas@mailbox.org
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
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Use MSI_FLAG_NO_AFFINITY, which keeps .irq_set_affinity() unset and allows
migrate_one_irq() to exit right away, without warnings like this:
IRQ...: set affinity failed(-22)
Remove the .irq_set_affinity() implementation that is no longer needed.
Link: https://lore.kernel.org/r/20240723132958.41320-10-marek.vasut+renesas@mailbox.org
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
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Use MSI_FLAG_NO_AFFINITY, which keeps .irq_set_affinity() unset and allows
migrate_one_irq() to exit right away, without warnings like this:
IRQ...: set affinity failed(-22)
Remove the .irq_set_affinity() implementation that is no longer needed.
Link: https://lore.kernel.org/r/20240723132958.41320-9-marek.vasut+renesas@mailbox.org
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
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Use MSI_FLAG_NO_AFFINITY, which keeps .irq_set_affinity() unset and allows
migrate_one_irq() to exit right away, without warnings like this:
IRQ...: set affinity failed(-22)
Remove the .irq_set_affinity() implementation that is no longer needed.
Link: https://lore.kernel.org/r/20240723132958.41320-8-marek.vasut+renesas@mailbox.org
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Jianjun Wang <jianjun.wang@mediatek.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
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Use MSI_FLAG_NO_AFFINITY, which keeps .irq_set_affinity() unset and allows
migrate_one_irq() to exit right away, without warnings like this:
IRQ...: set affinity failed(-22)
Remove the .irq_set_affinity() implementation that is no longer needed.
Link: https://lore.kernel.org/r/20240723132958.41320-7-marek.vasut+renesas@mailbox.org
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Jianjun Wang <jianjun.wang@mediatek.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
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Use MSI_FLAG_NO_AFFINITY, which keeps .irq_set_affinity() unset and allows
migrate_one_irq() to exit right away, without warnings like this:
IRQ...: set affinity failed(-22)
Remove the .irq_set_affinity() implementation that is no longer needed.
Link: https://lore.kernel.org/r/20240723132958.41320-6-marek.vasut+renesas@mailbox.org
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Damien Le Moal <dlemoal@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
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Use MSI_FLAG_NO_AFFINITY, which keeps .irq_set_affinity() unset and allows
migrate_one_irq() to exit right away, without warnings like this:
IRQ...: set affinity failed(-22)
Remove the .irq_set_affinity() implementation that is no longer needed.
Link: https://lore.kernel.org/r/20240723132958.41320-5-marek.vasut+renesas@mailbox.org
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
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Use MSI_FLAG_NO_AFFINITY, which keeps .irq_set_affinity() unset and allows
migrate_one_irq() to exit right away, without warnings like this:
IRQ...: set affinity failed(-22)
Remove the .irq_set_affinity() implementation that is no longer needed.
Link: https://lore.kernel.org/r/20240723132958.41320-4-marek.vasut+renesas@mailbox.org
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
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Use MSI_FLAG_NO_AFFINITY, which keeps .irq_set_affinity() unset and allows
migrate_one_irq() to exit right away, without warnings like this:
IRQ...: set affinity failed(-22)
Remove the .irq_set_affinity() implementation that is no longer needed.
Link: https://lore.kernel.org/r/20240723132958.41320-3-marek.vasut+renesas@mailbox.org
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
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- Remove unused struct 'acpi_handle_node' (Dr. David Alan Gilbert)
- Use array notation for portdrv .id_table consistently (Masahiro Yamada)
- Switch to new Intel CPU model defines (Tony Luck)
- Add missing MODULE_DESCRIPTION() macros (Jeff Johnson)
* pci/misc:
PCI: controller: Add missing MODULE_DESCRIPTION() macros
PCI: Add missing MODULE_DESCRIPTION() macros
PCI/PM: Switch to new Intel CPU model defines
PCI: Use array for .id_table consistently
ACPI: PCI: Remove unused struct 'acpi_handle_node'
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- Create "domain" symlink for vmd before adding devices below the VMD
bridge so it's available when mdadm assembles RAID devices from them
(Jiwei Sun)
* pci/controller/vmd:
PCI: vmd: Create domain symlink before pci_bus_add_devices()
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- Ensure Tegra194 and Tegra234 inbound ATU entries are 64KB-aligned to
match the hardware restriction (Jon Hunter)
- Remove unused struct 'tegra_pcie_soc' (Dr. David Alan Gilbert)
* pci/controller/tegra194:
PCI: tegra: Remove unused struct 'tegra_pcie_soc'
PCI: tegra194: Set EP alignment restriction for inbound ATU
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- Use dev_err_probe() in dw-rockchip probe error path so the failures
aren't silent (Uwe Kleine-König)
- Sleep PCIE_T_PVPERL_MS (100ms) before deasserting PERST# (Damien Le Moal)
- Sleep PCIE_T_RRS_READY_MS (100ms) after conventional reset, before a
config access (Damien Le Moal)
- Request the PERST# GPIO with GPIOD_OUT_LOW so it matches the POR value,
which avoids a spurious PERST# assertion and fixes a Qcom modem firmware
crash and issues with WLAN controllers, e.g., RTL8822CE (Manivannan
Sadhasivam for rockchip, Niklas Cassel for dw-rockchip)
- Refactor dw-rockchip and add support for Endpoint mode for rk3568 and
rk3588 (Niklas Cassel)
* pci/controller/rockchip:
PCI: dw-rockchip: Use pci_epc_init_notify() directly
PCI: dw-rockchip: Add endpoint mode support
PCI: dw-rockchip: Refactor the driver to prepare for EP mode
PCI: dw-rockchip: Add rockchip_pcie_get_ltssm() helper
PCI: dw-rockchip: Fix weird indentation
PCI: dw-rockchip: Fix initial PERST# GPIO value
PCI: dw-rockchip: Add error messages in .probe() error paths
PCI: rockchip: Use GPIOD_OUT_LOW flag while requesting ep_gpio
PCI: rockchip-host: Wait 100ms after reset before starting configuration
PCI: rockchip-host: Fix rockchip_pcie_host_init_port() PERST# handling
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- Add Synopsys DWC macros for lane skew configuration (Yoshihiro Shimoda)
- Add struct rcar_gen4_pcie_drvdata to provide for future SoCs with
different initialization requirements (Yoshihiro Shimoda)
- Add .ltssm_control() method for SoC dependencies (Yoshihiro Shimoda)
- Add r8a779g0 (R-Car V4H) support (Yoshihiro Shimoda)
* pci/controller/rcar-gen4:
PCI: rcar-gen4: Add support for R-Car V4H
PCI: rcar-gen4: Add .ltssm_control() for other SoC support
PCI: rcar-gen4: Add struct rcar_gen4_pcie_drvdata
PCI: dwc: Add PCIE_PORT_{FORCE,LANE_SKEW} macros
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- Demote WARN() to dev_warn_ratelimited() in rcar_pcie_wakeup() to avoid
excessive warnings when the driver is confused about link state when
resuming (Marek Vasut)
* pci/controller/rcar:
PCI: rcar: Demote WARN() to dev_warn_ratelimited() in rcar_pcie_wakeup()
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- Use devm_clk_bulk_get_all() to get all the clocks from DT to avoid
writing out all the clock names (Manivannan Sadhasivam)
- Add DT binding and driver support for the SA8775P SoC (Mrinmay Sarkar)
- Refactor dw_pcie_edma_find_chip() to enable adding support for Hyper DMA
(HDMA) (Manivannan Sadhasivam)
- Enable drivers to supply the eDMA channel count since some can't auto
detect this (Manivannan Sadhasivam)
- Add HDMA support for the SA8775P SoC (Mrinmay Sarkar)
- Override the SA8775P NO_SNOOP default to avoid possible memory corruption
(Mrinmay Sarkar)
- Make sure resources are disabled during PERST# assertion, even if the
link is already disabled (Manivannan Sadhasivam)
- Vote for the CPU-PCIe ICC (interconnect) path to ensure it stays active
even if other drivers don't vote for it (Krishna chaitanya chundru)
- Add Operating Performance Points (OPP) to scale performance state based
on aggregate link bandwidth to improve SoC power efficiency (Krishna
chaitanya chundru)
- Return failure instead of success if dev_pm_opp_find_freq_floor() fails
(Dan Carpenter)
- Avoid an error pointer dereference if dev_pm_opp_find_freq_exact() fails
(Dan Carpenter)
- Prevent use of uninitialized data in qcom_pcie_suspend_noirq() (Dan
Carpenter)
* pci/controller/qcom:
PCI: qcom: Prevent use of uninitialized data in qcom_pcie_suspend_noirq()
PCI: qcom: Prevent potential error pointer dereference
PCI: qcom: Fix missing error code in qcom_pcie_probe()
PCI: qcom: Add OPP support to scale performance
PCI: Bring the PCIe speed to MBps logic to new pcie_dev_speed_mbps()
PCI: qcom: Add ICC bandwidth vote for CPU to PCIe path
PCI: qcom-ep: Disable resources unconditionally during PERST# assert
PCI: qcom-ep: Override NO_SNOOP attribute for SA8775P EP
PCI: qcom: Override NO_SNOOP attribute for SA8775P RC
PCI: epf-mhi: Enable HDMA for SA8775P SoC
PCI: qcom-ep: Add HDMA support for SA8775P SoC
PCI: dwc: Pass the eDMA mapping format flag directly from glue drivers
PCI: dwc: Skip finding eDMA channels count for HDMA platforms
PCI: dwc: Refactor dw_pcie_edma_find_chip() API
PCI: qcom-ep: Add support for SA8775P SOC
dt-bindings: PCI: qcom-ep: Add support for SA8775P SoC
PCI: qcom: Use devm_clk_bulk_get_all() API
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- Move PLDA XpressRICH generic DT binding properties to
plda,xpressrich3-axi-common.yaml where they can be shared across
PLDA-based drivers (Minda Chen)
- Create a drivers/pci/controller/plda/ directory for PLDA-based drivers
and move pcie-microchip-host.c there (Minda Chen)
- Move PLDA generic macros to pcie-plda.h where they can be shared across
drivers (Minda Chen)
- Extract PLDA generic structures from pcie-microchip-host.c, rename them
to be generic, and move them to pcie-plda-host.c where they can be shared
across drivers (Minda Chen)
- Add a .request_event_irq() callback for requesting device-specific
interrupts in addition to PLDA-generic interrupts (Minda Chen)
- Add DT binding and driver for the StarFive JH7110 SoC, based on PLDA IP
(Minda Chen)
* pci/controller/microchip:
PCI: starfive: Add JH7110 PCIe controller
dt-bindings: PCI: Add StarFive JH7110 PCIe controller
PCI: Add PCIE_RESET_CONFIG_DEVICE_WAIT_MS waiting time value
PCI: plda: Pass pci_host_bridge to plda_pcie_setup_iomems()
PCI: plda: Add host init/deinit and map bus functions
PCI: plda: Add event bitmap field to struct plda_pcie_rp
PCI: microchip: Move IRQ functions to pcie-plda-host.c
PCI: microchip: Add event irqchip field to host port and add PLDA irqchip
PCI: microchip: Add get_events() callback and PLDA get_event()
PCI: microchip: Add INTx and MSI event num to struct plda_event
PCI: microchip: Add request_event_irq() callback function
PCI: microchip: Add num_events field to struct plda_pcie_rp
PCI: microchip: Rename interrupt related functions
PCI: microchip: Move PLDA functions to pcie-plda-host.c
PCI: microchip: Rename PLDA functions to be generic
PCI: microchip: Move PLDA structures to plda-pcie.h
PCI: microchip: Rename PLDA structures to be generic
PCI: microchip: Add bridge_addr field to struct mc_pcie
PCI: microchip: Move PLDA IP register macros to pcie-plda.h
PCI: microchip: Move pcie-microchip-host.c to PLDA directory
dt-bindings: PCI: Add PLDA XpressRICH PCIe host common properties
# Conflicts:
# drivers/pci/pci.h
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* pci/controller/loongson:
PCI: loongson: Enable MSI in LS7A Root Complex
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- Make the ls-gen4 struct mobiveil_rp_ops constant (Christophe JAILLET)
* pci/controller/layerscape:
PCI: ls-gen4: Make struct mobiveil_rp_ops constant
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- Enable BAR 0 only for v3.65a to avoid Completion Timeouts that
cause a 45 second boot delay on the v4.90a-based AM654x SoC (Siddharth
Vadapalli)
- Avoid a NULL pointer dereference if DT failed to provide a host bridge
memory window (Aleksandr Mishin)
* pci/controller/keystone:
PCI: keystone: Add workaround for Errata #i2037 (AM65x SR 1.0)
PCI: keystone: Fix NULL pointer dereference in case of DT error in ks_pcie_setup_rc_app_regs()
PCI: keystone: Don't enable BAR 0 for AM654x
PCI: keystone: Relocate ks_pcie_set/clear_dbi_mode()
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- Return zero, not garbage, when reading PCI_INTERRUPT_PIN from a Hyper-V
device (Wei Liu)
* pci/controller/hyperv:
PCI: hv: Return zero, not garbage, when reading PCI_INTERRUPT_PIN
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- Use devm_clk_bulk_get_all_enable() to simplify clock setup (Shradha Todi)
* pci/controller/exynos:
PCI: exynos: Adapt to use bulk clock APIs
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- Correct the dra7xx_pcie_cpu_addr_fixup() parameter name, which takes a
CPU address but called it "pci_addr" (Niklas Cassel)
* pci/controller/dra7xx:
PCI: dra7xx: Fix dra7xx_pcie_cpu_addr_fixup() parameter name
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- Correct the artpec6_pcie_cpu_addr_fixup() parameter name, which takes a
CPU address but called it "pci_addr" (Niklas Cassel)
* pci/controller/artpec6:
PCI: artpec6: Fix artpec6_pcie_cpu_addr_fixup() parameter name
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- Check IORESOURCE_BUS existence to avoid NULL pointer dereference
(Aleksandr Mishin)
* pci/controller/al:
PCI: al: Check IORESOURCE_BUS existence during probe
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- Use msleep() in DWC core instead of usleep_range() for ~100 ms sleep
(Konrad Dybcio)
- Fix iATU slot management to avoid using the wrong slot after PERST#
assert/deassert, which could potentially cause DMA to go the wrong place
(Frank Li)
- Consolidate dw_pcie_prog_outbound_atu() arguments into a struct to ease
adding new functionality like initiating Message TLPs (Yoshihiro Shimoda)
- Add support for endpoints to initiate PCIe messages (Yoshihiro Shimoda)
- Add #defines for PCIe INTx messages (Yoshihiro Shimoda)
- Add support for endpoints to initiate PCIe PME_Turn_Off messages for
system suspend (Frank Li)
- Add dw_pcie_ep_linkdown() to reinitialize registers that are lost when
the link goes down (Manivannan Sadhasivam)
- Use dw_pcie_ep_linkdown() to reinitialize qcom non-sticky registers that
are lost when the link goes down (Manivannan Sadhasivam)
- Enforce DWC limitation that 64-bit BARs must start with the even numbered
BAR (Niklas Cassel)
* pci/controller/dwc:
PCI: dwc: ep: Enforce DWC specific 64-bit BAR limitation
PCI: layerscape-ep: Use the generic dw_pcie_ep_linkdown() API to handle Link Down event
PCI: qcom-ep: Use the generic dw_pcie_ep_linkdown() API to handle Link Down event
PCI: dwc: ep: Remove dw_pcie_ep_init_notify() wrapper
PCI: dwc: ep: Add a generic dw_pcie_ep_linkdown() API to handle Link Down event
PCI: dwc: Add generic MSG TLP support for sending PME_Turn_Off when system suspend
PCI: Add PCIE_MSG_CODE_PME_TURN_OFF message macro
PCI: Add PCIE_MSG_CODE_ASSERT_INTx message macros
PCI: dwc: Add outbound MSG TLPs support
PCI: dwc: Consolidate args of dw_pcie_prog_outbound_atu() into a structure
PCI: dwc: Fix index 0 incorrectly being interpreted as a free ATU slot
PCI: dwc: Use msleep() in dw_pcie_wait_for_link()
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- Include <linux/irqchip/chained_irq.h> in dra7xx to avoid implicitly
including it elsewhere (Andy Shevchenko)
- Remove unused <linux/of_gpio.h> from aardvark and dwc drivers (dra7xx,
meson, qcom, tegra194) (Andy Shevchenko)
- Convert kirin to use scoped for_each_available_child_of_node() to ease
future error exits (Javier Carrasco)
- Convert imx6 and kirin to use the agnostic GPIO API to simplify GPIO
setup and remove usage of the deprecated of_gpio.h API (Andy Shevchenko)
* pci/controller/gpio:
PCI: kirin: Convert to use agnostic GPIO API
PCI: kirin: Convert kirin_pcie_parse_port() to scoped iterator
PCI: imx6: Convert to use agnostic GPIO API
PCI: dwc: Remove unused of_gpio.h inclusion
PCI: aardvark: Remove unused of_gpio.h inclusion
PCI: dra7xx: Add missing chained IRQ header inclusion
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- Remove unused struct pci_epf_group.type_group (Christophe JAILLET)
- Use cached epc_features instead of pci_epc_get_features() to avoid having
to check for failure (potential NULL pointer dereference) (Manivannan
Sadhasivam)
- Drop pointless local msix_capable variable in pci_epf_test_alloc_space()
(Manivannan Sadhasivam)
- Rename struct pci_epc_event_ops.core_init to .epc_init, since "core" is
no longer meaningful here (Manivannan Sadhasivam)
- Rename pci_epc_bme_notify(), pci_epf_mhi_bme(), pci_epc_bme_notify() to
spell out "bus_master_enable" instead of "bme" (Manivannan Sadhasivam)
- Factor pci_epf_test_clear_bar() and pci_epf_test_free_space() out of
pci_epf_test_unbind() so they can be reused elsewhere (Manivannan
Sadhasivam)
- Move DMA initialization to the pci_epf_mhi_epc_init() callback so
endpoint drivers do this uniformly (Manivannan Sadhasivam)
- Add endpoint testing for Link Down events (Manivannan Sadhasivam)
- Add 'epc_deinit' event so endpoints that can be reset via PERST# (qcom,
tegra194) can notify EPF drivers when this happens (Manivannan
Sadhasivam)
- Make pci_epc_class constant (Greg Kroah-Hartman)
- Fix vpci_scan_bus() error checking to print error for failure (not
success) and clean up after failure (Dan Carpenter)
- Fix epf_ntb_epc_cleanup() error handling to clean up scratchpad BARs and
clean up in mirror order of allocation (Dan Carpenter)
- Add rk3588, which requires 64KB BAR alignment, to pci_endpoint_test
(Niklas Cassel)
- Use memcpy_toio()/memcpy_fromio() for endpoint BAR tests to improve
performance (Niklas Cassel)
- Set DMA mask to 48 bits always to simplify endpoint test, since there's
there's no need to check for error or to fallback to 32 bits (Frank Li)
- Suggest using programmable Vendor/Device ID (when supported) to use
pci_endpoint_test without having to add new entries (Yoshihiro Shimoda)
- Remove unused pci_endpoint_test_bar_{readl,writel}() (Jiapeng Chong)
- Remove 'linkup' and add 'add_cfs' to the endpoint function driver 'ops'
documentation to match the code (Alexander Stein)
-
* pci/endpoint:
Documentation: PCI: pci-endpoint: Fix EPF ops list
misc: pci_endpoint_test: Remove unused pci_endpoint_test_bar_{readl,writel} functions
misc: pci_endpoint_test: Document policy about adding pci_device_id
misc: pci_endpoint_test: Refactor dma_set_mask_and_coherent() logic
misc: pci_endpoint_test: Use memcpy_toio()/memcpy_fromio() for BAR tests
misc: pci_endpoint_test: Add support for Rockchip rk3588
PCI: endpoint: Fix error handling in epf_ntb_epc_cleanup()
PCI: endpoint: Clean up error handling in vpci_scan_bus()
PCI: endpoint: Make pci_epc_class struct constant
PCI: endpoint: Introduce 'epc_deinit' event and notify the EPF drivers
PCI: endpoint: pci-epf-test: Handle Link Down event
PCI: endpoint: pci-epf-{mhi/test}: Move DMA initialization to EPC init callback
PCI: endpoint: pci-epf-test: Refactor pci_epf_test_unbind() function
PCI: endpoint: Rename BME to Bus Master Enable
PCI: endpoint: Rename core_init() callback in 'struct pci_epc_event_ops' to epc_init()
PCI: endpoint: pci-epf-test: Use 'msix_capable' flag directly in pci_epf_test_alloc_space()
PCI: endpoint: pci-epf-test: Make use of cached 'epc_features' in pci_epf_test_core_init()
PCI: endpoint: Remove unused field in struct pci_epf_group
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The LS7A chipset can be used as part of a PCIe Root Complex with
Loongson-3C6000 and similar CPUs. In this case, DEV_LS7A_PCIE_PORT5 has a
PCI_CLASS_BRIDGE_HOST class code, and it is a Type 0 Function whose config
space provides access to Root Complex registers.
The DEV_LS7A_PCIE_PORT5 has an MSI Capability, and its MSI Enable bit must
be set before other devices below the Root Complex can use MSI. This is
not the standard PCI behavior of MSI Enable, so the normal PCI MSI code
does not set it.
Set the DEV_LS7A_PCIE_PORT5 MSI Enable bit via a quirk so other devices
below the Root Complex can use MSI.
[kwilczynski: exit early to reduce indentation; commit log]
Link: https://lore.kernel.org/linux-pci/20240612065315.2048110-1-chenhuacai@loongson.cn
Signed-off-by: Sheng Wu <wusheng@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: stable@vger.kernel.org
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The vmd driver creates a "domain" symlink in sysfs for each VMD bridge.
Previously this symlink was created after pci_bus_add_devices() added
devices below the VMD bridge and emitted udev events to announce them to
userspace.
This led to a race between userspace consumers of the udev events and the
kernel creation of the symlink. One such consumer is mdadm, which
assembles block devices into a RAID array, and for devices below a VMD
bridge, mdadm depends on the "domain" symlink.
If mdadm loses the race, it may be unable to assemble a RAID array, which
may cause a boot failure or other issues, with complaints like this:
(udev-worker)[2149]: nvme1n1: '/sbin/mdadm -I /dev/nvme1n1'(err) 'mdadm: Unable to get real path for '/sys/bus/pci/drivers/vmd/0000:c7:00.5/domain/device''
(udev-worker)[2149]: nvme1n1: '/sbin/mdadm -I /dev/nvme1n1'(err) 'mdadm: /dev/nvme1n1 is not attached to Intel(R) RAID controller.'
(udev-worker)[2149]: nvme1n1: '/sbin/mdadm -I /dev/nvme1n1'(err) 'mdadm: No OROM/EFI properties for /dev/nvme1n1'
(udev-worker)[2149]: nvme1n1: '/sbin/mdadm -I /dev/nvme1n1'(err) 'mdadm: no RAID superblock on /dev/nvme1n1.'
(udev-worker)[2149]: nvme1n1: Process '/sbin/mdadm -I /dev/nvme1n1' failed with exit code 1.
This symptom prevents the OS from booting successfully.
After a NVMe disk is probed/added by the nvme driver, udevd invokes mdadm
to detect if there is a mdraid associated with this NVMe disk, and mdadm
determines if a NVMe device is connected to a particular VMD domain by
checking the "domain" symlink. For example:
Thread A Thread B Thread mdadm
vmd_enable_domain
pci_bus_add_devices
__driver_probe_device
...
work_on_cpu
schedule_work_on
: wakeup Thread B
nvme_probe
: wakeup scan_work
to scan nvme disk
and add nvme disk
then wakeup udevd
: udevd executes
mdadm command
flush_work main
: wait for nvme_probe done ...
__driver_probe_device find_driver_devices
: probe next nvme device : 1) Detect domain symlink
... 2) Find domain symlink
... from vmd sysfs
... 3) Domain symlink not
... created yet; failed
sysfs_create_link
: create domain symlink
Create the VMD "domain" symlink before invoking pci_bus_add_devices() to
avoid this race.
Suggested-by: Adrian Huang <ahuang12@lenovo.com>
Link: https://lore.kernel.org/linux-pci/20240605124844.24293-1-sjiwei@163.com
Signed-off-by: Jiwei Sun <sunjw10@lenovo.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Nirmal Patel <nirmal.patel@linux.intel.com>
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