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path: root/drivers/net/wireless/ath/ath9k/ar9003_phy.c
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2022-12-22wifi: ath9k: remove most hidden macro dependencies on ahWenli Looi
Adds an explicit _ah parameter to most macros that previously had a hidden dependency on ah. This makes the code more compliant with the style guide. This change does not appear to affect the final binary. Signed-off-by: Wenli Looi <wlooi@ucalgary.ca> Acked-by: Toke Høiland-Jørgensen <toke@toke.dk> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/c8369317-cf84-f0e3-fe8-9b6e22e43a6a@ucalgary.ca
2022-09-22wifi: ath9k: fix repeated the words in a commentJilin Yuan
Delete the redundant word 'the'. Signed-off-by: Jilin Yuan <yuanjilin@cdjrlc.com> Acked-by: Toke Høiland-Jørgensen <toke@toke.dk> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/20220915030859.45384-1-yuanjilin@cdjrlc.com
2022-03-25ath9k: refactor ar9003_hw_spur_mitigate_ofdmWenli Looi
Similar to ar9003_hw_spur_mitigate_mrc_cck, simplify the code by using ar9003_get_spur_chan_ptr. This may also be required for QCN550x support, to provide an abstraction over the underlying EEPROM format. Signed-off-by: Wenli Looi <wlooi@ucalgary.ca> Acked-by: Toke Høiland-Jørgensen <toke@toke.dk> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/20220320233010.123106-6-wlooi@ucalgary.ca
2019-04-29ath9k: drop redundant code in ar9003_hw_set_channelTomislav Požega
AR9330, AR9485, AR9531, AR9550, AR9561 and AR9565 all use same channel set register configuration which allows for small code size reduction. Signed-off-by: Tomislav Požega <pozega.tomislav@gmail.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2018-07-31ath9k_hw: set spectral scan enable bit on trigger for AR9003+Felix Fietkau
AR9002 code and the QCA AR9003+ reference code do the same. Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2017-06-28ath9k: fix tx99 bus errorMiaoqing Pan
The hard coded register 0x9864 and 0x9924 are invalid for ar9300 chips. Cc: <stable@vger.kernel.org> Signed-off-by: Miaoqing Pan <miaoqing@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-05-09ath9k: Fix symbol overlap window for half/quarter channelsHelmut Schaa
Since commit cd6cfd7311a385144a2f9c74f692ae2df3ae033f "ath9k: do not set half/quarter channel flags in AR_PHY_MODE" the condition "rfMode & (AR_PHY_MODE_QUARTER | AR_PHY_MODE_HALF)" would never evaluate to true. Fix this by using the available IS_CHAN_HALF_RATE and IS_CHAN_QUARTER_RATE marcros instead. Signed-off-by: Helmut Schaa <helmut.schaa@googlemail.com> Cc: Felix Fietkau <nbd@openwrt.org> Acked-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-05-09ath9k: Simplify ar9003_hw_tx99_set_txpowerHelmut Schaa
There's no need to keep the same for loop twice in the code. Move the txpower cap before the loop to reduce code complexity. Signed-off-by: Helmut Schaa <helmut.schaa@googlemail.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-05-09ath9k: reuse ar9003_hw_tx_power_regwrite for tx99 setupHelmut Schaa
The same functionality as ar9003_hw_tx_power_regwrite is hardcoded in ar9003_hw_tx99_set_txpower. Just reuse the existing ar9003_hw_tx_power_regwrite for TX99 setup too. Signed-off-by: Helmut Schaa <helmut.schaa@googlemail.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-03-11ath9k: fix a misleading indentationBob Copeland
These lines belong inside the if-statement above, not in the main body of the switch. Found by smatch. Signed-off-by: Bob Copeland <me@bobcopeland.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-03-03ath9k: clear bb filter calibration power thresholdMiaoqing Pan
JP WiFi certification for bandwidth of channel 14 failed, the OBW is lower than the requirement. Clear the bb filter calibration power threshold to increase OBW(+2). The fix only for qca9531 chip now. Signed-off-by: Miaoqing Pan <miaoqing@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2016-01-26ath9k: do not reset while BB panic(0x4000409) on ar9561Miaoqing Pan
BB panic(0x4000409) observed while AP enabling/disabling bursting. Signed-off-by: Miaoqing Pan <miaoqing@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-10-14ath9k: fix QCA9561 XLNA rxgain initialMiaoqing Pan
A small bugfix for commit ede6a5e7b859 ("ath9k: Add QCA956x HW support"). I guess I would have skipped renaming (that initial QCA956x commit has been there already for almost a year with the "5g" in the name) and move the call outside AR_SREV_9462_20_OR_LATER() to make it reachable. Signed-off-by: Miaoqing Pan <miaoqing@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2015-10-14ath9k: rename ini_modes_rxgain_5g_xlna to ini_modes_rxgain_xlnaMiaoqing Pan
rename the variable as preparation for using the array with 2.4 GHz band, etc. Signed-off-by: Miaoqing Pan <miaoqing@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2015-01-15ath9k: Add QCA956x HW supportMiaoqing Pan
Signed-off-by: Miaoqing Pan <miaoqing@qca.qualcomm.com> Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2014-11-25ath9k: add TX power per-rate tablesLorenzo Bianconi
Add TX power per-rate tables for different MIMO modes (e.g STBC) in order to cap the maximum TX power value per-rate in the TX descriptor path. Cap TX power for self generated frames (ACK, RTS/CTS). Currently TPC is supported just by AR9003 based chips Signed-off-by: Lorenzo Bianconi <lorenzo.bianconi83@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-11-19Merge commit '4e6ce4dc7ce71d0886908d55129d5d6482a27ff9' of ↵John W. Linville
git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless
2014-11-11ath9k: Fix RTC_DERIVED_CLK usageMiaoqing Pan
Based on the reference clock, which could be 25MHz or 40MHz, AR_RTC_DERIVED_CLK is programmed differently for AR9340 and AR9550. But, when a chip reset is done, processing the initvals sets the register back to the default value. Fix this by moving the code in ath9k_hw_init_pll() to ar9003_hw_override_ini(). Also, do this override for AR9531. Cc: stable@vger.kernel.org Signed-off-by: Miaoqing Pan <miaoqing@qca.qualcomm.com> Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-10-30ath9k: set pulse_rssi threshold to 15Lorenzo Bianconi
Reduce pulse_rssi threshold to 15 in order to improve radar pattern detection probability on ext channel Signed-off-by: Lorenzo Bianconi <lorenzo.bianconi83@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-10-27ath9k: do not overwrite AR_PHY_RADAR_1 MSBLorenzo Bianconi
Do not overwrite AR_PHY_RADAR_1 most significant byte default value Signed-off-by: Lorenzo Bianconi <lorenzo.bianconi83@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-09-30ath9k_hw: fix PLL clock initialization for newer SoCFelix Fietkau
On AR934x and newer SoC devices, the layout of the AR_RTC_PLL_CONTROL register changed. This currently breaks at least 5/10 MHz operation. AR933x uses the old layout. It might also have been causing other stability issues because of the different location of the PLL_BYPASS bit which needs to be set during PLL clock initialization. This patch also removes more instances of hardcoded register values in favor of properly computed ones with the PLL_BYPASS bit added. Reported-by: Lorenzo Bianconi <lorenzo.bianconi83@gmail.com> Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-06-25ath9k_hw: fix tx gain table index for AR953xRajkumar Manoharan
Fix tx gain table index on fast channel change for AR953x. Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-02-24ath9k: do not set half/quarter channel flags in AR_PHY_MODEFelix Fietkau
5/10 MHz channel bandwidth is configured via the PLL clock, instead of the AR_PHY_MODE register. Using that register is AR93xx specific, and makes the mode incompatible with earlier chipsets. In some early versions, these flags were apparently applied at the wrong point in time and thus did not cause connectivity issues, however now they are causing problems, as pointed out in this OpenWrt ticket: https://dev.openwrt.org/ticket/14916 Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-01-03ath9k: Add hardware support for QCA9531Sujith Manoharan
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-01-03ath9k: Identify baseband watchdog signaturesSujith Manoharan
A full HW reset is not required for all baseband watchdog signatures. Some BB watchdog updates are benign and can be discarded, some require re-programming of certain registers and others require a chip reset. This patch adds a routine to identify such signatures. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-01-03ath9k: Fix PHY restart workaroundSujith Manoharan
The PHY restart workaround that handles baseband hangs for packets with unsupported rates is required only for a HW bug in AR9300 v2.2. All the subsequent chips in the AR9003 family do not require this driver fix since it has been addressed in the HW. Since the value of the AR_PHY_RESTART register is written with the default initvals, make sure that PHY restart is always disabled once this particular BB hang signaure has been encountered. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-12-09ath9k: Initialize baseband for DFS channelsSujith Manoharan
Certain baseband registers require different values to be programmed when operating in a DFS channel to ensure that radar detection works correctly. This is required for AR9300, AR9340 and AR9580. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-12-02ath9k: Fix Carrier Leak calibration for SoC chipsSujith Manoharan
CL calibration is applicable for all chips and the enable/disable knob comes via the INI file. For PCOEM chips, the calibration data is reused when Fast Channel Change is used. Caldata reuse is not enabled for SoC chips, so remove the CL post processing code. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-11-15ath9k: Fix issue with MCS15Sujith Manoharan
On some boards which are based on AR9300, AR9580 or AR9550, MCS15 usage is problematic. This is because these boards use a "frequency doubler", which doubles the refclk to get better EVM, but causes spurs. Handle this properly in the driver to recover throughput. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-10-18ath9k: add TX99 supportLuis R. Rodriguez
TX99 support enables Specific Absorption Rate (SAR) testing. SAR is the unit of measurement for the amount of radio frequency(RF) absorbed by the body when using a wireless device. The RF exposure limits used are expressed in the terms of SAR, which is a measure of the electric and magnetic field strength and power density for transmitters operating at frequencies from 300 kHz to 100 GHz. Regulatory bodies around the world require that wireless device be evaluated to meet the RF exposure limits set forth in the governmental SAR regulations. In the examples below, for more bit rate options see the iw TX bitrate setting documentation: http://wireless.kernel.org/en/users/Documentation/iw#Modifying_transmit_bitrates Example usage: iw phy phy0 interface add moni0 type monitor ip link set dev moni0 up iw dev moni0 set channel 36 HT40+ iw set bitrates mcs-5 4 echo 10 > /sys/kernel/debug/ieee80211/phy0/ath9k/tx99_power echo 1 > /sys/kernel/debug/ieee80211/phy0/ath9k/tx99 Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: Luis R. Rodriguez <mcgrof@do-not-panic.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-10-14ath9k_hw: remove references to hw->confFelix Fietkau
Accessing it to get the current operating channel is racy and in the way of further channel handling related changes Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-10-14ath9k_hw: remove IS_CHAN_B()Felix Fietkau
Hardware 802.11b-only mode isn't supported by the driver (the device is configured for 802.11n/g instead). Simplify the code by removing checks for it. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-10-14ath9k_hw: remove direct accesses to channel mode flagsFelix Fietkau
Use wrappers where available. Simplifies code and helps with further improvements to the channel data structure Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-09-26ath9k: Remove incorrect diversity initializationSujith Manoharan
Fast antenna diversity is required only for single chain chips and the diversity initialization is done in the per-family board setup routines. Enabling of diversity should be done based on the calibrated EEPROM/OTP data, doing it for all chips is incorrect. Remove the code that sets the fast_div bit for all cards, since the documentation for the AR_PHY_CCK_DETECT register says: reg 642: sig_detect_cck enable_ant_fast_div : Only used for single chain chips. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-09-26ath9k: Fix issue with parsing malformed CFP IESujith Manoharan
All QCA chips have the ability to parse the CF Parameter Set IE in beacons. If the IE is malformed in the beacons from some APs [1], the HW locks up. In AP mode, a beacon stuck would happen and in client mode, a disconnection usually is the result. To fix this issue, set the AR_PCU_MISC_MODE2_CFP_IGNORE to ignore the CFP IE in beacons - this is applicable for all chips. For AP mode, if this issue happens, the NAV is also corrupted and has to be reset - this will be done in a subsequent patch. [1] : http://msujith.org/ath9k/cfp/Malformed-CF-Param.png Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-09-26ath9k: Add support for AR9565 v1.0.1 LNA diversitySujith Manoharan
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-09-26ath9k: Fix antenna diversity init for AR9565Sujith Manoharan
Program the HW registers (AR_PHY_CCK_DETECT, AR_PHY_MC_GAIN_CTRL) with the correct values for AR9565 to allow LNA combining. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-08-28ath9k: Remove unused ANI commandsSujith Manoharan
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-08-22ath9k: Add support for AR9485 1.2Sujith Manoharan
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-08-15ath9k: avoid accessing MRC registers on single-chain devicesFelix Fietkau
They are not implemented, and accessing them might trigger errors Cc: stable@vger.kernel.org Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-08-09ath9k: Fix build failureSujith Manoharan
Make sure that CONFIG_ATH9K_BTCOEX_SUPPORT is used for the WLAN/BT RX diversity hooks. Reported by the kernel build testing backend. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-08-05ath9k: Support ANT diversity for WB225Sujith Manoharan
WB225 based cards like CUS198 and CUS230 support both fast antenna diversity and LNA combining. Add support for this and also program the SWCOM register with the correct "ant_ctrl_comm2g_switch_enable" value. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-08-05ath9k: Remove "shared_chain_lnadiv"Sujith Manoharan
This variable is redundant since we can use common->bt_ant_diversity to determine if diversity has to be enabled/disabled. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-08-05ath9k: Rename ath9k_hw_antctrl_shared_chain_lnadivSujith Manoharan
Use "ath9k_hw_set_bt_ant_diversity" instead. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-07-24ath9k: Fix diversity combining for AR9285Sujith Manoharan
When antenna diversity combining is enabled in the EEPROM, the initial values for the MAIN/ALT config have to be programmed correctly. This patch adds it for AR9285. Since the diversity combining macros are common to all chip families, remove the redundant AR9285 macros and move the definitions to phy.h. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-07-22ath9k: Program correct initvals for FCCSujith Manoharan
* CUS217 specific initvals have to be programmed. * iniAdditional is not used for AR9462/AR9565, remove it. * Handle channel 2484 for regulatory compliance. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-07-22ath9k: Move INI overrides to ar9003_hw_override_iniSujith Manoharan
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-06-24ath9k: Add support for AR9462 2.1Sujith Manoharan
Various parts of the HW code are applicable for both v2.0 and v2.1. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-06-18ath9k: Program initvals for CUS217Sujith Manoharan
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-06-18ath9k: Add support for 5G-XLNA/AR9462Sujith Manoharan
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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