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path: root/drivers/net/wireless/ath/ath11k/hw.h
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2021-10-11ath11k: Change number of TCL rings to one for QCA6390Baochen Qiang
Some targets, QCA6390 for example, use only one TCL ring, it is better to initialize only one ring and leave others untouched for such targets. This is a theoretical fix found during code review, no visible impact. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Signed-off-by: Baochen Qiang <bqiang@codeaurora.org> Signed-off-by: Jouni Malinen <jouni@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20210914163726.38604-1-jouni@codeaurora.org
2021-09-28ath11k: Add support for RX decapsulation offloadSriram R
Add support for rx decapsulation offload by advertising the support to mac80211 during registration. Also ensure the frames have the RX_FLAG_8023 flag set in decap offload frames before passing to mac80211. Since the packets delivered to the driver are in 802.3 format, these can be sent to the network core with minimal processing in mac80211. This helps in releasing some CPU cycles in the host processor and thereby improving the performance. Two exceptions are made before passing decap frames, one is for EAPOL packets since mac80211 8023 fast rx for the sta is set only after authorization, other case is for multicast packets to validate PN in mac80211. In both the cases the decap frames are converted to 80211 frame and sent to mac80211. Ethernet decap can be enabled by using frame_mode modparam: insmod ath11k frame_mode=2 Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.5.0.1-00844-QCAHKSWPL_SILICONZ-1 v2 Co-developed-by: Manikanta Pubbisetty <mpubbise@codeaurora.org> Signed-off-by: Manikanta Pubbisetty <mpubbise@codeaurora.org> Signed-off-by: Sriram R <srirrama@codeaurora.org> Signed-off-by: Jouni Malinen <jouni@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20210721204217.120572-1-jouni@codeaurora.org
2021-09-28ath11k: use hw_params to access board_size and cal_offsetAnilkumar Kolli
Reuse board_size from hw_params, add cal_offset to hw params. This patch is clean up only, there is no change in functionality. cal_size was unused, so remove that. Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00009-QCAHKSWPL_SILICONZ-1 Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.4.0.1-01838-QCAHKSWPL_SILICONZ-1 Signed-off-by: Anilkumar Kolli <akolli@codeaurora.org> Signed-off-by: Jouni Malinen <jouni@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20210721201927.100369-2-jouni@codeaurora.org
2021-09-28ath11k: Introduce spectral hw configurable paramKarthikeyan Periyasamy
Below parameters have been identified as configurable across the platforms. So to scale the spectral across the platforms, move these parameter into hw param. 1. Maximum FFT bins 2. Summary report pad size 3. FFT report header length Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-01492-QCAHKSWPL_SILICONZ-1 Tested-on: IPQ6018 hw1.0 AHB WLAN.HK.2.4.0.1-00330-QCAHKSWPL_SILICONZ-1 Signed-off-by: Karthikeyan Periyasamy <periyasa@codeaurora.org> Signed-off-by: Jouni Malinen <jouni@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20210721180809.90960-3-jouni@codeaurora.org
2021-09-28ath11k: Refactor spectral FFT bin sizeKarthikeyan Periyasamy
In IPQ8074, actual FFT bin size is two bytes but hardware reports it with extra pad size of two bytes for each FFT bin. So finally each FFT bin advertise as four bytes size in the collected data. This FFT pad is not advertised in IPQ6018 platform. To accommodate this different behavior across the platforms, introduce the hw param fft_pad_sz and use it in spectral process. Also group all the spectral params under the new structure in hw param structure for scalable in future. Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-01492-QCAHKSWPL_SILICONZ-1 Tested-on: IPQ6018 hw1.0 AHB WLAN.HK.2.4.0.1-00330-QCAHKSWPL_SILICONZ-1 Signed-off-by: Karthikeyan Periyasamy <periyasa@codeaurora.org> Signed-off-by: Jouni Malinen <jouni@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20210721180809.90960-2-jouni@codeaurora.org
2021-06-12ath11k: don't call ath11k_pci_set_l1ss for WCN6855Baochen Qiang
For QCA6390, one PCI related clock drifts sometimes, and it makes PCI link difficult to quit L1ss. Current implementation fixed this by configuring some related regs using ath11k_pci_fix_l1ss. WCN6855 does not have this clock drift problem, so no need to set these regs. Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1 Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Signed-off-by: Baochen Qiang <bqiang@codeaurora.org> Signed-off-by: Jouni Malinen <jouni@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20210511162214.29475-8-jouni@codeaurora.org
2021-06-12ath11k: add support to get peer id for WCN6855Baochen Qiang
For WCN6855, the layout of hal rx mpdu info is different, so need to handle this target differently when getting peer id. Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1 Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Signed-off-by: Baochen Qiang <bqiang@codeaurora.org> Signed-off-by: Jouni Malinen <jouni@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20210511162214.29475-6-jouni@codeaurora.org
2021-06-12ath11k: setup REO for WCN6855Baochen Qiang
WCN6855 needs a different reo configuration, so add separate handling for this target in ath11k_hw_ops. Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1 Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Signed-off-by: Baochen Qiang <bqiang@codeaurora.org> Signed-off-by: Jouni Malinen <jouni@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20210511162214.29475-4-jouni@codeaurora.org
2021-06-12ath11k: add dp support for WCN6855Baochen Qiang
hal rx descriptor is different for WCN6855 and there are such a lot of handlers processing this descriptor in data path. So add separate handling for this target. Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1 Signed-off-by: Baochen Qiang <bqiang@codeaurora.org> Signed-off-by: Jouni Malinen <jouni@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20210511162214.29475-3-jouni@codeaurora.org
2021-06-12ath11k: add hw reg support for WCN6855Baochen Qiang
Reg address of WCN6855 is different from other devices, so add separate reg definition for this target. Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1 Signed-off-by: Govind Singh <govinds@codeaurora.org> Signed-off-by: Baochen Qiang <bqiang@codeaurora.org> Signed-off-by: Jouni Malinen <jouni@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20210511162214.29475-2-jouni@codeaurora.org
2021-02-17ath11k: add extended interrupt support for QCN9074Karthikeyan Periyasamy
Update the specific hw ring mask for QCN9074. Update the timestamp information while processing DP and CE interrupts. Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.4.0.1.r2-00012-QCAHKSWPL_SILICONZ-1 Signed-off-by: Karthikeyan Periyasamy <periyasa@codeaurora.org> Signed-off-by: Anilkumar Kolli <akolli@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1612946530-28504-11-git-send-email-akolli@codeaurora.org
2021-02-17ath11k: add data path support for QCN9074Karthikeyan Periyasamy
hal rx descriptor is different for QCN9074 target type. since rx_msdu_end, rx_msdu_start, rx_mpdu_start elements are in different placement/alignment. In order to have generic data path, introduce platform specific hal rx descriptor access ops in ath11k_hw_ops. Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.4.0.1.r2-00012-QCAHKSWPL_SILICONZ-1 Signed-off-by: Karthikeyan Periyasamy <periyasa@codeaurora.org> Signed-off-by: Anilkumar Kolli <akolli@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1612946530-28504-9-git-send-email-akolli@codeaurora.org
2021-02-17ath11k: add hal support for QCN9074Karthikeyan Periyasamy
Define the hal ring address and ring meta descriptor mask for QCN9074. Move the platform specific address to the ath11k_hw_regs. Define tx_mesh_enable ops in ath11k_hw_ops since its accessing platform specific TCL descriptor. Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.4.0.1.r2-00012-QCAHKSWPL_SILICONZ-1 Signed-off-by: Karthikeyan Periyasamy <periyasa@codeaurora.org> Signed-off-by: Anilkumar Kolli <akolli@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1612946530-28504-8-git-send-email-akolli@codeaurora.org
2021-02-17ath11k: Move qmi service_ins_id to hw_paramsAnilkumar Kolli
qmi service_ins_id is unique for QCA6390 and QCN9074, this is needed for adding QCN9074 support. No functional changes. Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.4.0.1.r2-00012-QCAHKSWPL_SILICONZ-1 Signed-off-by: Anilkumar Kolli <akolli@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1612946530-28504-3-git-send-email-akolli@codeaurora.org
2020-12-12ath11k: implement suspend for QCA6390 PCI devicesCarl Huang
Now that all the needed pieces are in place implement suspend support QCA6390 PCI devices. All other devices will return -EOPNOTSUPP during suspend. The suspend is implemented by switching the firmware to WoW mode during suspend, so the firmware will be running on low power mode while host is in suspend. At the moment we are not able to shutdown and fully power off the device due to bugs in MHI subsystem, so WoW mode is a workaround for the time being. During suspend we enable WoW mode, disable CE irq and DP irq, then put MHI to suspend state. During resume, driver resumes MHI firstly, then enables CE irq and dp IRQ, and sends WoW wakeup command to firmware. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Signed-off-by: Carl Huang <cjhuang@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1607708150-21066-11-git-send-email-kvalo@codeaurora.org
2020-12-12ath11k: put hw to DBS using WMI_PDEV_SET_HW_MODE_CMDIDCarl Huang
It's recommended to use wmi command WMI_PDEV_SET_HW_MODE_CMDID to put hardware to dbs mode instead of wmi_init command. This fixes a few strange stability issues. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Signed-off-by: Carl Huang <cjhuang@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1607609124-17250-3-git-send-email-kvalo@codeaurora.org
2020-11-07ath11k: cold boot calibration supportGovindaraj Saminathan
cold boot calibration is the process to calibrate all the channels during the boot-up to avoid the calibration delay during the channel change. During the boot-up, firmware started in cold boot calibration mode Firmware calibrate all channels and generate CalDb(DDR). Subsequent wifi bringup will reuse the same CalDb. Firmware is restarted in normal mode to continue the normal operation. caldb memory address send to firmware through the QMI message.Firmware use this address to store the caldb data and use it until next reboot. This will give the improvement during the channel change. But it is increasing the boot-up time(up to 15sec depend on number of radios). So if the user want to reduce the boot-up time and accepting for channel change delay, user can disable this feature using the module param cold_boot_cal=0. Tested-on: IPQ8074 WLAN.HK.2.4.0.1-01162-QCAHKSWPL_SILICONZ-1 Signed-off-by: Govindaraj Saminathan <gsamin@codeaurora.org> Co-developed-by: Sowmiya Sree Elavalagan <ssreeela@codeaurora.org> Signed-off-by: Sowmiya Sree Elavalagan <ssreeela@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1602862111-14063-1-git-send-email-ssreeela@codeaurora.org
2020-10-01ath11k: enable idle power save modeCarl Huang
Host sends wmi command to allow hardware enter idle power save mode in ath11k_mac_op_start function. hw parameter idle_ps indicates whether idle power save is supported. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Signed-off-by: Carl Huang <cjhuang@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1601544890-13450-8-git-send-email-kvalo@codeaurora.org
2020-10-01ath11k: enable shadow register configuration and accessCarl Huang
To enable shadow register access, host needs to pass shadow register configuration to firmware via qmi message. Host also needs to update ring's HP or TP address to shadow register address. The write operation to shadow register will be forwarded to target register by hardware automatically, and the write operation to shadow register is permitted even when the target is in power save or sleep mode. Update the shadow config whenever power up happens. This feature is controlled by hw parameter supports_shadow_regs which is only enabled for QCA6390. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Signed-off-by: Carl Huang <cjhuang@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1601544890-13450-3-git-send-email-kvalo@codeaurora.org
2020-10-01ath11k: disable monitor mode on QCA6390Kalle Valo
QCA6390 does not support monitor mode at the moment so disable it altogether, using a hack as mac80211 does not support disabling it otherwise. Add a boolean to hw_params to know if hardware supports monitor mode. IPQ8074 continues to support monitor mode normally. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1601399736-3210-6-git-send-email-kvalo@codeaurora.org
2020-10-01ath11k: add interface_modes to hw_paramsKalle Valo
As QCA6390 does not support mesh interfaces, move the interface_modes to hw_params. Also create interface combinations dynamically so that it's easy to change the values. Now QCA6390 does not claim to support mesh interfaces to user space, but IPQ8074 continues to do that. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1601399736-3210-4-git-send-email-kvalo@codeaurora.org
2020-09-22ath11k: Add support spectral scan for IPQ6018Karthikeyan Periyasamy
IPQ6018 supported with 4 bytes FFT BIN size. so supported 4 bytes parsing logic in FFT report process. since spectral_fft_sz is configured as zero in hw_params, spectral is not supported in QCA6390 platform. Tested-on: IPQ6018 WLAN.HK.2.1.0.1-01228-QCAHKSWPL_SILICONZ-1 Signed-off-by: Karthikeyan Periyasamy <periyasa@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1600236776-4042-1-git-send-email-periyasa@codeaurora.org
2020-09-11ath11k: move target ce configs to hw_paramsAnilkumar Kolli
Move target CE config and target CE service config to hw_params. No functional changes. Tested on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00009-QCAHKSWPL_SILICONZ-1 Signed-off-by: Anilkumar Kolli <akolli@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/010101746cb685d9-6bedeccb-29a1-4d32-8664-fcfe7d105f4a-000000@us-west-2.amazonses.com
2020-08-18ath11k: use TCL_DATA_RING_0 for QCA6390Carl Huang
For QCA6390, wbm2sw1 is used for other purpose rather than tx completion ring. So use TCL_DATA_RING 0 only for QCA6390. Add MISC_CAPS_TCL_0_ONLY to control it. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.1.0.1-01238-QCAHKSWPL_SILICONZ-2 Signed-off-by: Carl Huang <cjhuang@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1597555891-26112-9-git-send-email-kvalo@codeaurora.org
2020-08-18ath11k: assign correct search flag and type for QCA6390Carl Huang
QCA6390 doesn't enable V2 map and ummap event, so the addr search flags and type is different from IPQ8074. Assign correct search flags and type for QCA6390. Without this change, ping sometimes fails. With this change, now ping is always successful. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.1.0.1-01238-QCAHKSWPL_SILICONZ-2 Signed-off-by: Carl Huang <cjhuang@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1597555891-26112-7-git-send-email-kvalo@codeaurora.org
2020-08-18ath11k: delay vdev_start for QCA6390Carl Huang
For QCA6390 firmware, bss peer must be created before vdev_start, so delay vdev_start until bss peer is created. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.1.0.1-01238-QCAHKSWPL_SILICONZ-2 Signed-off-by: Carl Huang <cjhuang@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1597555891-26112-6-git-send-email-kvalo@codeaurora.org
2020-08-18ath11k: setup QCA6390 rings for both rxdmasCarl Huang
For QCA6390, only one pdev is created and this pdev manages both lmacs, thus both rxdmas. So host needs to initialize all rxdma related rings for one pdev. Another difference is for QCA6390, host fills rxbuf to firmware and firmware further fills the rxbuf to rxbuf ring for each rxdma. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.1.0.1-01238-QCAHKSWPL_SILICONZ-2 Signed-off-by: Carl Huang <cjhuang@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1597555891-26112-4-git-send-email-kvalo@codeaurora.org
2020-08-18ath11k: don't initialize rxdma1 related ringCarl Huang
For QCA6390, it has 2 lmacs and thus 2 rxdmas. However, each rxdma has rxdma0 only, and doesn't have rxdma1. So for QCA6390, don't initialize rxdma1 related rings such as rx_mon_buf_ring, rx_mon_dst_ring and rx_mon_desc_ring. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.1.0.1-01238-QCAHKSWPL_SILICONZ-2 Signed-off-by: Carl Huang <cjhuang@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1597555891-26112-3-git-send-email-kvalo@codeaurora.org
2020-08-18ath11k: enable DP interrupt setup for QCA6390Carl Huang
QCA6390 uses MSI interrupt, so need to configure msi_add and msi_data to dp srngs. As there are so many DP srngs, so need to group them. Each group shares one MSI interrupt. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.1.0.1-01238-QCAHKSWPL_SILICONZ-2 Signed-off-by: Carl Huang <cjhuang@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1597555891-26112-2-git-send-email-kvalo@codeaurora.org
2020-08-18ath11k: wmi: put hardware to DBS modeCarl Huang
For QCA6390, host puts hardware to Dual Band Simultaneous (DBS) mode by default so both 2G and 5G bands can be used. Otherwise only the 5G band can be used. QCA6390 doesn't provide band_to_mac configuration and firmware will do the band_to_mac map. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.1.0.1-01238-QCAHKSWPL_SILICONZ-2 Signed-off-by: Carl Huang <cjhuang@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1597576599-8857-12-git-send-email-kvalo@codeaurora.org
2020-08-18ath11k: initialize wmi config based on hw_paramsCarl Huang
QCA6390 has very different wmi config parameters compared to IPQ8074, so use different function to initialize wmi init config parameters. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.1.0.1-01238-QCAHKSWPL_SILICONZ-2 Signed-off-by: Carl Huang <cjhuang@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1597576599-8857-11-git-send-email-kvalo@codeaurora.org
2020-08-18ath11k: force single pdev only for QCA6390Carl Huang
For QCA6390, only one pdev is created and only one HW is registered to mac80211. This one pdev manages both 2G radio and 5G radio. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.1.0.1-01238-QCAHKSWPL_SILICONZ-2 Signed-off-by: Carl Huang <cjhuang@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1597576599-8857-10-git-send-email-kvalo@codeaurora.org
2020-08-18ath11k: ce: support different CE configurationsCarl Huang
QCA6390 uses only 9 Copy Engines while IPQ8074 may use 12, make it possible to change CE configuration dynamically via hw_params. The defines for host_ce_config_wlan and CE_COUNT are temporary solutions, they will be removed in the following patches to keep things simple. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.1.0.1-01238-QCAHKSWPL_SILICONZ-2 Signed-off-by: Carl Huang <cjhuang@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1597576599-8857-4-git-send-email-kvalo@codeaurora.org
2020-08-18ath11k: hal: create register values dynamicallyCarl Huang
QCA6390 has different register offset compared to IPQ8074, so need to attach the register offset dynamically based on hw_params. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.1.0.1-01238-QCAHKSWPL_SILICONZ-2 Signed-off-by: Carl Huang <cjhuang@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1597576599-8857-2-git-send-email-kvalo@codeaurora.org
2020-08-17ath11k: enable internal sleep clockCarl Huang
On x86 and other non-qcom platforms, host needs to explicitly tell the firmware to use the internal sleep clock. Some QCA6390 modules have OTP burnt with external sleep clock selected, and these modules can't work expectedly unless firmware selects internal sleep clock. Add a field to hw_params to support this difference. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.1.0.1-01238-QCAHKSWPL_SILICONZ-2 Signed-off-by: Carl Huang <cjhuang@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1597389030-13887-11-git-send-email-kvalo@codeaurora.org
2020-08-17ath11k: add support for m3 firmwareGovind Singh
PCI devices like QCA6390 have a separate firmware image for the m3 micro-controller. Add support to load the firmware using m3.bin file. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.1.0.1-01238-QCAHKSWPL_SILICONZ-2 Signed-off-by: Govind Singh <govinds@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1597389030-13887-2-git-send-email-kvalo@codeaurora.org
2020-08-17ath11k: register MHI controller device for QCA6390Govind Singh
Modem Host Interface (MHI) is a communication protocol to communicate with external Qualcomm modems and Wi-Fi chipsets over high speed peripheral buses. Even though MHI doesn’t dictate underlying physical layer, protocol and MHI stack is structured for PCI based devices. Register directly with MHI subsystem as a MHI device driver for firmware download to QCA6390. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.1.0.1-01238-QCAHKSWPL_SILICONZ-2 Signed-off-by: Govind Singh <govinds@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1597309466-19688-9-git-send-email-kvalo@codeaurora.org
2020-08-17ath11k: move ring mask definitions to hw_paramsKalle Valo
This is needed for splitting ahb and pci modules as they have different ring mask settings. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.1.0.1-01238-QCAHKSWPL_SILICONZ-2 Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1597309466-19688-4-git-send-email-kvalo@codeaurora.org
2020-08-17ath11k: add hw_params entry for QCA6390Carl Huang
Define own firmware directory and settings for QCA6390. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.1.0.1-01238-QCAHKSWPL_SILICONZ-2 Signed-off-by: Carl Huang <cjhuang@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1597309466-19688-3-git-send-email-kvalo@codeaurora.org
2020-06-23ath11k: don't use defines in hw_paramsKalle Valo
These defines are not used anywhere else so to avoid extra indirection add the values directly to hw_params. No functional changes. Compile tested only. Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1592316055-24958-12-git-send-email-kvalo@codeaurora.org
2020-06-23ath11k: don't use defines for hw specific firmware directoriesKalle Valo
The downside of using defines in struct ath11k_hw_params.fw.dir is that it's easy to get it wrong as the full path is not visible. So drop the use of defines and instead create the patch runtime using a static inline function ath11k_core_create_firmware_path(). Hopefully this reduces the chances of using incorrect firmware path. No functional changes. Compile tested only. Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1592316055-24958-8-git-send-email-kvalo@codeaurora.org
2020-06-23ath11k: Add bdf-addr in hw_paramsAnilkumar Kolli
bdf-addr is different for IPQ8074 and IPQ6018 so add it to hw_params. No functional changes. Compile tested only. Signed-off-by: Anilkumar Kolli <akolli@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1592316055-24958-6-git-send-email-kvalo@codeaurora.org
2020-06-23ath11k: add hw_ops for pdev id to hw_mac mappingAnilkumar Kolli
pdev_id to hw_mac is different for ipq8074 and ipq6018 Below table has the mapping pdev_id ipq8074 ipq6018 ------- ------- ------- 0 0 0 1 2 1 2 1 Not applicable No functional changes. Compile tested only. Signed-off-by: Anilkumar Kolli <akolli@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1592316055-24958-5-git-send-email-kvalo@codeaurora.org
2020-06-23ath11k: define max_radios in hw_paramsAnilkumar Kolli
IPQ6018 needs different value for max_radios so make it configurable via hw_params. No functional changes. Compile tested only. Signed-off-by: Anilkumar Kolli <akolli@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1592316055-24958-4-git-send-email-kvalo@codeaurora.org
2020-06-23ath11k: convert ath11k_hw_params to an arrayAnilkumar Kolli
Convert to ath11k_hw_params to an array to make it possible add new hardware in the future, for example IPQ6018 or QCA6390. No functional changes. Compile tested only. Signed-off-by: Anilkumar Kolli <akolli@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1592316055-24958-3-git-send-email-kvalo@codeaurora.org
2020-06-16ath11k: rename default board fileAnilkumar Kolli
Rename default BDF to make it consistent with board-2.bin naming. Signed-off-by: Anilkumar Kolli <akolli@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1591709581-18039-4-git-send-email-akolli@codeaurora.org
2020-06-16ath11k: update firmware files read pathAnilkumar Kolli
We need this so that all hardware versions can coexist and it's easier to manage everything then all hardware directories are under ath11k directory. Copy ath11k firmware files to /lib/firmware/ath11k/IPQ8074/hw2.0/ Signed-off-by: Anilkumar Kolli <akolli@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1591709581-18039-3-git-send-email-akolli@codeaurora.org
2020-05-11ath11k: Add drv private for bus opaque structGovind Singh
Add drv private opaque structure to have bus level structure for multibus support. Signed-off-by: Govind Singh <govinds@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20200506094400.4740-3-govinds@codeaurora.org
2020-05-06ath11k: Replace zero-length array with flexible-arrayGustavo A. R. Silva
The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] sizeof(flexible-array-member) triggers a warning because flexible array members have incomplete type[1]. There are some instances of code in which the sizeof operator is being incorrectly/erroneously applied to zero-length arrays and the result is zero. Such instances may be hiding some bugs. So, this work (flexible-array member conversions) will also help to get completely rid of those sorts of issues. This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20200504201224.GA32282@embeddedor
2020-03-17ath11k: set queue_len to 4096John Crispin
The driver currently does not use wake_txq_queue. This leads to the tx_queue_len being defaulted to 1000. Setting this parameter will change the queue_len to 4096 which is more fitting for HE. Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
generated by cgit v1.2.3 (git 2.39.1) at 2025-08-03 06:04:33 +0000