summaryrefslogtreecommitdiff
path: root/drivers/interconnect/qcom/osm-l3.c
AgeCommit message (Collapse)Author
2020-09-18Merge branch 'icc-syncstate' into icc-nextGeorgi Djakov
* icc-syncstate: interconnect: Add get_bw() callback interconnect: Add sync state support interconnect: qcom: Use icc_sync_state Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-18interconnect: qcom: Use icc_sync_stateGeorgi Djakov
Lowering the bandwidth on the bus might have negative consequences if it's done before all consumers had a chance to cast their vote. Now by default the framework sets the bandwidth to maximum during boot. We need to use the icc_sync_state callback to notify the framework when all consumers are probed and there is no need to keep the bandwidth set to maximum anymore. Link: https://lore.kernel.org/r/20200825170152.6434-4-georgi.djakov@linaro.org Reviewed-by: Saravana Kannan <saravanak@google.com> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-15interconnect: qcom: osm-l3: Mark more structures constStephen Boyd
These structures aren't modified at runtime. Mark them const so they get moved to read-only memory. We have to cast away const in one place when we store into the data member of struct icc_node. This is paired with a re-const of the data member when it is extracted in qcom_icc_set(). Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Evan Green <evgreen@chromium.org> Link: https://lore.kernel.org/r/20200914182112.513981-1-swboyd@chromium.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08interconnect: qcom: Add EPSS L3 support on SM8250Sibi Sankar
Add Epoch Subsystem (EPSS) L3 interconnect provider support on SM8250 SoCs. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200801123049.32398-6-sibis@codeaurora.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08interconnect: qcom: Lay the groundwork for adding EPSS supportSibi Sankar
Lay the groundwork for adding Epoch Subsystem (EPSS) L3 support on SM8250. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200801123049.32398-4-sibis@codeaurora.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08interconnect: qcom: Add OSM L3 support on SM8150Sibi Sankar
Add Operation State Manager (OSM) L3 interconnect provider support on SM8150 SoCs. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200801123049.32398-3-sibis@codeaurora.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-04-29interconnect: qcom: Move the static keyword to the front of declarationChenTao
Fix the following warning: Move the static keyword to the front of declaration of sdm845_icc_osm_l3 sdm845_aggre1_noc sc7180_icc_osm_l3 sdm845_aggre2_noc sdm845_config_noc sdm845_dc_noc sdm845_gladiator_noc sdm845_mem_noc sdm845_mmss_noc and sdm845_system_noc, resolve the following compiler warning that can be when building with warnings enabled (W=1): drivers/interconnect/qcom/osm-l3.c:81:1: warning: const static struct qcom_icc_desc sdm845_icc_osm_l3 = { drivers/interconnect/qcom/osm-l3.c:94:1: warning: const static struct qcom_icc_desc sc7180_icc_osm_l3 = { drivers/interconnect/qcom/sdm845.c:195:1: warning: const static struct qcom_icc_desc sdm845_aggre1_noc = { drivers/interconnect/qcom/sdm845.c:223:1: warning: const static struct qcom_icc_desc sdm845_aggre2_noc = { drivers/interconnect/qcom/sdm845.c:284:1: warning: const static struct qcom_icc_desc sdm845_config_noc = { drivers/interconnect/qcom/sdm845.c:300:1: warning: const static struct qcom_icc_desc sdm845_dc_noc = { drivers/interconnect/qcom/sdm845.c:318:1: warning: const static struct qcom_icc_desc sdm845_gladiator_noc = { drivers/interconnect/qcom/sdm845.c:353:1: warning: const static struct qcom_icc_desc sdm845_mem_noc = { drivers/interconnect/qcom/sdm845.c:387:1: warning: const static struct qcom_icc_desc sdm845_mmss_noc = { drivers/interconnect/qcom/sdm845.c:433:1: warning: const static struct qcom_icc_desc sdm845_system_noc = { Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: ChenTao <chentao107@huawei.com> Link: https://lore.kernel.org/r/20200423132142.45174-1-chentao107@huawei.com Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Link: https://lore.kernel.org/r/20200429101904.5771-2-georgi.djakov@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-03-03interconnect: qcom: Add OSM L3 support on SC7180Sibi Sankar
Add Operating State Manager (OSM) L3 interconnect provider support on SC7180 SoCs. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Evan Green <evgreen@chromium.org> Link: https://lore.kernel.org/r/20200227105632.15041-6-sibis@codeaurora.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-03-03interconnect: qcom: Add OSM L3 interconnect provider supportSibi Sankar
On some Qualcomm SoCs, Operating State Manager (OSM) controls the resources of scaling L3 caches. Add a driver to handle bandwidth requests to OSM L3 from CPU on SDM845 SoCs. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Evan Green <evgreen@chromium.org> Link: https://lore.kernel.org/r/20200227105632.15041-4-sibis@codeaurora.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>