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path: root/drivers/iio/adc/meson_saradc.c
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2017-06-20Merge 4.12-rc6 into staging-nextGreg Kroah-Hartman
We want the staging fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-06-11iio: adc: meson-saradc: fix potential crash in meson_sar_adc_clear_fifoMartin Blumenstingl
meson_sar_adc_clear_fifo passes a 0 as value-pointer to regmap_read(). In case of the meson-saradc driver this ends up in regmap_mmio_read(), where the value-pointer is de-referenced unconditionally to assign the value which was read. Fix this by passing an actual pointer, even though all we want to do is to discard the value. As a side-effect this fixes a sparse warning ("Using plain integer as NULL pointer") as reported by Paolo Cretaro. Fixes: 3adbf3427330 ("iio: adc: add a driver for the SAR ADC found in Amlogic Meson SoCs") Reported-by: Paolo Cretaro <paolocretaro@gmail.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-05-07iio: adc: meson-saradc: add Meson8b SoC compatibilityMartin Blumenstingl
Meson GX SoCs however use some magic bits to prevent simultaneous (= conflicting, because only consumer should use the FIFO buffer with the ADC results) usage by the Linux kernel and the bootloader (the BL30 bootloader uses the SAR ADC to read the CPU temperature). This patch changes guards all BL30 functionality so it is skipped on SoCs which don't have it. Since the hardware itself doesn't know whether BL30 is available the internal meson_sar_adc_data is extended so this information can be provided per of_device_id.data inside the driver. Additionally the clocks "adc_clk" and "adc_sel" are not provided by the clock-controller itself. "adc_sel" is not available at all. "adc_clk" is provided by the SAR ADC IP block itself on Meson8b (and earlier). This is already supported by the meson_saradc driver. Finally this introduces new of_device_ids for the Meson8 and Meson8b SoCs so the driver can be wired up in the corresponding DT. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-05-07iio: adc: meson-saradc: mark all meson_sar_adc_data static and constMartin Blumenstingl
These are only passed as of_device_id.data and never modified. Thus we can mark them as static const, just like the of_device_id instances where they are used. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-03-25iio: adc: meson-saradc: add calibrationHeiner Kallweit
This patch adds calibration for the Meson SAR ADC. Points 25% vref and 75% vref are used for calibration. It uses a simple linear calibration function: SCALE * val + BIAS Successfully tested on a Odroid C2. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-02-19iio: adc: meson-saradc: improve meson_sar_adc_read_raw_sampleHeiner Kallweit
After sampling there should always be only one value in the FIFO. This also applies to averaging mode as the averaging is done chip-internally. So we don't have to loop and let the driver complain if there's not exactly one value in the FIFO. If the value belongs to a different channel then don't silently swallow the value but complain. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-02-19iio: adc: meson-saradc: switch from polling to interrupt modeHeiner Kallweit
Switch from polling to interrupt mode. Successfully tested on a S905GXBB-based Odroid C2. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-01-28iio: adc: add a driver for the SAR ADC found in Amlogic Meson SoCsMartin Blumenstingl
This adds support for the SAR (Successive Approximation Register) ADC on the Amlogic Meson SoCs. The code is based on the public S805 (Meson8b) and S905 (GXBB) datasheets (see [0] and [1]), as well as by reading (various versions of) the vendor driver and by inspecting the registers on the vendor kernels of my testing-hardware. Currently the GXBB, GXL and GXM SoCs are supported. GXBB hardware has 10-bit ADC resolution, while GXL and GXM have 12-bit ADC resolution. The code was written to support older SoCs (Meson8 and Meson8b) as well, but due to lack of actual testing-hardware no of_device_id was added for these. Two "features" from the vendor driver are currently missing: - the vendor driver uses channel #7 for calibration (this improves the accuracy of the results - in my tests the results were less than 3% off without calibration compared to the vendor driver). Adding support for this should be easy, but is not required for most applications. - channel #6 is connected to the SoCs internal temperature sensor. Adding support for this is probably not so easy since (based on the u-boot sources) most SoC versions are using different registers and algorithms for the conversion from "ADC value" to temperature. Supported by the hardware but currently not supported by the driver: - reading multiple channels at the same time (the hardware has a FIFO buffer which stores multiple results) - continuous sampling (this would require a way to enable this individually because otherwise the ADC would be drawing power constantly) - interrupt support (similar to the vendor driver this new driver is polling the results. It is unclear if the IRQ-mode is supported on older (Meson6 or Meson8) hardware as well or if there are any errata) [0] http://dn.odroid.com/S805/Datasheet/S805_Datasheet%20V0.8%2020150126.pdf [1] http://dn.odroid.com/S905/DataSheet/S905_Public_Datasheet_V1.1.4.pdf Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>