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2020-11-02drm/amd/display: Blank HUBP during pixel data blank for DCN30 v2Joshua Aberback
[Why] Prior commit "Blank HUBP during pixel data blank for DCN30" missed the call to set_disp_pattern_generator from set_crtc_test_pattern, which re-exposed the issue for which we initially blocked active-only p-state switching. [How] - remove dcn30_blank_pixel_data, set dcn30 back to dcn20 version - new hwss funciton set_disp_pattern_generator - dcn20 version just calls opp_set_disp_pattern_generator - dcn30 version implements the HUBP blank Signed-off-by: Joshua Aberback <joshua.aberback@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amd/display: Reset flip_immediate to topmost planeAlvin Lee
[Why] When checking if we want to disable GSL or not, we should reset flip_immediate to be the flip type of the topmost plane before looping through the other planes. [How] Set flip_immediate to be the flip type of the topmost plane before looping through the other planes. Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amd/display: Update connector on DSC property changeEryk Brol
[Why] We want to trigger atomic check on connector when DSC debugfs properties are changed. The previous method was reverted because it accessed connector properties unsafely and would also heavily impact performance. [How] Add a flag for forcing DSC update in CRTC state and add connector to the state if the flag is set. Signed-off-by: Eryk Brol <eryk.brol@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amd/display: correct eDP T9 delayHugo Hu
[Why] The current end of T9 delay is relay on polling sink status by DPCD. But the polling for sink status change after NoVideoStream_flag set to 0. [How] Add function edp_add_delay_for_T9 to add T9 delay. Move the sink status polling after blank. Signed-off-by: Hugo Hu <hugo.hu@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amd/display: Add OPTC memory low power supportJacky Liao
[Why] The OPTC memory blocks should be powered down when they are not in use. This will reduce power consumption. [How] 1. Set ODM_MEM_UNASSIGNED_PWR_MODE to shutdown memory when unassigned 2. Set ODM_MEM_VBLANK_PWR_MODE to light sleep mode when in vblank 3. Added a debug option to allow this behaviour to be turned off 4. Restructured debug options to use a bitfield in a way that's more clear Signed-off-by: Jacky Liao <ziyu.liao@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amd/display: Update panel registerChris Park
[Why] Incorrect panel register settings are applied for power sequence because the register macro is not defined in resource. [How] Implement same register space to future resource files. Signed-off-by: Chris Park <Chris.Park@amd.com> Reviewed-by: Joshua Aberback <Joshua.Aberback@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amd/display: fail instead of div by zero/bugcheckAshley Thomas
[why] If pbn_per_slot is 0, fail instead of dividing by zero and bugchecking. [how] Check for zero divisor before division operation. Signed-off-by: Ashley Thomas <Ashley.Thomas2@amd.com> Reviewed-by: Wyatt Wood <Wyatt.Wood@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amd/display: 3.2.109Aric Cyr
Signed-off-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amd/display: Blank HUBP during pixel data blank for DCN30Joshua Aberback
[Why] There are some timings for which we support p-state switching in active, but not in blank. There was a previous issue where a timing that had active-only support would hang a p-state request when we were in an extended blanking period. The workaround for that issue was to block active-only p-state switching, but that resulted in a lack of p-state support for some common timings such as 1440p60. We want to fix that issue properly by un-blocking p-state requests while the display is blanked, so that we can re-enable active-only p-state switching. [How] - new version of blank_pixel_data for DCN30 - call hubp->set_blank from dcn30_blank_pixel_data - blank every hubp in the mpcc tree, and odm tree - on blank enable, wait until the next frame before blanking HUBP Signed-off-by: Joshua Aberback <joshua.aberback@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amd/display: stop top_mgr when type change to non-MST during s3Lewis Huang
[Why] Driver keeps the invalid information cause report the incorrect monitor which save in remote sink to OS [How] When connector type change from MST to non-MST, stop the topology manager. Signed-off-by: Lewis Huang <Lewis.Huang@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amd/display: [FW Promotion] Release 0.0.39Anthony Koo
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amd/display: Keep GSL for full updates with planes that flip VSYNCAlvin Lee
[Why] When enabling PIP in Heaven, the PIP planes are VSYNC flip and is also the top-most pipe. In this case GSL will be disabled because we only check immediate flip for the top pipe. However, the desktop planes are still flip immediate so we should at least keep GSL on until the full update. [How] Check each pipe in the tree to see if any planes are flip immediate. Maintain the GSL lock if yes, and take it down after when unlocking if any planes are flipping VSYNC. Keeping GSL on with VSYNC + flip immediate planes causes corruption. Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amd/display: Force prefetch mode to 0Isabel Zhang
[Why] On APU should be always using prefetch mode 0. Currently, sometimes prefetch mode 1 is being used causing system to hard hang due to minTTUVBlank being too low. [How] Any ASIC running DCN21 will by default allow self refresh and mclk switch. This sets both min and max prefetch mode to 0 by default. Signed-off-by: Isabel Zhang <isabel.zhang@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amd/display: only check available pipe to disable vbios mode.Yongqiang Sun
[Why & How] 1. only need to check first ODM pipe. 2. Only need to check eDP which is on. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amd/display: Add MPC memory shutdown support for DCN3Jacky Liao
[Why] The MPC memory blocks in DCN3 should be powered down completely when they are not in use. This will reduce power consumption. [How] This commits changes behaviour for dcn3 and does the following: 1. Write to MPC_RMU<X>_LOW_PWR_MODE and MPCC_OGAM_MEM_LOW_PWR_MODE to automatically shut down memory when not in use 2. mpc3_power_on_shaper_3dlut and mpc3_power_on_ogam_lut are called to disable force power on when configuration finishes 3. Added a debug option to allow this behaviour to be turned off Signed-off-by: Jacky Liao <ziyu.liao@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm/amd/display: Fix compilation errorTao.Huang
[Why] The C standard does not specify whether an enum is signed or unsigned. In the function prototype, one of the argument is defined as an enum but its declaration was unit32_t. Fix this by changing the function argument to enum in the declaration. Signed-off-by: Tao.Huang <Tao.Huang@amd.com> Signed-off-by: Florin Iucha <florin.iucha@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02drm: Remove SCATTERLIST_MAX_SEGMENTJason Gunthorpe
Since commit 9a40401cfa13 ("lib/scatterlist: Do not limit max_segment to PAGE_ALIGNED values") the max_segment input to sg_alloc_table_from_pages() does not have to be any special value. The new algorithm will always create something less than what the user provides. Thus eliminate this confusing constant. - vmwgfx should use the HW capability, not mix in the OS page size for calling dma_set_max_seg_size() - i915 uses i915_sg_segment_size() both for sg_alloc_table_from_pages and for some open coded sgl construction. This doesn't change the value since rounddown(size, UINT_MAX) == SCATTERLIST_MAX_SEGMENT - drm_prime_pages_to_sg uses it as a default if max_segment is zero, UINT_MAX is fine to use directly. Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Thomas Hellstrom <thellstrom@vmware.com> Cc: Qian Cai <cai@lca.pw> Cc: "Ursulin, Tvrtko" <tvrtko.ursulin@intel.com> Suggested-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/0-v1-44733fccd781+13d-rm_scatterlist_max_jgg@nvidia.com
2020-11-02gpu/drm: delete same check in if conditionBernard Zhao
In function drm_bridge_connector_get_modes_edid, drm_edid_is_valid will check weather (!edid), no need to check again in the if branch. Signed-off-by: Bernard Zhao <bernard@vivo.com> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20201102030736.3833-1-bernard@vivo.com
2020-11-02drm/ast: Support 1600x900 with 108MHz PCLKKuoHsiang Chou
[New] Create the setting for 1600x900 @60Hz refresh rate by 108MHz pixel-clock. Signed-off-by: KuoHsiang Chou <kuohsiang_chou@aspeedtech.com> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20201030074212.22401-1-kuohsiang_chou@aspeedtech.com
2020-11-02drm/atomic: Pass the full state to CRTC atomic begin and flushMaxime Ripard
The current atomic helpers have either their object state being passed as an argument or the full atomic state. The former is the pattern that was done at first, before switching to the latter for new hooks or when it was needed. Let's start convert all the remaining helpers to provide a consistent interface, starting with the CRTC's atomic_begin and atomic_flush. The conversion was done using the coccinelle script below, built tested on all the drivers and actually tested on vc4. virtual report @@ struct drm_crtc_helper_funcs *FUNCS; identifier old_crtc_state, old_state; identifier crtc; identifier f; @@ f(struct drm_crtc_state *old_crtc_state) { ... struct drm_atomic_state *old_state = old_crtc_state->state; <... - FUNCS->atomic_begin(crtc, old_crtc_state); + FUNCS->atomic_begin(crtc, old_state); ...> } @@ struct drm_crtc_helper_funcs *FUNCS; identifier old_crtc_state, old_state; identifier crtc; identifier f; @@ f(struct drm_crtc_state *old_crtc_state) { ... struct drm_atomic_state *old_state = old_crtc_state->state; <... - FUNCS->atomic_flush(crtc, old_crtc_state); + FUNCS->atomic_flush(crtc, old_state); ...> } @@ struct drm_crtc_helper_funcs *FUNCS; struct drm_crtc *crtc; struct drm_crtc_state *crtc_state; identifier dev, state; identifier f; @@ f(struct drm_device *dev, struct drm_atomic_state *state, ...) { <... - FUNCS->atomic_begin(crtc, crtc_state); + FUNCS->atomic_begin(crtc, state); ...> } @@ struct drm_crtc_helper_funcs *FUNCS; struct drm_crtc *crtc; struct drm_crtc_state *crtc_state; identifier dev, state; identifier f; @@ f(struct drm_device *dev, struct drm_atomic_state *state, ...) { <... - FUNCS->atomic_flush(crtc, crtc_state); + FUNCS->atomic_flush(crtc, state); ...> } @@ identifier crtc, old_state; @@ struct drm_crtc_helper_funcs { ... - void (*atomic_begin)(struct drm_crtc *crtc, struct drm_crtc_state *old_state); + void (*atomic_begin)(struct drm_crtc *crtc, struct drm_atomic_state *state); ... - void (*atomic_flush)(struct drm_crtc *crtc, struct drm_crtc_state *old_state); + void (*atomic_flush)(struct drm_crtc *crtc, struct drm_atomic_state *state); ... } @ crtc_atomic_func @ identifier helpers; identifier func; @@ ( static struct drm_crtc_helper_funcs helpers = { ..., .atomic_begin = func, ..., }; | static struct drm_crtc_helper_funcs helpers = { ..., .atomic_flush = func, ..., }; ) @ ignores_old_state @ identifier crtc_atomic_func.func; identifier crtc, old_state; @@ void func(struct drm_crtc *crtc, struct drm_crtc_state *old_state) { ... when != old_state } @ adds_old_state depends on crtc_atomic_func && !ignores_old_state @ identifier crtc_atomic_func.func; identifier crtc, old_state; @@ void func(struct drm_crtc *crtc, struct drm_crtc_state *old_state) { + struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, crtc); ... } @ depends on crtc_atomic_func @ identifier crtc_atomic_func.func; expression E; type T; @@ void func(...) { ... - T state = E; + T crtc_state = E; <+... - state + crtc_state ...+> } @ depends on crtc_atomic_func @ identifier crtc_atomic_func.func; type T; @@ void func(...) { ... - T state; + T crtc_state; <+... - state + crtc_state ...+> } @@ identifier old_state; identifier crtc; @@ void vc4_hvs_atomic_flush(struct drm_crtc *crtc, - struct drm_crtc_state *old_state + struct drm_atomic_state *state ) { + struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, crtc); ... } @@ identifier old_state; identifier crtc; @@ void vc4_hvs_atomic_flush(struct drm_crtc *crtc, - struct drm_crtc_state *old_state + struct drm_atomic_state *state ); @@ identifier old_state; identifier crtc; @@ void vmw_du_crtc_atomic_begin(struct drm_crtc *crtc, - struct drm_crtc_state *old_state + struct drm_atomic_state *state ) { ... } @@ identifier old_state; identifier crtc; @@ void vmw_du_crtc_atomic_begin(struct drm_crtc *crtc, - struct drm_crtc_state *old_state + struct drm_atomic_state *state ); @@ identifier old_state; identifier crtc; @@ void vmw_du_crtc_atomic_flush(struct drm_crtc *crtc, - struct drm_crtc_state *old_state + struct drm_atomic_state *state ) { ... } @@ identifier old_state; identifier crtc; @@ void vmw_du_crtc_atomic_flush(struct drm_crtc *crtc, - struct drm_crtc_state *old_state + struct drm_atomic_state *state ); @ depends on crtc_atomic_func @ identifier crtc_atomic_func.func; identifier old_state; identifier crtc; @@ void func(struct drm_crtc *crtc, - struct drm_crtc_state *old_state + struct drm_atomic_state *state ) { ... } @ include depends on adds_old_state @ @@ #include <drm/drm_atomic.h> @ no_include depends on !include && adds_old_state @ @@ + #include <drm/drm_atomic.h> #include <drm/...> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20201028123222.1732139-2-maxime@cerno.tech
2020-11-02drm/atomic: Pass the full state to CRTC atomic_checkMaxime Ripard
The current atomic helpers have either their object state being passed as an argument or the full atomic state. The former is the pattern that was done at first, before switching to the latter for new hooks or when it was needed. Let's start convert all the remaining helpers to provide a consistent interface, starting with the CRTC's atomic_check. The conversion was done using the coccinelle script below, built tested on all the drivers and actually tested on vc4. virtual report @@ struct drm_crtc_helper_funcs *FUNCS; struct drm_crtc *crtc; struct drm_crtc_state *crtc_state; identifier dev, state; identifier ret, f; @@ f(struct drm_device *dev, struct drm_atomic_state *state) { <... - ret = FUNCS->atomic_check(crtc, crtc_state); + ret = FUNCS->atomic_check(crtc, state); ...> } @@ identifier crtc, new_state; @@ struct drm_crtc_helper_funcs { ... - int (*atomic_check)(struct drm_crtc *crtc, struct drm_crtc_state *new_state); + int (*atomic_check)(struct drm_crtc *crtc, struct drm_atomic_state *state); ... } @ crtc_atomic_func @ identifier helpers; identifier func; @@ static struct drm_crtc_helper_funcs helpers = { ..., .atomic_check = func, ..., }; @ ignores_new_state @ identifier crtc_atomic_func.func; identifier crtc, new_state; @@ int func(struct drm_crtc *crtc, struct drm_crtc_state *new_state) { ... when != new_state } @ adds_new_state depends on crtc_atomic_func && !ignores_new_state @ identifier crtc_atomic_func.func; identifier crtc, new_state; @@ int func(struct drm_crtc *crtc, struct drm_crtc_state *new_state) { + struct drm_crtc_state *new_state = drm_atomic_get_new_crtc_state(state, crtc); ... } @ depends on crtc_atomic_func @ identifier crtc_atomic_func.func; expression E; type T; @@ int func(...) { ... - T state = E; + T crtc_state = E; <+... - state + crtc_state ...+> } @ depends on crtc_atomic_func @ identifier crtc_atomic_func.func; type T; @@ int func(...) { ... - T state; + T crtc_state; <+... - state + crtc_state ...+> } @ depends on crtc_atomic_func @ identifier crtc_atomic_func.func; identifier new_state; identifier crtc; @@ int func(struct drm_crtc *crtc, - struct drm_crtc_state *new_state + struct drm_atomic_state *state ) { ... } @@ identifier new_state; identifier crtc; @@ int vmw_du_crtc_atomic_check(struct drm_crtc *crtc, - struct drm_crtc_state *new_state + struct drm_atomic_state *state ) { + struct drm_crtc_state *new_state = drm_atomic_get_new_crtc_state(state, crtc); ... } @@ identifier new_state; identifier crtc; @@ int vmw_du_crtc_atomic_check(struct drm_crtc *crtc, - struct drm_crtc_state *new_state + struct drm_atomic_state *state ); @ include depends on adds_new_state @ @@ #include <drm/drm_atomic.h> @ no_include depends on !include && adds_new_state @ @@ + #include <drm/drm_atomic.h> #include <drm/...> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20201028123222.1732139-1-maxime@cerno.tech
2020-11-02drm/vc4: kms: Add functions to create the state objectsMaxime Ripard
In order to make the vc4_kms_load code and error path a bit easier to read and extend, add functions to create state objects, and use managed actions to cleanup if needed. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20201029190104.2181730-6-maxime@cerno.tech
2020-11-02drm/vc4: Use devm_drm_dev_allocMaxime Ripard
We can simplify a bit the bind code, its error path and unbind by using the managed devm_drm_dev_alloc function. Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/20201029190104.2181730-5-maxime@cerno.tech
2020-11-02drm/vc4: Use the helper to retrieve vc4_dev when neededMaxime Ripard
We have a helper to retrieve the vc4_dev structure from the drm_device one when needed, so let's use it consistently. Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/20201029190104.2181730-4-maxime@cerno.tech
2020-11-02drm/vc4: gem: Add a managed action to cleanup the job queueMaxime Ripard
The job queue needs to be cleaned up using vc4_gem_destroy, but it's not used consistently (vc4_drv's bind calls it in its error path, but doesn't in unbind), and we can make that automatic through a managed action. Let's remove the requirement to call vc4_gem_destroy. Fixes: d5b1a78a772f ("drm/vc4: Add support for drawing 3D frames.") Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/20201029190104.2181730-3-maxime@cerno.tech
2020-11-02drm/vc4: drv: Use managed drm_mode_config_initMaxime Ripard
Using drmm_mode_config_init instead of drm_mode_config_init allows us to cleanup a bit the error path. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20201029190104.2181730-2-maxime@cerno.tech
2020-11-02drm/vc4: bo: Add a managed action to cleanup the cacheMaxime Ripard
The BO cache needs to be cleaned up using vc4_bo_cache_destroy, but it's not used consistently (vc4_drv's bind calls it in its error path, but doesn't in unbind), and we can make that automatic through a managed action. Let's remove the requirement to call vc4_bo_cache_destroy. Fixes: c826a6e10644 ("drm/vc4: Add a BO cache.") Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/20201029190104.2181730-1-maxime@cerno.tech
2020-11-02drm/nouveau/ttm: Add limits.hMaxime Ripard
It seems that a recent commit broke the nouveau compilation when swiotlb is disabled (which is the case on our ARM defconfig for example). Daniel says """ Since the proper fix is maybe stuck in the usual "drm abuses swiotlb internals" bikeshed, maybe best if we push a fix to including limits.h in nouveau and call it done? """ So let's go down the simplest path to fix our build, and goes back to it later if needed. Link: https://patchwork.freedesktop.org/patch/397835/ Fixes: 4dbafbd30aef ("drm/nouveu: fix swiotlb include") Acked-by: Daniel Vetter <daniel@ffwll.ch> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-11-02Merge drm/drm-next into drm-misc-nextMaxime Ripard
Daniel needs -rc2 in drm-misc-next to merge some patches Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-11-01drm/amdgpu: fix build_coefficients() argumentArnd Bergmann
gcc -Wextra warns about a function taking an enum argument being called with a bool: drivers/gpu/drm/amd/amdgpu/../display/modules/color/color_gamma.c: In function 'apply_degamma_for_user_regamma': drivers/gpu/drm/amd/amdgpu/../display/modules/color/color_gamma.c:1617:29: warning: implicit conversion from 'enum <anonymous>' to 'enum dc_transfer_func_predefined' [-Wenum-conversion] 1617 | build_coefficients(&coeff, true); It appears that a patch was added using the old calling conventions after the type was changed, and the value should actually be 0 (TRANSFER_FUNCTION_SRGB) here instead of 1 (true). Fixes: 55a01d4023ce ("drm/amd/display: Add user_regamma to color module") Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-01amd/amdgpu: Disable VCN DPG mode for PicassoVeerabadhran Gopalakrishnan
Concurrent operation of VCN and JPEG decoder in DPG mode is causing ring timeout due to power state. Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/hisilicon: Adding a const declaration to an invariant constructTian Tao
Some constructs cannot be changed after being assigned a value, so add const declarations to invariant constructs. Signed-off-by: Tian Tao <tiantao6@hisilicon.com> Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/1603955505-43942-1-git-send-email-tiantao6@hisilicon.com
2020-11-02drm/nouveu: fix swiotlb includeChristian König
The check for swiotlb has moved to nouveu_ttm.c, but we forgot to move the include as well. This blows up only when merged with linux-next, not sure why drm-misc-next works stand alone. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/397835/
2020-10-30drm/i915: Reduce severity for fixing up mistaken VBT tc->legacy_portChris Wilson
If the VBT assigned tc->legacy_port mismatches the live_status indicator for the connector, we ignore the VBT directive and switch over to the HW setting. This is not a driver error, unless we happen to misparse the VBT or the live_status registers. However, for the system in CI where the error is only reported on 1 port out of 4, the evidence indicates the VBT is wrong. Stop flaging this as an error since the cause is beyond our control, fixup the mistake and continue on. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Imre Deak <imre.deak@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201030153209.14808-1-chris@chris-wilson.co.uk
2020-10-30drm/amd/display: Clean up GFX9 tiling_flags path.Bas Nieuwenhuizen
We're unconditionally using modifiers internally for GFX9+ now. Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/display: Expose modifiers.Bas Nieuwenhuizen
This expose modifier support on GFX9+. Only modifiers that can be rendered on the current GPU are added. This is to reduce the number of modifiers exposed. The HW could expose more, but the best mechanism to decide what to expose without an explosion in modifiers is still to be decided, and in the meantime this should not regress things from pre-modifiers and does not risk regressions as we make up our mind in the future. v2: - Added comment that D on Raven is only valid for 64bpp and will be filtered based on format later. - Removed D tiling modes that weren't useful for 64bpp on GFX10+. v4: Add AMDGPU_FAMILY_VGH case. Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/display: Add formats for DCC with 2/3 planes.Bas Nieuwenhuizen
For DCC we will use 2/3 planes to avoid X rendering to the frontbuffer with DCC compressed images. To make this work with the core KMS validation we need to add extra formats with the extra planes. However, due to flexibility we set bpp = 0 for the extra planes and do the validation ourselves. Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/display: Set DC options from modifiers.Bas Nieuwenhuizen
This sets the DC tiling options from the modifier, if modifiers are used for the FB. This patch by itself does not expose the support yet though. There is not much validation yet to limit the scope of this patch, but the current validation is at the same level as the BO metadata path. v2: Add modifier check to should_reset_plane. Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/display: Refactor surface tiling setup.Bas Nieuwenhuizen
Prepare for inserting modifiers based configuration, while sharing a bunch of DCC validation & initializing the device-based configuration. Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/display: Convert tiling_flags to modifiers.Bas Nieuwenhuizen
This way the modifier path gets exercised all the time, improving testing. Furthermore, for modifiers this is required as getfb2 will always return the modifier if the driver sets allow_fb_modifiers. This only triggers once allow_fb_modifiers is set. Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/display: Store tiling_flags in the framebuffer.Bas Nieuwenhuizen
This moves the tiling_flags to the framebuffer creation. This way the time of the "tiling" decision is the same as it would be with modifiers. Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/display: Honor the offset for plane 0.Bas Nieuwenhuizen
With modifiers I'd like to support non-dedicated buffers for images. Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Cc: stable@vger.kernel.org # 5.1.0 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd: Init modifier field of helper fb.Bas Nieuwenhuizen
Otherwise the field ends up being used uninitialized when enabling modifiers, failing validation with high likelyhood. v4: Use memset Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (for v1) Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/display: Do not silently accept DCC for multiplane formats.Bas Nieuwenhuizen
Silently accepting it could result in corruption. Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/pm: fix compile warnings about variable used uninitializedEvan Quan
Fix the compile warnings below: >> drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu7_hwmgr.c:1743:13: warning: variable 'min' is used uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized] >> drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu7_hwmgr.c:1743:13: warning: variable 'max' is used uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized] Signed-off-by: Evan Quan <evan.quan@amd.com> Reported-by: kernel test robot <lkp@intel.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/pm: fix compile warning about missing prototype for functionEvan Quan
Fix the warning below: >> drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/ppatomctrl.c:1234:29: warning: no previous prototype for function 'asic_internal_ss_get_ss_table' [-Wmissing-prototypes] ATOM_ASIC_INTERNAL_SS_INFO *asic_internal_ss_get_ss_table(void *device) ^ drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/ppatomctrl.c:1234:1: note: declare 'static' if the function is not intended to be used outside of this translation unit ATOM_ASIC_INTERNAL_SS_INFO *asic_internal_ss_get_ss_table(void *device) ^ static 1 warning generated. Signed-off-by: Evan Quan <evan.quan@amd.com> Reported-by: kernel test robot <lkp@intel.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/i915: Get rid of ibx_irq_pre_postinstall()Ville Syrjälä
ibx_irq_pre_postinstall() looks totally pointless. We can just init both SDEIMR and SDEIER at the same time before enabling the master interrupt. It's equally racy as the other order due to doing all of this from the postinstall stage with the interrupt handler already in place. That is, safe with MSI but racy with shared legacy interrupts. Fortunately we should have MSI on all ilk+. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201028213323.5423-20-ville.syrjala@linux.intel.com Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
2020-10-30drm/i915: Use GEN3_IRQ_INIT() to init south interrupts in icp+Ville Syrjälä
No reason not to use GEN3_IRQ_INIT() on icp+. Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201028213323.5423-19-ville.syrjala@linux.intel.com
2020-10-30drm/i915: Enable hpd logic only for ports that are presentVille Syrjälä
Let's enable the hardware hpd logic only for the ports we can actually use. In theory this may save some miniscule amounts of power, and more importantly it eliminates a lot if platform specific codepaths since the generic thing can now deal with any combination of ports being present on each SKU. v2: Deal with DG1 v3: Deal with DG1 some more Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201028213323.5423-18-ville.syrjala@linux.intel.com Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
2020-10-30drm/i915: Remove per-platform IIR HPD maskingVille Syrjälä
We no longer unmask all HPD irqs, so we can drop the ugly per-platform HPD IIR masking. IMR will prevent unsupported bits from appearing in IIR. v2: Deal with DG1 Include "HOTPLUG" in the mask names (Lucas) v3: Fix typos in subject Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201028213323.5423-17-ville.syrjala@linux.intel.com
generated by cgit v1.2.3 (git 2.39.1) at 2025-07-29 22:33:05 +0000