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path: root/drivers/gpu/drm/nouveau/nvkm
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2020-11-08drm: remove unneeded breakTom Rix
A break is not needed if it is preceded by a return or break Signed-off-by: Tom Rix <trix@redhat.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20201019163115.25814-1-trix@redhat.com
2020-10-30drm/nouveau/device: fix changing endianess code to work on older GPUsKarol Herbst
With this we try to detect if the endianess switch works and assume LE if not. Suggested by Ben. Fixes: 51c05340e407 ("drm/nouveau/device: detect if changing endianness failed") Signed-off-by: Karol Herbst <kherbst@redhat.com> Cc: <stable@vger.kernel.org> # v5.8+ Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-10-15Merge tag 'dma-mapping-5.10' of git://git.infradead.org/users/hch/dma-mappingLinus Torvalds
Pull dma-mapping updates from Christoph Hellwig: - rework the non-coherent DMA allocator - move private definitions out of <linux/dma-mapping.h> - lower CMA_ALIGNMENT (Paul Cercueil) - remove the omap1 dma address translation in favor of the common code - make dma-direct aware of multiple dma offset ranges (Jim Quinlan) - support per-node DMA CMA areas (Barry Song) - increase the default seg boundary limit (Nicolin Chen) - misc fixes (Robin Murphy, Thomas Tai, Xu Wang) - various cleanups * tag 'dma-mapping-5.10' of git://git.infradead.org/users/hch/dma-mapping: (63 commits) ARM/ixp4xx: add a missing include of dma-map-ops.h dma-direct: simplify the DMA_ATTR_NO_KERNEL_MAPPING handling dma-direct: factor out a dma_direct_alloc_from_pool helper dma-direct check for highmem pages in dma_direct_alloc_pages dma-mapping: merge <linux/dma-noncoherent.h> into <linux/dma-map-ops.h> dma-mapping: move large parts of <linux/dma-direct.h> to kernel/dma dma-mapping: move dma-debug.h to kernel/dma/ dma-mapping: remove <asm/dma-contiguous.h> dma-mapping: merge <linux/dma-contiguous.h> into <linux/dma-map-ops.h> dma-contiguous: remove dma_contiguous_set_default dma-contiguous: remove dev_set_cma_area dma-contiguous: remove dma_declare_contiguous dma-mapping: split <linux/dma-mapping.h> cma: decrease CMA_ALIGNMENT lower limit to 2 firewire-ohci: use dma_alloc_pages dma-iommu: implement ->alloc_noncoherent dma-mapping: add new {alloc,free}_noncoherent dma_map_ops methods dma-mapping: add a new dma_alloc_pages API dma-mapping: remove dma_cache_sync 53c700: convert to dma_alloc_noncoherent ...
2020-10-07drm/nouveau/device: return error for unknown chipsetsKarol Herbst
Previously the code relied on device->pri to be NULL and to fail probing later. We really should just return an error inside nvkm_device_ctor for unsupported GPUs. Fixes: 24d5ff40a732 ("drm/nouveau/device: rework mmio mapping code to get rid of second map") Signed-off-by: Karol Herbst <kherbst@redhat.com> Cc: dann frazier <dann.frazier@canonical.com> Cc: dri-devel <dri-devel@lists.freedesktop.org> Cc: Dave Airlie <airlied@redhat.com> Cc: stable@vger.kernel.org Reviewed-by: Jeremy Cline <jcline@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201006220528.13925-1-kherbst@redhat.com
2020-09-25drm/nouveau/gk20a: stop setting DMA_ATTR_NON_CONSISTENTChristoph Hellwig
DMA_ATTR_NON_CONSISTENT is a no-op except on PA-RISC and a few MIPS configs, so don't set it in this ARM specific driver part. Signed-off-by: Christoph Hellwig <hch@lst.de>
2020-08-05Merge tag 'drm-next-2020-08-06' of git://anongit.freedesktop.org/drm/drmLinus Torvalds
Pull drm updates from Dave Airlie: "New xilinx displayport driver, AMD support for two new GPUs (more header files), i915 initial support for RocketLake and some work on their DG1 (discrete chip). The core also grew some lockdep annotations to try and constrain what drivers do with dma-fences, and added some documentation on why the idea of indefinite fences doesn't work. The long list is below. I do have some fixes trees outstanding, but I'll follow up with those later. core: - add user def flag to cmd line modes - dma_fence_wait added might_sleep - dma-fence lockdep annotations - indefinite fences are bad documentation - gem CMA functions used in more drivers - struct mutex removal - more drm_ debug macro usage - set/drop master api fixes - fix for drm/mm hole size comparison - drm/mm remove invalid entry optimization - optimise drm/mm hole handling - VRR debugfs added - uncompressed AFBC modifier support - multiple display id blocks in EDID - multiple driver sg handling fixes - __drm_atomic_helper_crtc_reset in all drivers - managed vram helpers ttm: - ttm_mem_reg handling cleanup - remove bo offset field - drop CMA memtype flag - drop mappable flag xilinx: - New Xilinx ZynqMP DisplayPort Subsystem driver nouveau: - add CRC support - start using NVIDIA published class header files - convert all push buffer emission to new macros - Proper push buffer space management for EVO/NVD channels. - firmware loading fixes - 2MiB system memory pages support on Pascal and newer vkms: - larger cursor support i915: - Rocketlake platform enablement - Early DG1 enablement - Numerous GEM refactorings - DP MST fixes - FBC, PSR, Cursor, Color, Gamma fixes - TGL, RKL, EHL workaround updates - TGL 8K display support fixes - SDVO/HDMI/DVI fixes amdgpu: - Initial support for Sienna Cichlid GPU - Initial support for Navy Flounder GPU - SI UVD/VCE support - expose rotation property - Add support for unique id on Arcturus - Enable runtime PM on vega10 boards that support BACO - Skip BAR resizing if the bios already did id - Major swSMU code cleanup - Fixes for DCN bandwidth calculations amdkfd: - Track SDMA usage per process - SMI events interface radeon: - Default to on chip GART for AGP boards on all arches - Runtime PM reference count fixes msm: - headers regenerated causing churn - a650/a640 display and GPU enablement - dpu dither support for 6bpc panels - dpu cursor fix - dsi/mdp5 enablement for sdm630/sdm636/sdm66 tegra: - video capture prep support - reflection support mediatek: - convert mtk_dsi to bridge API meson: - FBC support sun4i: - iommu support rockchip: - register locking fix - per-pixel alpha support PX30 VOP mgag200: - ported to simple and shmem helpers - device init cleanups - use managed pci functions - dropped hw cursor support ast: - use managed pci functions - use managed VRAM helpers - rework cursor support malidp: - dev_groups support hibmc: - refactor hibmc_drv_vdac: vc4: - create TXP CRTC imx: - error path fixes and cleanups etnaviv: - clock handling and error handling cleanups - use pin_user_pages" * tag 'drm-next-2020-08-06' of git://anongit.freedesktop.org/drm/drm: (1747 commits) drm/msm: use kthread_create_worker instead of kthread_run drm/msm/mdp5: Add MDP5 configuration for SDM636/660 drm/msm/dsi: Add DSI configuration for SDM660 drm/msm/mdp5: Add MDP5 configuration for SDM630 drm/msm/dsi: Add phy configuration for SDM630/636/660 drm/msm/a6xx: add A640/A650 hwcg drm/msm/a6xx: hwcg tables in gpulist drm/msm/dpu: add SM8250 to hw catalog drm/msm/dpu: add SM8150 to hw catalog drm/msm/dpu: intf timing path for displayport drm/msm/dpu: set missing flush bits for INTF_2 and INTF_3 drm/msm/dpu: don't use INTF_INPUT_CTRL feature on sdm845 drm/msm/dpu: move some sspp caps to dpu_caps drm/msm/dpu: update UBWC config for sm8150 and sm8250 drm/msm/dpu: use right setup_blend_config for sm8150 and sm8250 drm/msm/a6xx: set ubwc config for A640 and A650 drm/msm/adreno: un-open-code some packets drm/msm: sync generated headers drm/msm/a6xx: add build_bw_table for A640/A650 drm/msm/a6xx: fix crashstate capture for A650 ...
2020-08-05Merge tag 'for-linus-hmm' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma Pull hmm updates from Jason Gunthorpe: "Ralph has been working on nouveau's use of hmm_range_fault() and migrate_vma() which resulted in this small series. It adds reporting of the page table order from hmm_range_fault() and some optimization of migrate_vma(): - Report the size of the page table mapping out of hmm_range_fault(). This makes it easier to establish a large/huge/etc mapping in the device's page table. - Allow devices to ignore the invalidations during migration in cases where the migration is not going to change pages. For instance migrating pages to a device does not require the device to invalidate pages already in the device. - Update nouveau and hmm_tests to use the above" * tag 'for-linus-hmm' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma: mm/hmm/test: use the new migration invalidation nouveau/svm: use the new migration invalidation mm/notifier: add migration invalidation type mm/migrate: add a flags parameter to migrate_vma nouveau: fix storing invalid ptes nouveau/hmm: support mapping large sysmem pages nouveau: fix mapping 2MB sysmem pages nouveau/hmm: fault one page at a time mm/hmm: add tests for hmm_pfn_to_map_order() mm/hmm: provide the page mapping order in hmm_range_fault()
2020-07-28nouveau: fix storing invalid ptesRalph Campbell
When migrating a range of system memory to device private memory, some of the pages in the address range may not be migrating. In this case, the non migrating pages won't have a new GPU MMU entry to store but the nvif_object_ioctl() NVIF_VMM_V0_PFNMAP method doesn't check the input and stores a bad valid GPU page table entry. Fix this by skipping the invalid input PTEs when updating the GPU page tables. Link: https://lore.kernel.org/r/20200723223004.9586-2-rcampbell@nvidia.com Signed-off-by: Ralph Campbell <rcampbell@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2020-07-24drm/nouveau/kms/nv50-: implement proper push buffer control logicBen Skeggs
We had a, what was supposed to be temporary, hack in the KMS code where we'd completely drain an EVO/NVD channel's push buffer when wrapping to the start again, instead of treating it as a ring buffer. Let's fix that, finally. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau: Use fallthrough pseudo-keywordGustavo A. R. Silva
Replace the existing /* fall through */ comments and its variants with the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary fall-through markings when it is the case. [1] https://www.kernel.org/doc/html/latest/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/vmm/gp100-: fix mapping 2MB sysmem pagesRalph Campbell
The nvif_object_ioctl() method NVIF_VMM_V0_PFNMAP wasn't correctly setting the hardware specific GPU page table entries for 2MB sized pages. Fix this by adding functions to set and clear PD0 GPU page table entries. Signed-off-by: Ralph Campbell <rcampbell@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/mmu: make nvkm_vmm_ctor() staticRalph Campbell
The function nvkm_vmm_ctor() is not called outside of the file defining it, so make it static. Signed-off-by: Ralph Campbell <rcampbell@nvidia.com> Reviewed-by: John Hubbard <jhubbard@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/sec2/gp102: allow module to load when LSFW is missingBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/gr/gm200-: explicitly handle nofwBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/pmu/gm200-: explicitly handle nofwBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/pmu/gm20x: don't pretend we support loading with our custom FWBen Skeggs
It technically loads, and runs, but is ultimately pointless outside of a very narrow window (fanless systems where one wants to attempt using the, broken for a lot of gm20x, memory reclocking code). It's also potentially dangerous to override the VBIOS-provided "Pre-OS" PMU, which would be responsible for fan control otherwise. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/acr: store a mask of LS falcons the controlling LSFW can bootstrapBen Skeggs
This will prevent some pain with broken firmware trees, as under some circumstances the HSFW can fail and leave the GPU in a state we don't know how to recover from. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/acr: store a mask of LS falcons the HSFW can bootstrapBen Skeggs
This will prevent reloading of HS FW where it's pointless, and bypass hitting some timeouts. Not a situation one should generally hit, but can occur with a messed up firmware installation. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/acr: allow module to load when HSFW(s) are missingBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/acr: refuse to load LSFW if HSFW is missingBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/mmu/gp100-: enable mmu invalidate depth optimisationBen Skeggs
This causes us to invalidate MMU only at the level we made modifications - ie: if we've only modified PTEs, there's no need to have MMU dump the PDs it's fetched into L2. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/nvfw: firmware structures should begin with nvfw_Timur Tabi
Rename all structures that are used directly by firmware to have a nvfw_ prefix. This makes it easier to identify structures that have a fixed, specific layout. A future patch will define several more such structures, so it's important to be consistent now. Signed-off-by: Timur Tabi <ttabi@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/therm/gt215: make gt215_therm_init staticBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/mmu: make a couple of functions staticBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/mc/gp10b: make gp10b_mc_init staticBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/nvfw/acr: make lsb_header_tail_dump staticBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/gr/gf100-: make some functions staticBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/disp/gm200-: remove 'head' parameter from nvkm_ior_func.hdmi.scdc()Ben Skeggs
It's no longer required. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/disp/gm200-: fix regression from HDA SOR selection changesBen Skeggs
Fixes: 9b5ca547bb8 ("drm/nouveau/disp/gm200-: detect and potentially disable HDA support on some SORs") Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-10nouveau: fix mapping 2MB sysmem pagesRalph Campbell
The nvif_object_ioctl() method NVIF_VMM_V0_PFNMAP wasn't correctly setting the hardware specific GPU page table entries for 2MB sized pages. Fix this by adding functions to set and clear PD0 GPU page table entries. Link: https://lore.kernel.org/r/20200701225352.9649-4-rcampbell@nvidia.com Signed-off-by: Ralph Campbell <rcampbell@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2020-07-08drm/nouveau/i2c/g94-: increase NV_PMGR_DP_AUXCTL_TRANSACTREQ timeoutBen Skeggs
Tegra TRM says worst-case reply time is 1216us, and this should fix some spurious timeouts that have been popping up. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-06-04drm/nouveau: gr/gk20a: Use firmware version 0Thierry Reding
Tegra firmware doesn't actually use any version numbers and passing -1 causes the existing firmware binaries not to be found. Use version 0 to find the correct files. Fixes: ef16dc278ec2 ("drm/nouveau/gr/gf100-: select implementation based on available FW") Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-06-04drm/nouveau/disp/gm200-: detect and potentially disable HDA support on some SORsBen Skeggs
Some HDA pin widgets may be disabled by BIOS, and unavailable from a SOR. Our SOR allocation policy uses this information to allocate an appropriate SOR when HDA is supported by a display. Thank you to NVIDIA for providing the information to determine this. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-06-04drm/nouveau/disp/gp100: split SOR implementation from gm200Ben Skeggs
GP100 needs different HDA detection. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-06-04drm/nouveau/disp: modify OR allocation policy to account for HDA requirementsBen Skeggs
Since GM200, SORs are no longer tied to a specific connector, and we allocate them instead, with the assumption that all SORs are equally capable. However, there's a 1<->1 mapping between SOR and HDA pin widget, and it turns out that it's possible for some widgets to be disabled... In order to avoid picking a SOR without a valid pin widget, some new rules need to be added. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-06-04drm/nouveau/disp: split part of OR allocation logic into a functionBen Skeggs
No logical changes here, this is just moving the code to make the changes in the next commit more obvious. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-06-04drm/nouveau/disp: provide hint to OR allocation about HDA requirementsBen Skeggs
Will be used by a subsequent commit to influence SOR allocation policy. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-06-01drm/nouveau/disp/gm200-: fix NV_PDISP_SOR_HDMI2_CTRL(n) selectionBen Skeggs
This is a SOR register, and not indexed by the bound head. Fixes display not coming up on high-bandwidth HDMI displays under a number of configurations. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-05-22drm/nouveau/disp/hda/gv100-: NV_PDISP_SF_AUDIO_CNTRL0 register movedBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-05-22drm/nouveau/disp/hda/gf119-: select HDA device entry based on bound headBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-05-22drm/nouveau/disp/hda/gf119-: add HAL for programming device entry in SFBen Skeggs
Register has moved on GV100. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-05-22drm/nouveau/disp/hda/gt215-: pass head to nvkm_ior.hda.eld()Ben Skeggs
We're going to use the bound head to select HDA device entry. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-05-22drm/nouveau/device: use regular PRI accessors in chipset detectionBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-05-22drm/nouveau/device: detect vGPUsKarol Herbst
Using ENODEV as this prevents probe failed errors in dmesg. v2: move check further down Signed-off-by: Karol Herbst <kherbst@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-05-22drm/nouveau/device: detect if changing endianness failedKarol Herbst
v2: relax the checks a little Signed-off-by: Karol Herbst <kherbst@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-05-22drm/nouveau/device: rework mmio mapping code to get rid of second mapKarol Herbst
Fixes warnings on GPUs with smaller a smaller mmio region like vGPUs. Signed-off-by: Karol Herbst <kherbst@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-05-22drm/nouveau/mmu: Remove unneeded semicolonZheng Bin
Fixes coccicheck warning: drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h:307:2-3: Unneeded semicolon drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c:583:2-3: Unneeded semicolon Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Zheng Bin <zhengbin13@huawei.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-05-22drm/nouveau/acr: Use kmemdup instead of kmalloc and memcpyZou Wei
Fixes coccicheck warning: drivers/gpu/drm/nouveau/nvkm/subdev/acr/hsfw.c:103:23-30: WARNING opportunity for kmemdup drivers/gpu/drm/nouveau/nvkm/subdev/acr/hsfw.c:113:22-29: WARNING opportunity for kmemdup Fixes: 22dcda45a3d1 ("drm/nouveau/acr: implement new subdev to replace "secure boot"") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Zou Wei <zou_wei@huawei.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-05-22drm/nouveau/core/memory: remove redundant assignments to variable retColin Ian King
The variable ret is being initialized with a value that is never read and it is being updated later with a new value. The initialization is redundant and can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-05-22drm/nouveau/disp/gv100-: expose capabilities classBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>