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path: root/drivers/gpu/drm/msm
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2016-03-03drm/msm: add timestamp paramRob Clark
We need this for GL_TIMESTAMP queries. Note: currently only supported on a4xx.. a3xx doesn't have this always-on counter. I think we could emulate it with the one CP counter that is available, but for now it is of limited usefulness on a3xx (since we can't seem to do time-elapsed queries in any sane way with the existing firmware on a3xx, and if you are trying to do profiling on a tiler you want time-elapsed). We can add that later if it becomes useful. Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-03drm/msm: fix small typoRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-03drm/msm: grab struct_mutex after allocating submitRob Clark
No real need to hold the lock over allocation, and simplifies things slightly if we change the order. Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-03drm/msm: reject submit ioctl if no gpuRob Clark
Existing userspace wouldn't get this far, since getparam ioctl would have failed and it would have bailed out creating a screen/context. But all the same, we shouldn't let evil or confused userspace cause a null ptr deref. Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-03drm/msm/adreno: print details in case of a protect fault interruptCraig Stout
Signed-off-by: Craig Stout <cstout@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-03drm/msm/adreno: get CP_RPTR from register instead of shadow memoryCraig Stout
As described in the downstream/kgsl driver: Sometimes the RPTR shadow memory is unreliable causing timeouts in adreno_idle(). Read it directly from the register instead. Signed-off-by: Craig Stout <cstout@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-03drm/msm/adreno: add adreno430 power controlCraig Stout
Signed-off-by: Craig Stout <cstout@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-03drm/msm/adreno: support for adreno 430.Craig Stout
Signed-off-by: Craig Stout <cstout@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-03drm/msm: update generated headersRob Clark
Pull in additional regs needed for a430, etc. Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-03drm/msm/dsi: fix definition of msm_dsi_pll_28nm_8960_init()Luis Henriques
This fixes the following build failure: drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.o: In function `msm_dsi_pll_28nm_8960_init': dsi_pll_28nm.c:(.text+0x1198): multiple definition of `msm_dsi_pll_28nm_8960_init' drivers/gpu/drm/msm/dsi/pll/dsi_pll.o:dsi_pll.c:(.text+0x0): first defined here Signed-off-by: Luis Henriques <luis.henriques@canonical.com> Acked-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-03drm/msm/dsi: Parse DSI lanes via DTArchit Taneja
The DSI driver is currently unaware of how the DSI physical data lanes are mapped to the logical lanes provided by the DSI controller. Create a DT binding "qcom,data-lane-map" that provides this information on a given platform. The MSM DSI controller is restricted in terms of what all mappings it can support. The lane polarity is fixed for all the lanes, the clock lanes are fixed, and the data lanes can be swapped among each other only for a few combinations. Apply these restrictions when we parse the DT data. Cc: devicetree@vger.kernel.org Cc: Rob Herring <robh@kernel.org> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com> Acked-by: Rob Herring <robh@kernel.org>
2016-03-02drm/msm/dsi: Drop VDD regulator for MSM8916Archit Taneja
VDD regulator input was specified for MSM8916. It turns our that this regulator is used for the display panels used on MSM8916 platforms, but not the DSI controller itself. Drop this regulator from the list. Reported-by: Vinay Simha <vinaysimha@inforcecomputing.com> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-02drm/msm/dsi: Remove incorrect warning on host attachArchit Taneja
With the implementation of of_graph parsing, it isn't any longer necessary for msm_host->device node to be same as dsi->dev.of_node. This only holds true when the connected device is also a child of the dsi_host. In the case of external bridge chips belonging to a different control bus, these are guaranteed to be different. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-02drm/msm: Free fb helper resources in msm_unloadArchit Taneja
We have a msm_fbev_free function to uninit fb_helper stuff, but we aren't using it. Call it in msm_unload. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-02drm/msm/mdp: Detach iommu in mdp4_destroySricharan R
attach_dev gets called in mdp4_kms_init, but there is no corresponding detach_dev called in the error path or in the kms driver unload path. Detach and destroy mmu in mdp4_destroy. Signed-off-by: Sricharan R <sricharan@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-02drm/msm: make iommu port names const'ierRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-02drm/msm/mdp: Use atomic helper to set crtc propertyArchit Taneja
Assign drm_atomic_helper_crtc_set_property helper to MDP4 and MDP5 crtcs' set_property ops. This replaces the custom funcs that returned an error even for standard crtc properties. Signed-off-by: Archit Taneja <architt@codeaurora.org> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-02-29drm/msm/hdmi: HDMI 8996 PHY/PLL supportArchit Taneja
Add support for the HDMI PHY/PLL found in MSM8996/APQ8096. Unlike the previous PHYs supported in the driver, this doesn't need the powerup/powerdown ops. The PLL prepare/unprepare clock ops enable/disable the phy itself. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-02-29drm/msm/hdmi: Update generated headers for HDMI 8996 PHYArchit Taneja
Adds HDMI 8996 PHY offsets. The offsets are divided into 3 parts: - Core HDMI PHY registers - HDMI PLL registers (part of QSERDES block) - HDMI TX lane registers (part of QSERDES block) Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-02-29drm/msm/hdmi: Update generated headers to split PHY/PLL offsetsArchit Taneja
- Create separate domains for 8960 PHY and PLL - Create separate domains for 8x60 PHY Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-02-29drm/msm/hdmi: Convert PHY files according to new designArchit Taneja
Remove the old PHY ops managed by hdmi_platform_config and use them as ops provided by the HDMI PHY driver. Remove the old HDMI 8960 PLL code that used the top level HDMI TX mmio base. NOTE: With this commit, HDMI functionality will break until the HDMI PHY/PLL register offsets in hdmi.xml.h aren't updated to be used as separate domains. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-02-29drm/msm/hdmi: Make HDMI core get its PHYArchit Taneja
Make HDMI core get its PHY by parsing the "phys" phandle. The core will use this PHY reference to enable/disable PHY. The driver defers probe until PHY isn't available. The DT bindings used here is the same as the one used for PHYs using the common PHY framework bindings. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-02-29drm/msm/hdmi: Manage HDMI PLL through PHY driverArchit Taneja
Add a helper to initialize PLL in the PHY driver. HDMI PLLs are going to have their own mmio base different from that of PHY. For the clock code in hdmi_phy_8960.c, some changes were needed for it to work with the updated register offsets. Create a copy of the updated clock code in hdmi_pll_8960.c, instead of rewriting it in hdmi_phy_8960.c itself. This removes the need to place CONFIG_COMMON_CLOCK checks all around, makes the code more legible, and also removes some old checkpatch warnings with the original code. The older hdmi pll clock ops in hdmi_phy_8960.c will be removed later. The driver will use these until the HDMI PHY/PLL register offsets aren't considered as separate domains (i.e. their offsets start from 0). Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-02-29drm/msm/hdmi: Create a separate HDMI PHY driverArchit Taneja
Create a PHY device that represents the TX PHY and PLL parts of the HDMI block. This makes management of PHY specific resources (regulators and clocks) much easier, and makes the PHY and PLL usable independently. It also simplifies the core HDMI driver, which currently assigns phy ops among many other things. The PHY driver implementation done here is very similar to the PHY driver we already have for DSI. Keep the old hdmi_phy_funcs ops for now. The driver will use these until the HDMI PHY/PLL register offsets aren't considered as separate domains (i.e. their offsets start from 0). The driver doesn't use the common PHY framework for now. This is because it's hard to map our ops with the ops provided by the framework. The bindings used for this is the generic phy bindings. So, this can be adapted to the PHY framework in the future, if possible. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-02-29drm/msm/hdmi: Fix connector detect when there is no HPD gpioArchit Taneja
Some platforms may not have a HPD gpio line to detect Hot Plug signal from the connector. They need to rely only on reading REG_HDMI_HPD_INT_STATUS for HPD. Modify hdmi_connector_detect logic such that it checks for HPD only using the status register if there is no HPD gpio. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-02-29drm/msm/hdmi: Clean up connector gpio usageArchit Taneja
Make gpio allocation and usage iterative by parsing the gpios on a given platform from a list. This gives us flexibility over what all gpios exist for a platform, whether they are input or output, and what value they should be set to. In particular, this will make HDMI on 8x96 platforms easier to integrate with the driver, as it doesn't have a HPD gpio input to them. Also, it cleans things up a bit. We still use the legacy gpio api here, as we might need to backport this driver to downstream kernels. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-02-19Merge tag 'topic/drm-misc-2016-02-18' of ↵Dave Airlie
git://anongit.freedesktop.org/drm-intel into drm-next Misc stuff all over: - more mode_fixup removal from Carlos, there's another final pile still left. - final bits of vgaswitcheroo from Lukas for apple gmux, we're still discussing an api cleanup patch to make it a bit more abuse-safe as a follow-up - dp aux interface for userspace for tools&tests from Rafael Antognolli - actual interface parts for dma-buf flushing for userspace mmap - few small bits all over - vgaswitcheroo support for apple gmux from Lukas Wunner - checks for ->mode_fixup in non-atomic helpers from Carlos Palminha, plus removing dummy funcs from drivers. Carlos promised to follow up with more, since there's lots more silly dummy functions around. - dma-buf patches from Tiago, except the ioctl itself (that needed a respin to address review from David Herrmann) - encoder mask for atomic from Maarten - bunch of random things all over. * tag 'topic/drm-misc-2016-02-18' of git://anongit.freedesktop.org/drm-intel: (57 commits) drm/udl: Use module_usb_driver drm: fixes crct set_mode when crtc mode_fixup is null. drm/tilcdc: removed optional dummy encoder mode_fixup function. drm/sti: removed optional dummy encoder mode_fixup function. drm/rockchip: removed optional dummy encoder mode_fixup function. drm/qxl: removed optional dummy encoder mode_fixup function. drm/mgag200: removed optional dummy encoder mode_fixup function. drm/msm/mdp: removed optional dummy encoder mode_fixup function. drm/imx: removed optional dummy encoder mode_fixup function. drm/gma500: removed optional dummy encoder mode_fixup function. drm/radeon: removed optional dummy encoder mode_fixup function. drm/cirrus: removed optional dummy encoder mode_fixup function. drm/bochs: removed optional dummy encoder mode_fixup function. drm/ast: removed optional dummy encoder mode_fixup function. drm/amdgpu: removed optional dummy encoder mode_fixup function. drm/exynos: removed optional dummy encoder mode_fixup function. drm/udl: removed optional dummy encoder mode_fixup function. drm/virtio: removed optional dummy encoder mode_fixup function. drm/fb_helper: Use add_one_connector in add_all_connectors. drm/fb_helper: Use correct allocation count for arrays. ...
2016-02-16drm/msm/mdp: removed optional dummy encoder mode_fixup function.Carlos Palminha
mode_fixup function for encoder drivers became optional with patch http://patchwork.freedesktop.org/patch/msgid/1455106522-32307-1-git-send-email-palminha@synopsys.com This patch set nukes all the dummy mode_fixup implementations. (made on top of Daniel topic/drm-misc branch) Signed-off-by: Carlos Palminha <palminha@synopsys.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/77692d9d34c2ed6a035f36d377d3544dbe100114.1455540137.git.palminha@synopsys.com
2016-02-11drm/msm: remove unused variableArnd Bergmann
After the drm_device_is_unplugged() was removed, the 'dev' variable is now unused, and we get a warning for that: drivers/gpu/drm/msm/msm_fbdev.c: In function 'msm_fbdev_mmap': drivers/gpu/drm/msm/msm_fbdev.c:65:21: error: unused variable 'dev' [-Werror=unused-variable] This removes the variable as well. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Fixes: e9f8250f2f92 ("drm/msm: remove the drm_device_is_unplugged check") Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1455181810-3910161-1-git-send-email-arnd@arndb.de
2016-02-11drm/msm: add max-freq gpu param to uapiRob Clark
We need this in userspace for interpreting some of the perf ctrs. Note possibly not quite sufficient if we had some frequency mgmt approach other than race-to-idle. Not really sure what the best thing to do if we did. Although displaying results as a percentage of max frequence seems sensible(ish) if we did. Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-02-09drm/msm: remove the drm_device_is_unplugged checkHaixia Shi
This flag is only used for drm/udl. Signed-off-by: Haixia Shi <hshi@chromium.org> Reviewed-by: Stéphane Marchesin <marcheu@chromium.org> Reviewed-by: David Herrmann <dh.herrmann@gmail.com> Acked-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1454709464-2536-1-git-send-email-hshi@chromium.org
2016-02-09Merge tag 'topic/drm-misc-2016-02-08' of ↵Dave Airlie
git://anongit.freedesktop.org/drm-intel into drm-next First drm-misc pull req for 4.6. Big one is the drm_event cleanup, which is also prep work for adding android fence support to kms (Gustavo is planning to do that). Otherwise random small bits all over. * tag 'topic/drm-misc-2016-02-08' of git://anongit.freedesktop.org/drm-intel: (33 commits) gma500: clean up an excessive and confusing helper drm/gma500: remove helper function drm/vmwgfx: Nuke preclose hook drm/vc4: Nuke preclose hook drm/tilcdc: Nuke preclose hook drm/tegra: Stop cancelling page flip events drm/shmob: Nuke preclose hook drm/rcar: Nuke preclose hook drm/omap: Nuke close hooks drm/msm: Nuke preclose hooks drm/imx: Unconfuse preclose logic drm/exynos: Remove event cancelling from postclose drm/atmel: Nuke preclose drm/i915: Nuke intel_modeset_preclose drm: Nuke vblank event file cleanup code drm: Clean up pending events in the core drm/vblank: Use drm_event_reserve_init drm/vmwgfx: fix a NULL dereference drm/crtc-helper: Add caveat to disable_unused_functions doc drm/gma500: Remove empty preclose hook ...
2016-02-08drm/msm: Nuke preclose hooksDaniel Vetter
They only complete the page flip events to avoid oops when the drm file closes. The core takes care of that now and we can remove this code. Cc: Rob Clark <robdclark@gmail.com> Acked-by: Daniel Stone <daniels@collabora.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1453756616-28942-8-git-send-email-daniel.vetter@ffwll.ch
2016-01-17Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds
Pull drm updates from Dave Airlie: "This is the main drm pull request for 4.5. I don't think I've missed anything too major, I'm mostly back at work now but I'll probably get some sleep in 5 years time. Summary: New drivers: - etnaviv: GPU driver for the 3D core on the Vivante core used in numerous ARM boards. Highlights: Core: - Atomic suspend/resume helpers - Move the headers to using userspace friendlier types. - Documentation updates - Lots of struct_mutex removal. - Bunch of DP MST fixes from AMD. Panel: - More DSI helpers - Support for some new basic panels i915: - Basic Kabylake support - DP link training and detect code refactoring - fbc/psr fixes - FIFO underrun fixes - SDE interrupt handling fixes - dma-buf/fence support in pageflip path. - GPU side for MST audio support radeon/amdgpu: - Drop UMS support - GPUVM/Scheduler optimisations - Initial Powerplay support for Tonga/Fiji/CZ/ST - ACP audio prerequisites nouveau: - GK20a instmem improvements - PCIE link speed change support msm: - DSI support for msm8960/apq8064 tegra: - Host1X support for Tegra210 SoC vc4: - 3D acceleration support armada: - Get rid of struct mutex tda998x: - Atomic modesetting support - TMDS clock limitations omapdrm: - Atomic modesetting support - improved TILER performance rockchip: - RK3036 VOP support - Atomic modesetting support - Synopsys DW MIPI DSI support exynos: - Runtime PM support - of_graph binding for DP panels - Cleanup of IPP code - Configurable plane support - Kernel panic fixes at release time" * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (711 commits) drm/fb_cma_helper: Remove implicit call to disable_unused_functions drm/amdgpu: add missing irq.h include drm/vmwgfx: Fix a width / pitch mismatch on framebuffer updates drm/vmwgfx: Fix an incorrect lock check drm: nouveau: fix nouveau_debugfs_init prototype drm/nouveau/pci: fix check in nvkm_pcie_set_link drm/amdgpu: validate duplicates first drm/amdgpu: move VM page tables to the LRU end on CS v2 drm/ttm: add ttm_bo_move_to_lru_tail function v2 drm/ttm: fix adding foreign BOs to the swap LRU drm/ttm: fix adding foreign BOs to the LRU during init v2 drm/radeon: use kobj_to_dev() drm/amdgpu: use kobj_to_dev() drm/amdgpu/cz: force vce clocks when sclks are forced drm/amdgpu/cz: force uvd clocks when sclks are forced drm/amdgpu/cz: add code to enable forcing VCE clocks drm/amdgpu/cz: add code to enable forcing UVD clocks drm/amdgpu: fix lost sync_to if scheduler is enabled. drm/amd/powerplay: fix static checker warning for return meaningless value. drm/sysfs: use kobj_to_dev() ...
2016-01-17Merge branch 'akpm' (patches from Andrew)Linus Torvalds
Merge second patch-bomb from Andrew Morton: - more MM stuff: - Kirill's page-flags rework - Kirill's now-allegedly-fixed THP rework - MADV_FREE implementation - DAX feature work (msync/fsync). This isn't quite complete but DAX is new and it's good enough and the guys have a handle on what needs to be done - I expect this to be wrapped in the next week or two. - some vsprintf maintenance work - various other misc bits * emailed patches from Andrew Morton <akpm@linux-foundation.org>: (145 commits) printk: change recursion_bug type to bool lib/vsprintf: factor out %pN[F] handler as netdev_bits() lib/vsprintf: refactor duplicate code to special_hex_number() printk-formats.txt: remove unimplemented %pT printk: help pr_debug and pr_devel to optimize out arguments lib/test_printf.c: test dentry printing lib/test_printf.c: add test for large bitmaps lib/test_printf.c: account for kvasprintf tests lib/test_printf.c: add a few number() tests lib/test_printf.c: test precision quirks lib/test_printf.c: check for out-of-bound writes lib/test_printf.c: don't BUG lib/kasprintf.c: add sanity check to kvasprintf lib/vsprintf.c: warn about too large precisions and field widths lib/vsprintf.c: help gcc make number() smaller lib/vsprintf.c: expand field_width to 24 bits lib/vsprintf.c: eliminate potential race in string() lib/vsprintf.c: move string() below widen_string() lib/vsprintf.c: pull out padding code from dentry_name() printk: do cond_resched() between lines while outputting to consoles ...
2016-01-15mm, dax, gpu: convert vm_insert_mixed to pfn_tDan Williams
Convert the raw unsigned long 'pfn' argument to pfn_t for the purpose of evaluating the PFN_MAP and PFN_DEV flags. When both are set it triggers _PAGE_DEVMAP to be set in the resulting pte. There are no functional changes to the gpu drivers as a result of this conversion. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Cc: Dave Hansen <dave@sr71.net> Cc: David Airlie <airlied@linux.ie> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2015-12-15Merge tag 'topic/drm-misc-2015-12-14' of ↵Dave Airlie
git://anongit.freedesktop.org/drm-intel into drm-next Last (very likely at least) drm-misc pull for 4.5. 3 big things: - piles of docs for kms vtables. - drm.debug dmesg output prettification from Ville (i915 parts are for 4.6 I think) - connector mode probing/validating/merging cleanup from Ville. [airlied : fix drm_encoder_init conflict.] * tag 'topic/drm-misc-2015-12-14' of git://anongit.freedesktop.org/drm-intel: (43 commits) drm: modes: Revert cc344980c767 "replace simple_strtoul by kstrtouint" drm: Expand the drm_helper_probe_single_connector_modes() docs drm: Allow override_edid to override the firmware EDID drm/sti: Drop bogus drm_mode_sort() call drm: Drop drm_helper_probe_single_connector_modes_nomerge() drm: Only merge mode type bits between new probed modes drm: Flatten drm_mode_connector_list_update() a bit drm: Rename MODE_UNVERIFIED to MODE_STALE drm: Don't overwrite UNVERFIED mode status to OK drm: Add plane->name and use it in debug prints drm: Add crtc->name and use it in debug messages drm: Use driver specified encoder name drm: Pass 'name' to drm_encoder_init() drm: Pass 'name' to drm_universal_plane_init() drm: Pass 'name' to drm_crtc_init_with_planes() drm: Documentation style guide drm: Document drm_encoder/crtc_helper_funcs drm: Move drm_display_mode an related docs into kerneldoc drm/atomic-helper: Mention the new system/resume helpers the docs drm: Document drm_connector_helper_funcs ...
2015-12-14drm/msm/mdp: fix a problematic usage of WARN_ON()Geliang Tang
WARN_ON() takes a condition rather than a format string. This patch converted WARN_ON() to WARN() instead. Signed-off-by: Geliang Tang <geliangtang@163.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-12-14drm/msm/dsi: Added missing mutex_unlocksaurabh
in case of failed to get iova, function was returning without releasing the mutex. Added it. Signed-off-by: Saurabh Sengar <saurabh.truth@gmail.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-12-14drm/msm: ratelimit error irq msgsRob Clark
When things go bad and don't recover, we can be getting an err irq every vblank. Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-12-14drm/msm: Use unlocked gem unreferencingDaniel Vetter
For drm_gem_object_unreference callers are required to hold dev->struct_mutex, which these paths don't. Enforcing this requirement has become a bit more strict with commit ef4c6270bf2867e2f8032e9614d1a8cfc6c71663 Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Thu Oct 15 09:36:25 2015 +0200 drm/gem: Check locking in drm_gem_object_unreference Cc: Rob Clark <robdclark@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-12-14drm/msm/dsi: Enable MMSS SPFB port via sysconArchit Taneja
For DSIv2 to work, we need to enable MMSS_AHB_ARB_MASTER_PORT in MMSS_SFPB. We enable the required bitfield by retrieving MMSS_SFPB regmap pointer via syscon. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-12-14drm/msm/dsi: Don't use iommu for command TX buffer for DSIv2Archit Taneja
We currently use iommu allocated DMA buffers for sending DSI commands. DSIv2 doesn't have a port connected to the MDP iommu. Therefore, it can't use iommu allocated buffers to fetch DSI commands. Use a regular contiguous DMA buffer if we are DSIv2. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-12-14drm/msm/dsi: Add dsi_cfg for APQ8064Archit Taneja
Add a dsi_cfg entry for APQ8064. Since this is the first DSIv2 chip to be supported, add a list of bus clocks that are required by the DSIv2 block. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-12-14drm/msm/dsi: Set up link clocks for DSIv2Archit Taneja
DSIv2 (DSI on older A family chips) has slightly different link clock requirements. First, we have an extra clock called src_clk (with a dedicated RCG). This is required by the DSI controller to process the pixel data coming from MDP. It needs to be set at the rate "pclk * bytes_per_pixel". We also need to explicitly configure esc_clk. On DSI6G chips, we don't need to set a rate to esc_clk because its RCG is always sourced from crystal clock (19.2 Mhz in all cases), which is within the escape clock frequency range in the mipi DSI spec. For chips with DSIv2, the crystal clock rate may not be within the required range (27Mhz on APQ8064). Therefore, we derive it from the DSI byte clock. We calculate an esc_clck rate that is within the mipi spec and also divisible by the byte clock rate. When setting rate and enabling the link clocks, we make sure that byte_clk is configured before esc_clk, and src_clk before pixel_clk. We create two different link_enable funcs for DSI6G and DSIv2 since the sequences are different. We also obtain two extra source clocks (dsi_src_clk and esc_src_clk) and set their parent to the clocks provided by DSI PLL. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-12-14drm/msm/dsi: Parse bus clocks from a listArchit Taneja
DSI bus clocks seem to vary between different DSI host versions, and the SOC to which they belong. Even the enable/disable sequence varies. Provide a list of bus clock names in dsi_cfg. The driver will use this to retrieve the clocks, and enable/disable them. Add bus clock lists for DSI6G, and DSI for MSM8916(this is DSI6G too, but there is no MMSS_CC specific clock since there is no MMSS clock controller on 8916). Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-12-14drm/msm/dsi: Delay dsi_clk_initArchit Taneja
Initialize clocks only after we get the DSI host version. This will allow us to get clocks using a pre-defined list based on the DSI major/minor version of the host. This is required since clock requirements of different major DSI revisions(v2 vs 6g) aren't the same. Modify dsi_get_version to get the interface clock, and then put it after it is used. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-12-14drm/msm/dsi: Use a better way to figure out DSI versionArchit Taneja
The current version checking mechanism works fine for DSI6G blocks. It doesn't work so well for older generation DSIv2 blocks. The initial read of REG_DSI_6G_HW_VERSION(offset 0x0) would result in a read of REG_DSI_CTRL for DSIv2. This register won't necessarily be 0 on DSIv2. It can be non zero if DSI was previously initialized by the bootloader. Instead of reading offset 0x0, we now read offset 0x1f0. For DSIv2, this register is DSI_VERSION, and is bound to be non-zero. On DSI6G, this register(offset 0x1f0) is SCRATCH_REGISTER_0, which no one ever seems to touch, and from all register dumps I'vc seen, holds 0 all the time. Modify dsi_get_version to read REG_DSI_VERSION to determine whether we are DSI6G or DSIv2. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-12-14drm/msm/dsi: Add DSI PLL for 28nm 8960 PHYArchit Taneja
Add DSI PLL common clock framework clocks for 8960 PHY. The PLL here is different from the ones found in B family msm chips. As before, the DSI provides two clocks to the outside world. dsixpll and dsixpllbyte (x = 1, 2). dsixpll is a regular clock divider, but dsixpllbyte is modelled as a custom clock divider. dsixpllbyte is the starting point of the PLL configuration. It is the one that sets up the VCO clock rate. We need the VCO clock rate in the form: F * byteclk, where F is a multiplication factor that varies on the byte clock the DSI driver is trying to set. We use the custom clk_ops for dsixpllbyte to ensure that the parent (VCO) is set at this rate. An additional divider (POSTDIV1) generates the bitclk. Since bit clock can be derived from byteclock, we calculate it internally, and don't expose it as a clock. Cc: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-12-14drm/msm/dsi: Add support for 28nm PHY on 8960Archit Taneja
DSI PHY on MSM8960 and APQ8064 is a 28nm PHY that's different from the supported 28nm LP PHY found in newer chips. Add support for the new PHY. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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